DE3273471D1 - Method of synchronizing two microprocessors - Google Patents

Method of synchronizing two microprocessors

Info

Publication number
DE3273471D1
DE3273471D1 DE8282108541T DE3273471T DE3273471D1 DE 3273471 D1 DE3273471 D1 DE 3273471D1 DE 8282108541 T DE8282108541 T DE 8282108541T DE 3273471 T DE3273471 T DE 3273471T DE 3273471 D1 DE3273471 D1 DE 3273471D1
Authority
DE
Germany
Prior art keywords
synchronisation
microprocessor
register
microcycles
counted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282108541T
Other languages
German (de)
English (en)
Inventor
Daniel Boissard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cegelec SA
Original Assignee
Cegelec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cegelec SA filed Critical Cegelec SA
Application granted granted Critical
Publication of DE3273471D1 publication Critical patent/DE3273471D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G06F11/1645Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components and the comparison itself uses redundant hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Time-Division Multiplex Systems (AREA)
DE8282108541T 1981-09-22 1982-09-16 Method of synchronizing two microprocessors Expired DE3273471D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8117832A FR2513409A1 (fr) 1981-09-22 1981-09-22 Procede de synchronisation de deux microprocesseurs

Publications (1)

Publication Number Publication Date
DE3273471D1 true DE3273471D1 (en) 1986-10-30

Family

ID=9262353

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282108541T Expired DE3273471D1 (en) 1981-09-22 1982-09-16 Method of synchronizing two microprocessors

Country Status (7)

Country Link
EP (1) EP0075278B1 (enExample)
AT (1) ATE22496T1 (enExample)
BR (1) BR8205539A (enExample)
DE (1) DE3273471D1 (enExample)
ES (1) ES515854A0 (enExample)
FR (1) FR2513409A1 (enExample)
MX (1) MX155323A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3332802A1 (de) * 1983-09-12 1985-03-28 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum pruefen des ordnungsgerechten anlaufens eines zweikanaligen fail-safe-mikrocomputerschaltwerkes, insbesondere fuer eisenbahnsicherungsanlagen
US5020024A (en) * 1987-01-16 1991-05-28 Stratus Computer, Inc. Method and apparatus for detecting selected absence of digital logic synchronism
EP0394514B1 (de) * 1989-04-25 1994-07-13 Siemens Aktiengesellschaft Verfahren zur Synchronisation von Datenverarbeitungsanlagen
JPH04133102A (ja) * 1990-09-26 1992-05-07 Mitsubishi Electric Corp プログラマブル・コントローラ及びその制御方法
DE19809089A1 (de) * 1998-02-25 1999-08-26 Siemens Ag Synchronisations- und/oder Datenaustauschverfahren für sichere, hochverfügbare Rechner und hierzu geeignete Einrichtung

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1269827B (de) * 1965-09-09 1968-06-06 Siemens Ag Verfahren und Zusatzeinrichtung zur Synchronisierung von parallel arbeitenden Datenverarbeitungsanlagen
US3810119A (en) * 1971-05-04 1974-05-07 Us Navy Processor synchronization scheme
DE2458224C3 (de) * 1974-12-09 1978-04-06 Siemens Ag, 1000 Berlin Und 8000 Muenchen Datenverarbeitungssystem mit Koordinierung der Parallelarbeit von mindestens zwei Datenverarbeitungsanlagen
DE2651314C2 (de) * 1976-11-10 1982-03-25 Siemens AG, 1000 Berlin und 8000 München Sicherheits-Ausgabeschaltung für eine Binärsignale abgebende Datenverarbeitungsanlage

Also Published As

Publication number Publication date
EP0075278B1 (fr) 1986-09-24
FR2513409B1 (enExample) 1983-12-02
EP0075278A1 (fr) 1983-03-30
FR2513409A1 (fr) 1983-03-25
BR8205539A (pt) 1983-08-30
ES8306539A1 (es) 1983-06-01
MX155323A (es) 1988-02-18
ATE22496T1 (de) 1986-10-15
ES515854A0 (es) 1983-06-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee