DE3173031D1 - A field programmable semiconductor memory device - Google Patents

A field programmable semiconductor memory device

Info

Publication number
DE3173031D1
DE3173031D1 DE8181306060T DE3173031T DE3173031D1 DE 3173031 D1 DE3173031 D1 DE 3173031D1 DE 8181306060 T DE8181306060 T DE 8181306060T DE 3173031 T DE3173031 T DE 3173031T DE 3173031 D1 DE3173031 D1 DE 3173031D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
field programmable
programmable semiconductor
field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181306060T
Other languages
German (de)
English (en)
Inventor
Kouji Ueno
Toshitaka Fukushima
Kazumi Koyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3173031D1 publication Critical patent/DE3173031D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
DE8181306060T 1980-12-23 1981-12-22 A field programmable semiconductor memory device Expired DE3173031D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18229580A JPS57105898A (en) 1980-12-23 1980-12-23 Field programmable element

Publications (1)

Publication Number Publication Date
DE3173031D1 true DE3173031D1 (en) 1986-01-02

Family

ID=16115780

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181306060T Expired DE3173031D1 (en) 1980-12-23 1981-12-22 A field programmable semiconductor memory device

Country Status (5)

Country Link
US (1) US4459694A (enExample)
EP (1) EP0055918B1 (enExample)
JP (1) JPS57105898A (enExample)
DE (1) DE3173031D1 (enExample)
IE (1) IE52145B1 (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59198596A (ja) * 1983-04-22 1984-11-10 Hitachi Micro Comput Eng Ltd 検査回路
JPS6095799A (ja) * 1983-10-31 1985-05-29 Nec Corp プログラマブル・リ−ド・オンリ−・メモリ
JPS60109241A (ja) * 1983-11-17 1985-06-14 Fujitsu Ltd 半導体装置の製造方法
US4718042A (en) * 1985-12-23 1988-01-05 Ncr Corporation Non-destructive method and circuit to determine the programmability of a one time programmable device
JPS62157400A (ja) * 1985-12-27 1987-07-13 Fujitsu Ltd 半導体記憶回路
US4731760A (en) * 1986-05-05 1988-03-15 Motorola, Inc. On-chip test circuitry for an ECL PROM
DE3773773D1 (de) * 1986-06-25 1991-11-21 Nec Corp Pruefschaltung fuer eine speichereinrichtung mit willkuerlichem zugriff.
US4801869A (en) * 1987-04-27 1989-01-31 International Business Machines Corporation Semiconductor defect monitor for diagnosing processing-induced defects
JPS6425399A (en) * 1987-07-21 1989-01-27 Fujitsu Ltd Programmable device and its test method
US5109353A (en) 1988-12-02 1992-04-28 Quickturn Systems, Incorporated Apparatus for emulation of electronic hardware system
US5329470A (en) * 1988-12-02 1994-07-12 Quickturn Systems, Inc. Reconfigurable hardware emulation system
US5369593A (en) * 1989-05-31 1994-11-29 Synopsys Inc. System for and method of connecting a hardware modeling element to a hardware modeling system
US5353243A (en) * 1989-05-31 1994-10-04 Synopsys Inc. Hardware modeling system and method of use
JPH0754781A (ja) * 1993-08-11 1995-02-28 Paramount Bed Co Ltd 供給エア圧可変型エアポンプ装置
JPH0754780A (ja) * 1993-08-11 1995-02-28 Paramount Bed Co Ltd 供給エア圧可変型エアポンプ装置
US5680583A (en) * 1994-02-16 1997-10-21 Arkos Design, Inc. Method and apparatus for a trace buffer in an emulation system
US5841967A (en) * 1996-10-17 1998-11-24 Quickturn Design Systems, Inc. Method and apparatus for design verification using emulation and simulation
US5960191A (en) 1997-05-30 1999-09-28 Quickturn Design Systems, Inc. Emulation system with time-multiplexed interconnect
US5970240A (en) * 1997-06-25 1999-10-19 Quickturn Design Systems, Inc. Method and apparatus for configurable memory emulation
US6704677B2 (en) * 2001-12-14 2004-03-09 Sun Microsystems, Inc. Method and apparatus for generating a data pattern for simultaneously testing multiple bus widths
US8959010B1 (en) 2011-12-08 2015-02-17 Cadence Design Systems, Inc. Emulation system with improved reliability of interconnect and a method for programming such interconnect
US8743735B1 (en) 2012-01-18 2014-06-03 Cadence Design Systems, Inc. Emulation system for verifying a network device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL267532A (enExample) * 1960-07-29
US3995215A (en) * 1974-06-26 1976-11-30 International Business Machines Corporation Test technique for semiconductor memory array
US4055802A (en) * 1976-08-12 1977-10-25 Bell Telephone Laboratories, Incorporated Electrical identification of multiply configurable circuit array
JPS6027120B2 (ja) * 1977-11-04 1985-06-27 日本電気株式会社 プログラマブルメモリ
US4254477A (en) * 1978-10-25 1981-03-03 Mcdonnell Douglas Corporation Reconfigurable memory circuit
JPS5914838B2 (ja) * 1978-11-25 1984-04-06 富士通株式会社 フィ−ルドプログラマブル素子
EP0011974B1 (en) * 1978-11-25 1984-02-15 Fujitsu Limited Programmable memory device provided with test means
US4301535A (en) * 1979-07-02 1981-11-17 Mostek Corporation Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit
US4389715A (en) * 1980-10-06 1983-06-21 Inmos Corporation Redundancy scheme for a dynamic RAM

Also Published As

Publication number Publication date
JPS57105898A (en) 1982-07-01
EP0055918A2 (en) 1982-07-14
US4459694A (en) 1984-07-10
IE813063L (en) 1982-06-23
JPS6129079B2 (enExample) 1986-07-04
IE52145B1 (en) 1987-07-08
EP0055918B1 (en) 1985-11-21
EP0055918A3 (en) 1982-08-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee