DE3170644D1 - Method of filling a groove in a semiconductor substrate - Google Patents

Method of filling a groove in a semiconductor substrate

Info

Publication number
DE3170644D1
DE3170644D1 DE8181305593T DE3170644T DE3170644D1 DE 3170644 D1 DE3170644 D1 DE 3170644D1 DE 8181305593 T DE8181305593 T DE 8181305593T DE 3170644 T DE3170644 T DE 3170644T DE 3170644 D1 DE3170644 D1 DE 3170644D1
Authority
DE
Germany
Prior art keywords
filling
groove
semiconductor substrate
semiconductor
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181305593T
Other languages
English (en)
Inventor
Hiroshi Iwai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP16858580A external-priority patent/JPS5791538A/ja
Priority claimed from JP16858480A external-priority patent/JPS5791537A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3170644D1 publication Critical patent/DE3170644D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
DE8181305593T 1980-11-29 1981-11-26 Method of filling a groove in a semiconductor substrate Expired DE3170644D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP16858580A JPS5791538A (en) 1980-11-29 1980-11-29 Manufacture of semiconductor device
JP16858480A JPS5791537A (en) 1980-11-29 1980-11-29 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
DE3170644D1 true DE3170644D1 (en) 1985-06-27

Family

ID=26492237

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181305593T Expired DE3170644D1 (en) 1980-11-29 1981-11-26 Method of filling a groove in a semiconductor substrate

Country Status (3)

Country Link
US (1) US4419813A (de)
EP (1) EP0055521B1 (de)
DE (1) DE3170644D1 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4407851A (en) * 1981-04-13 1983-10-04 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing semiconductor device
JPS57204148A (en) * 1981-06-10 1982-12-14 Toshiba Corp Manufacture of semiconductor device
US4472874A (en) * 1981-06-10 1984-09-25 Tokyo Shibaura Denki Kabushiki Kaisha Method of forming planar isolation regions having field inversion regions
US4532701A (en) * 1981-08-21 1985-08-06 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing semiconductor device
JPS58165341A (ja) * 1982-03-26 1983-09-30 Toshiba Corp 半導体装置の製造方法
JPS58202545A (ja) * 1982-05-21 1983-11-25 Toshiba Corp 半導体装置の製造方法
JPS58210634A (ja) * 1982-05-31 1983-12-07 Toshiba Corp 半導体装置の製造方法
JPS618945A (ja) * 1984-06-25 1986-01-16 Nec Corp 半導体集積回路装置
US4663832A (en) * 1984-06-29 1987-05-12 International Business Machines Corporation Method for improving the planarity and passivation in a semiconductor isolation trench arrangement
FR2568723B1 (fr) * 1984-08-03 1987-06-05 Commissariat Energie Atomique Circuit integre notamment de type mos et son procede de fabrication
US4888626A (en) * 1985-03-07 1989-12-19 The United States Of America As Represented By The Secretary Of The Navy Self-aligned gaas fet with low 1/f noise
US4729006A (en) * 1986-03-17 1988-03-01 International Business Machines Corporation Sidewall spacers for CMOS circuit stress relief/isolation and method for making
US4783238A (en) * 1987-07-31 1988-11-08 Hughes Aircraft Company Planarized insulation isolation
US4801380A (en) * 1987-12-23 1989-01-31 The Texas A&M University System Method of producing a silicon film with micropores
US5277769A (en) * 1991-11-27 1994-01-11 The United States Of America As Represented By The Department Of Energy Electrochemical thinning of silicon
US5310692A (en) * 1992-05-29 1994-05-10 Sgs-Thomson Microelectronics, Inc. Method of forming a MOSFET structure with planar surface
US5356828A (en) * 1993-07-01 1994-10-18 Digital Equipment Corporation Method of forming micro-trench isolation regions in the fabrication of semiconductor devices
US6034410A (en) * 1994-01-14 2000-03-07 Stmicroelectronics, Inc. MOSFET structure with planar surface
GB2344465B (en) * 1997-06-13 2000-11-29 Nec Corp Method for producing a semiconductor device
JP3063686B2 (ja) * 1997-06-13 2000-07-12 日本電気株式会社 半導体装置の製造方法
JPH118295A (ja) * 1997-06-16 1999-01-12 Nec Corp 半導体装置及びその製造方法
US6200880B1 (en) * 1998-11-16 2001-03-13 United Microelectronics Corp. Method for forming shallow trench isolation
US6080638A (en) * 1999-02-05 2000-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Formation of thin spacer at corner of shallow trench isolation (STI)
US7018779B2 (en) * 2003-01-07 2006-03-28 International Business Machines Corporation Apparatus and method to improve resist line roughness in semiconductor wafer processing

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1037199A (en) * 1964-07-14 1966-07-27 Standard Telephones Cables Ltd Improvements in or relating to transistor manufacture
JPS5624370B2 (de) * 1973-06-04 1981-06-05
US3985597A (en) * 1975-05-01 1976-10-12 International Business Machines Corporation Process for forming passivated metal interconnection system with a planar surface
US3966514A (en) * 1975-06-30 1976-06-29 Ibm Corporation Method for forming dielectric isolation combining dielectric deposition and thermal oxidation
US4016017A (en) * 1975-11-28 1977-04-05 International Business Machines Corporation Integrated circuit isolation structure and method for producing the isolation structure
JPS5918858B2 (ja) * 1976-09-22 1984-05-01 株式会社日立製作所 ホトレジスト被膜の埋込方法
JPS54589A (en) * 1977-06-03 1979-01-05 Hitachi Ltd Burying method of insulator
JPS5492175A (en) * 1977-12-29 1979-07-21 Fujitsu Ltd Manufacture of semiconductor device
US4140558A (en) * 1978-03-02 1979-02-20 Bell Telephone Laboratories, Incorporated Isolation of integrated circuits utilizing selective etching and diffusion
JPS5534442A (en) * 1978-08-31 1980-03-11 Fujitsu Ltd Preparation of semiconductor device
JPS5572053A (en) * 1978-11-27 1980-05-30 Fujitsu Ltd Preparation of semiconductor device
US4268952A (en) * 1979-04-09 1981-05-26 International Business Machines Corporation Method for fabricating self-aligned high resolution non planar devices employing low resolution registration
JPS55138874A (en) * 1979-04-18 1980-10-30 Fujitsu Ltd Semiconductor device and method of fabricating the same
US4222792A (en) * 1979-09-10 1980-09-16 International Business Machines Corporation Planar deep oxide isolation process utilizing resin glass and E-beam exposure

Also Published As

Publication number Publication date
EP0055521A1 (de) 1982-07-07
EP0055521B1 (de) 1985-05-22
US4419813A (en) 1983-12-13

Similar Documents

Publication Publication Date Title
DE3170644D1 (en) Method of filling a groove in a semiconductor substrate
GB2081159B (en) Method of manufacturing a semiconductor device
DE3172663D1 (en) Method of making a matrix of interconnected semiconductor devices
DE3161302D1 (en) Method of producing a semiconductor device
DE3167203D1 (en) Method of manufacturing a semiconductor device
DE3271995D1 (en) Method of manufacturing a semiconductor device
JPS56152272A (en) Method of manufacturing semiconductor device
JPS56140671A (en) Method of manufacturing semiconductor device
DE3470253D1 (en) Method of manufacturing a semiconductor device having small dimensions
JPS56150835A (en) Method of packaging tape-operated semiconductor device
JPS56130918A (en) Method of injecting semiconductor
JPS56113528A (en) Germless filling method
JPS56144545A (en) Method of manufacturing semiconductor device
GB2111304B (en) Providing a groove in a substrate region
JPS56144543A (en) Method of manufacturing semiconductor device
DE3175085D1 (en) Method of manufacturing a semiconductor device
GB2071412B (en) Arrangement of zones in a semiconductor device
JPS56140668A (en) Method of manufacturing semiconductor device
DE3164132D1 (en) Method of manufacturing a semiconductor device and semiconductor device manufactured by using said method
DE3166902D1 (en) Method for passivating a semiconductor device
JPS56114352A (en) Method of manufacturing semiconductor device
DE3380002D1 (en) A method of manufacturing a semiconductor device for forming a deep field region in a semiconductor substrate
DE3170956D1 (en) Method for manufacturing a fine-patterned thick film conductor structure
DE3177102D1 (en) Method for forming the insulating layer of a semiconductor device
GB2081160B (en) Method of manufacturing a semiconductor device

Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee