DE3065360D1 - Semiconductor non-volatile memory device - Google Patents

Semiconductor non-volatile memory device

Info

Publication number
DE3065360D1
DE3065360D1 DE8080302039T DE3065360T DE3065360D1 DE 3065360 D1 DE3065360 D1 DE 3065360D1 DE 8080302039 T DE8080302039 T DE 8080302039T DE 3065360 T DE3065360 T DE 3065360T DE 3065360 D1 DE3065360 D1 DE 3065360D1
Authority
DE
Germany
Prior art keywords
memory device
volatile memory
semiconductor non
semiconductor
volatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080302039T
Other languages
English (en)
Inventor
Shinpei Hijiya
Takashi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP7656979A external-priority patent/JPS561573A/ja
Priority claimed from JP9642179A external-priority patent/JPS5621375A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3065360D1 publication Critical patent/DE3065360D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6717Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions the source and the drain regions being asymmetrical
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • H10D30/684Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/686Floating-gate IGFETs having only two programming levels programmed by hot carrier injection using hot carriers produced by avalanche breakdown of PN junctions, e.g. floating gate avalanche injection MOS [FAMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
DE8080302039T 1979-06-18 1980-06-17 Semiconductor non-volatile memory device Expired DE3065360D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7656979A JPS561573A (en) 1979-06-18 1979-06-18 Semiconductor nonvolatile memory
JP9642179A JPS5621375A (en) 1979-07-28 1979-07-28 Semiconductor nonvolatile memory device

Publications (1)

Publication Number Publication Date
DE3065360D1 true DE3065360D1 (en) 1983-11-24

Family

ID=26417710

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080302039T Expired DE3065360D1 (en) 1979-06-18 1980-06-17 Semiconductor non-volatile memory device

Country Status (4)

Country Link
US (1) US4491859A (de)
EP (1) EP0021777B1 (de)
CA (1) CA1139880A (de)
DE (1) DE3065360D1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4725875A (en) * 1985-10-01 1988-02-16 General Electric Co. Memory cell with diodes providing radiation hardness
JP2529885B2 (ja) * 1989-03-10 1996-09-04 工業技術院長 半導体メモリ及びその動作方法
IT1237666B (it) * 1989-10-31 1993-06-15 Sgs Thomson Microelectronics Processo per la fabbricazione di un componente limitatore della tensione di programmazione e stabilizzatore di tensione incorporato inun dispositivo elettrico con celle di memoria eeprom
BE1007475A3 (nl) * 1993-09-06 1995-07-11 Philips Electronics Nv Halfgeleiderinrichting met een niet-vluchtig geheugen en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting.
US6829814B1 (en) * 2002-08-29 2004-12-14 Delphi Technologies, Inc. Process of making an all-silicon microphone
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3755721A (en) * 1970-06-15 1973-08-28 Intel Corp Floating gate solid state storage device and method for charging and discharging same
US3744036A (en) * 1971-05-24 1973-07-03 Intel Corp Electrically programmable read only memory array
BE788874A (fr) * 1971-09-17 1973-01-02 Western Electric Co Module de circuit integre
JPS5024084A (de) * 1973-07-05 1975-03-14
US3893085A (en) * 1973-11-28 1975-07-01 Ibm Read mostly memory cell having bipolar and FAMOS transistor
US4247859A (en) * 1974-11-29 1981-01-27 Westinghouse Electric Corp. Epitaxially grown silicon layers with relatively long minority carrier lifetimes
JPS52153630A (en) * 1976-06-16 1977-12-20 Matsushita Electric Ind Co Ltd Semiconductor memory device
JPS542679A (en) * 1977-06-08 1979-01-10 Mitsubishi Electric Corp Nonvoltile semiconductor memory device
US4247861A (en) * 1979-03-09 1981-01-27 Rca Corporation High performance electrically alterable read-only memory (EAROM)

Also Published As

Publication number Publication date
CA1139880A (en) 1983-01-18
US4491859A (en) 1985-01-01
EP0021777A1 (de) 1981-01-07
EP0021777B1 (de) 1983-10-19

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