DE2852095C2 - Analog-digital conversion with step-by-step approximation of a digital signal to an analog signal to be converted - Google Patents

Description

The invention relates to an analog-digital conversion with step-by-step approximation of a digital signal an analog signal to be converted !, with one input of a! comparator being the analog signal and the the other input of the! Comparator is fed the output signal of a digital ^ analog converter, which a mild digital signal is applied to the input side.

Such analogue-digital conversions are from the Book by Lange »Digital ^ Analog or, Analog-Digital · Wandlung "Oldenbourg Verlag, Munich Vienna 1974, pages 25 to 45 known. It can be about Analog-digital conversions act with a continuous step-like approximation, in which the digital value changes by counting an up counter will. It can also be a successive approximation in which the various Digital digits of a memory can be queried one after the other by a control logic. The memory can both purely binary and in BCD code.

In another known analog-to-digital conversion of this type (DE-OS 14 62 664) a digital-to-analog converter is a voltage with the constant Size ZlKaIs gap width tension supplied This gap width voltage essentially serves to avoid irregularities in the during the step-wise approximation of the digital signal to an analog signal To compensate for step heights and thus a constant linearity in the conversion across all steps guarantee.

In all of these methods, the accuracy of the digital values generated is due to the least significant bit (LSB) of the digital value generator, so z. B. the counter or the memory.

The present invention is based on the object in an analog-digital conversion of the type mentioned the resolution compared to that of the digital-to-analog converter used without major Increase effort significantly.

This object is achieved in that the analog signal or the output signal of the Digital-to-analog converter a ramp function is added, the maximum value of which is approximately the size of the least significant bits of the digital-to-analog converter and their duration approximately a multiple of Corresponds to the duration of the stepwise approximation, and that during the period of the ramp function the arithmetic mean value several after each a stepwise approxima * ion of the present digi valley signals is formed.

The resolution is increased by adding a ramp function with the maximum value of approximately one LSB of the digital-to-analog converter to the analog signal, for example, and by arithmetic averaging over several conversions during the duration of the ramp function. The more conversions are used for averaging, the greater the increase in resolution. If you go z. B. from an 8- bit digital analog converter with a 12-bit linearity and averaged over 2 ⁴ = 16 conversions, the result is a resolution that corresponds to that of a 12-bit converter. One advantage of the digital-to-analog conversion according to the invention consists in the use of a simple (with low resolution) and thus inexpensive digital-to-analog converter. Also is. if you stay with the example, only an 8-bit bus coupling is necessary. That corresponds exactly to the size of a port. Furthermore, the approximation program only needs to be designed for these 8 bits. In addition, only a 12-bit addition of the conversion results is required.

If the maximum value of the ramp function does not exactly correspond to one LSB, or if its duration does not exist exactly equal to a multiple of a conversion, then the achieved increase in resolution is somewhat lower, the principle does not change

It is known that in an analog-to-digital converter (DE-OS 21 06 679) the analog input! '

gnai to superimpose one or more square wave signals, in order to increase the resolution; however, the period of these square-wave signals is much smaller than the duration of a complete approximation or conversion. For evaluating the analog input signal with the square-wave signal superimposed on it, an analog filter module is required here to control the higher-frequency Filters out square-wave signals at the output. This results in an increase in the resolution known Ana'og digital converter only through the Filtering out or smoothing of the square waves, with which intermediate values between the approximation levels can be formed.

In the case of a further analog-to-digital conversion, it is known (»The Bell System Technical Journal, 56 (1977), No. 9, Nov _n pages 1629-1631, 1540, 1641). the output signal of a quamization module is fed back to the input via a digital-to-analog converter module and linked with the analog input signal. However, this only makes it possible to reduce the effects of noise during the quantization by repeating these quantizations quickly during a specified period and by subsequent filtering. There is no increase in resolution

It is also known (»IBM Technical Disclosure Bulletin. 17 (1975), No. 11, April, p. 3485), at one Analog-digital conversion one or more analog-digital converter modules to be linked with a logic module and an adder as well as a memory, the logic module having digital values at the output of the analog-to-digital converter module at short intervals or the adder queries and supplies the memory. The analog-to-digital converter modules are each of the same structure and connected in parallel to each other, thereby interfering influences on each one Acting converter module, are largely eliminated; there is an increase in the resolution here also not, since all converter modules deliver the same output signal in the best case.

A steadily increasing function can be used as the ramp function in the conversion according to the application, as can be derived, for example, from a sawtooth generator. In an advantageous further development of the invention it is provided that the ramp function represents a stepped curve with equally large steps and that the duration of each step is equal to the duration of the step-by-step approximation. Should z. B. are determined over 2 ™ · conversions, the greatest improvement in resolution results in a stepped curve with 2 ^m steps of the size '/ ₂ ^m LSB. For each conversion within the scope of the 2 ^m conversions, the signal variable at the input of the comparator, which is also subjected to the ramp function, changes by the 2 ^m th part of the least significant bit of the digital-to-analog converter. For a certain number of conversions, there is initially a digital value that would have arisen even without the ramp function. This digital value corresponds to an analog value which generally deviates somewhat from the value of the analog signal to be converted. If the sum of this deviation and the ramp function results in an LSB, then the determined digital value changes with this and the following approximations. It increases by one LSB. Additional digital digits of lower significance can be determined from the ratio of the number of conversions in which an increased digital value results to the total number of conversions used for averaging.

The ramp function, like the analog signal to be converted, can be supplied from outside. In An advantageous development of the invention provides that the digital-to-analog converter before The beginning of each approximation is controlled briefly in such a way that its on a memory element (sample and hold) given output signal - if necessary after a voltage division - the respectively required step value in the stepped curve. This means that there is no need for an external function generator.

To make the analog-to-digital conversion according to the invention as insensitive as possible to interfering AC voltages to make, is advantageously the period of time over which the arithmetic mean is formed on the Period of an interfering alternating voltage superimposed on the analog signal matched. One achieves through it a quasi-integrating analog-digital conversion, as it is for the well-known analog-digital wall _'o lungs already in the book "Process Computer" by Anke, Kaltenecker, Oetker, Oldenbourg ''; rlag Munich Vienna, 1970, pages! ! 4 and 1! 5 is described.

For an analog-to-digital converter with a digitizer, a comparator and a digital-to-analog converter for performing an analog-to-digital conversion according to the invention, it is recommended that the digitizer and the digital-to-analog converter be designed for η bits is. wherein the converter possesses a linearity of η + m bits, and that an adder for η + m bits is provided, to which the signals of the digital value generator are fed after each of 2 ^m stepwise approximations. Up counters controlled by a clock generator or digital memories controlled by a control logic can be used as digital value formers. A particularly advantageous embodiment results when the digital value image only and the adder are parts of a microprocessor.

In the previous explanations, there was always talk of analog-digital conversion of a single analog signal to be converted. The analog-to-digital conversion according to the invention or an analog-to-digital converter operating according to it can advantageously also be used for analog signals. For example, a microprocessor and a digital-to-analog converter and k input ports and / r comparators can be provided. Instead of the Ä input ports, an input port and a digital multiplexer can be used. The λ comparators can be replaced by a single • so comparator and an analog multiplexer.

In principle, for the analog-to-digital conversion according to the invention every digital-to-analog converter uses we'-Jm. B. a digital-to-analog converter with weighted resistances, as found in Lange's book “Digital Analog or Analog Digital Wandlung «Oldenbourg-Verlag Munich Vienna 1974. Page 23, Fig. 5 is known, then the ramp function simply switched to the non-inverting input of the summation amplifier and thus to the analog output signal of this digital to analog converter are added,

In the following, with reference to FIG. 1 to 5 divi invention explained in more detail. The

F i g, 1 the chronological sequence of an analog-digital conversion according to the invention, In

2 are the results of FIG eight changes during the duration of the ramps *

function shown. the

3 and 4 show two different embodiments an analog-digilal converter for one analog signal to be converted.

Fig. 5 shows an analog-to-digital converter for several analog signals.

The time sequence of a step-by-step approximation is shown in FIG. For the sake of clarity, only a 4-bit resolution is shown here, ie it is assumed that a digital-analogue finder with only 4 digital digits is also used. In the upper part of FIG. I is plotted over time / the output voltage Udm of such a digital-to-analog converter. At the same time, an analog signal U to be converted is entered as a straight line parallel to the time axis. In the lower part of FIG. I is also plotted over time, the output signal of a comparator, which results from the output signal of the digital-to-analog converter and the analog signal to be converted. It is assumed that the output signal of the comparator has the value 1. as long as the output signal of the digital-to-analog converter is smaller than the analog signal to be converted.

The step-by-step approximation begins at time / ι. The individual digital digits of the digital-to-analog converter are queried one after the other. The approximation ends at time h. For this special example, the binary number 1010 results, which corresponds to the decimal number 10.

In FIG. 2, the results of 8 conversions are again shown over time, but on a different time scale, which take place ^{at regular intervals r} / _R. In this case, the reacted analog signal is superimposed on a monotonically increasing ramp function with a period 7 "and a maximum value of an LSB of the digital-to-analog converter Intervals ⁷ V ₈ correspond to the time period t2 -. / Ι a complete gradual approximation or conversion, such as it is shown in Fig. 1.

As the fig. 2 can also be found. result from the eight conversions shown in the binary system three times the values 1010 and five times the values 1011. In the decimal system there are three times the Values 10 and five times the values 11. The arithmetic The mean value of these eight conversions is 10.625 in the decimal system and 1010.101 in the binary system. It was also provided that the individual conversions with a digital-to-analog converter with four digital Bodies have been carried out. As can be seen from the result, this results in comparison to Conversion according to FIG. 1 an increase in resolution by three binary digits.

F i g. 3 shows an analog-digital converter according to the invention with a digital value generator 1, which consists of a clock generator 2, a control logic 3 and a digital memory 4. Before each step-by-step approximation, the control logic sets the digital memory 4 to zero. Then the most significant digit of the memory, i.e. d _n , is first set to one. The other digits are still zero. This digital signal is sent to a digital-to-analog converter 5 to which, in addition to a reference voltage LfRer, a voltage Ur ₃ ^ p corresponding to the ramp function is fed. The analog output signal of the digital-to-analog converter 5 is sent to one input of a comparator 6, the other input of which has the analog signal U _c applied to it. If the analog signal U _{c is} greater than the analog output voltage of the digital-to-analog converter 5, the most significant digital digit d ″ of the digital memory remains one; in the other case, d “is zero, then the next digital digit is set and the comparison with the analog signal U _{c is} carried out again. This is continued until the digital position di of the digital memory 4 is reached. The first change is thus completed. About the Sleüerlögik

The digital value determined in this way is transferred to an adder 7 given. Then a new change begins.

The digital memory and the digital-to-analog converter 5 are both designed for / j bits. A mean value is now to be calculated over 2 ^m conversions

ιϊ, the adder 7 must be designed for η + m bits. At the end of 2 ^m conversions, a value is obtained in adder 7 which, by simply placing a comma in front of the last m digital digits, becomes the arithmetic mean over these 2 ^m conversions

in corresponds. This value is shown on a display 8 issued.

In this example, the duration of the ramp function is equal to 2 ^m times the individual conversions. The maximum value of the ramp function corresponds to the size of the least significant bit of the digital-to-analog converter 5.

In the embodiment according to Figure 4 are the Digitizer, adder and display parts of a microprocessor 10. About this are how In the exemplary embodiment according to FIG. 3, a digital-to-analog converter 5 and a comparator 6 available. In this exemplary embodiment, the ramp function fed to the digital-to-analog converter 5 consists of a stepped curve and its individual steps generated before each conversion with the aid of the microprocessor 10 and the digital-to-analog converter 5 itself will. For this purpose, the switch S1 is closed, controlled by the microprocessor, before each conversion. At the same time, a digital input signal is fed to the digital-to-analog converter, the corresponding one Analog signal represents a measure for the respective stair step. This analog signal is used for the following Conversion saved. In the simplest case, a capacitor CI is sufficient for this; however, it can also

as a sample and hold element can be used. In this exemplary embodiment, the capacitor voltage is connected to a voltage divider with resistors R 1 and R 2. The actual ramp voltage UR _{amp is} tapped from this voltage divider.

The F i g. 5 shows an analog-to-digital converter according to FIG. 4, but this time for / r-analog signals U _e ι to U _e k-. Bit converter, but you want to achieve a resolution of about 12-bit, there is the great advantage that you can still get by with its 8-bit bus coupling between microprocessor 10 and digital-to-analog converter 5. This 8-bit -Bus connection corresponds to the usual size of the output port of microprocessors. The approximation program running in the microprocessor 10 also only needs to be designed for 8 bits. With the same final resolution, apart from the partly simpler and thus more cost-effective circuit elements, there is also the advantage of faster analog-digital conversion. In a digital-to-analog converter designed for the higher resolution, the individual

ilen digital digits via the 8-bit bus coupling of the Output porls are controlled in two successive steps «Also the approximation program would have to be designed for the higher number of digital digits.

For this purpose 2 sheets of drawings

Claims (6)

Patent claims: 1. Analog-to-digital conversion with gradual Approximation of a digital signal to an analog signal to be converted, one input one! Comparator the analog signal and the other input of the! Comparator the output signal a digital-to-analog converter is fed to the input side with the digital signal is acted upon, characterized in that the analog signal or the output signal of the digital-to-analog converter (5) has a ramp function is added, the maximum value of which is approximately the size of the least significant bit of the digital-to-analog converter (5) and its duration approximately a multiple of the duration of the gradual Approximation corresponds, and that during the period of the ramp function the arithmetic Average value of several digital signals present after a stepwise approximation in each case formed confused *. 2. Analog-to-digital conversion according to claim i, characterized in that the ramp function represents a stepped curve with equal steps and that the duration of each stage is equal to the duration of the stepwise approximation. 3. Analog-to-digital conversion according to claim 2, characterized in that the digital-to-analog converter (5) is activated briefly before the start of each approximation so that its output signal given to a memory element (Ci) (sample and hold), if necessary after a voltage division the respective ^; ! s benc * ^: .gten step value corresponds to the step curve 4. Analog-digital conversion according to one of the Claims 1 to 3, characterized in that the period of time over which the arithmetic mean is formed on the period of an interfering AC voltage superimposed on the analog signal is matched. 4η 5. Analog-to-digital converter with a digitizer, a comparator and a digital-to-analog converter for performing the analog-to-digital conversion according to one of claims 1 to 4, characterized in that the digitizer (1) and the digital-to-analog converter (5) are designed for n-bits, the converter (5) having a linearity of π + m-bits, and that an adder (7) is provided for η + m-bits. to which the signals of the digital value generator (1) are fed ^{after each approximation of 2 m in steps.} 6. Analog-to-digital converter according to claim 5, characterized in that the digital value generator (1) and the adder (7) parts of a microprocessor «. (10) are. «