DE2534801C2 - Verfahren zum Herstellen von dotierten Gebieten in einem Halbleiterkörper durch Ionen-Implantation - Google Patents

Verfahren zum Herstellen von dotierten Gebieten in einem Halbleiterkörper durch Ionen-Implantation

Info

Publication number
DE2534801C2
DE2534801C2 DE2534801A DE2534801A DE2534801C2 DE 2534801 C2 DE2534801 C2 DE 2534801C2 DE 2534801 A DE2534801 A DE 2534801A DE 2534801 A DE2534801 A DE 2534801A DE 2534801 C2 DE2534801 C2 DE 2534801C2
Authority
DE
Germany
Prior art keywords
photoresist
ion implantation
semiconductor body
layer thickness
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2534801A
Other languages
German (de)
English (en)
Other versions
DE2534801A1 (de
Inventor
Claude Yorktown Heights N.Y. Johnson jun.
San-Mei Poughkeepsie N.Y. Ku
Harold Vinell Peekskill N.Y. Lillja
Edward Shih-To Poughkeepsie N.Y. Pan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2534801A1 publication Critical patent/DE2534801A1/de
Priority to JP8045576A priority Critical patent/JPS5219430A/ja
Application granted granted Critical
Publication of DE2534801C2 publication Critical patent/DE2534801C2/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/40Treatment after imagewise removal, e.g. baking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/131Reactive ion etching rie

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Physical Vapour Deposition (AREA)
  • Drying Of Semiconductors (AREA)
DE2534801A 1974-11-25 1975-08-05 Verfahren zum Herstellen von dotierten Gebieten in einem Halbleiterkörper durch Ionen-Implantation Expired DE2534801C2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8045576A JPS5219430A (en) 1975-08-05 1976-07-08 Excavation shield provided with excavation messerrespecially* lining shield

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US527115A US3920483A (en) 1974-11-25 1974-11-25 Method of ion implantation through a photoresist mask

Publications (2)

Publication Number Publication Date
DE2534801A1 DE2534801A1 (de) 1976-05-26
DE2534801C2 true DE2534801C2 (de) 1982-09-02

Family

ID=24100152

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2534801A Expired DE2534801C2 (de) 1974-11-25 1975-08-05 Verfahren zum Herstellen von dotierten Gebieten in einem Halbleiterkörper durch Ionen-Implantation

Country Status (7)

Country Link
US (1) US3920483A (enExample)
JP (1) JPS5165874A (enExample)
CA (1) CA1043667A (enExample)
DE (1) DE2534801C2 (enExample)
FR (1) FR2292332A1 (enExample)
GB (1) GB1470285A (enExample)
IT (1) IT1042373B (enExample)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4018627A (en) * 1975-09-22 1977-04-19 Signetics Corporation Method for fabricating semiconductor devices utilizing oxide protective layer
DE2726813C2 (de) * 1976-06-17 1984-02-23 Motorola, Inc., 60196 Schaumburg, Ill. Verfahren zur Herstellung eines mit einem Muster versehenen Substrats
US5024918A (en) * 1976-12-23 1991-06-18 Texas Instruments Incorporated Heat activated dry development of photoresist by means of active oxygen atmosphere
US4111720A (en) * 1977-03-31 1978-09-05 International Business Machines Corporation Method for forming a non-epitaxial bipolar integrated circuit
US4125650A (en) * 1977-08-08 1978-11-14 International Business Machines Corporation Resist image hardening process
US4196228A (en) * 1978-06-10 1980-04-01 Monolithic Memories, Inc. Fabrication of high resistivity semiconductor resistors by ion implanatation
US4253888A (en) * 1978-06-16 1981-03-03 Matsushita Electric Industrial Co., Ltd. Pretreatment of photoresist masking layers resulting in higher temperature device processing
US4187331A (en) * 1978-08-24 1980-02-05 International Business Machines Corp. Fluorine plasma resist image hardening
US4241165A (en) * 1978-09-05 1980-12-23 Motorola, Inc. Plasma development process for photoresist
US4232057A (en) * 1979-03-01 1980-11-04 International Business Machines Corporation Semiconductor plasma oxidation
JPS588139B2 (ja) * 1979-05-31 1983-02-14 富士通株式会社 半導体装置の製造方法
US4376664A (en) * 1979-05-31 1983-03-15 Fujitsu Limited Method of producing a semiconductor device
FR2460037A1 (fr) * 1979-06-22 1981-01-16 Thomson Csf Procede d'auto-alignement de regions differemment dopees d'une structure de semi-conducteur
US4239787A (en) * 1979-06-25 1980-12-16 Bell Telephone Laboratories, Incorporated Semitransparent and durable photolithography masks
US4231811A (en) * 1979-09-13 1980-11-04 Intel Corporation Variable thickness self-aligned photoresist process
DE2945854A1 (de) * 1979-11-13 1981-05-21 Deutsche Itt Industries Gmbh, 7800 Freiburg Ionenimplantationsverfahren
US4259369A (en) * 1979-12-13 1981-03-31 International Business Machines Corporation Image hardening process
US4274909A (en) * 1980-03-17 1981-06-23 International Business Machines Corporation Method for forming ultra fine deep dielectric isolation
CA1174285A (en) * 1980-04-28 1984-09-11 Michelangelo Delfino Laser induced flow of integrated circuit structure materials
US4542037A (en) * 1980-04-28 1985-09-17 Fairchild Camera And Instrument Corporation Laser induced flow of glass bonded materials
US4390567A (en) * 1981-03-11 1983-06-28 The United States Of America As Represented By The United States Department Of Energy Method of forming graded polymeric coatings or films
DE3115029A1 (de) * 1981-04-14 1982-11-04 Deutsche Itt Industries Gmbh, 7800 Freiburg "verfahren zur herstellung eines integrierten bipolaren planartransistors"
JPS6034085B2 (ja) 1981-04-20 1985-08-07 松下電器産業株式会社 カラ−フイルタの製造方法
US4432132A (en) * 1981-12-07 1984-02-21 Bell Telephone Laboratories, Incorporated Formation of sidewall oxide layers by reactive oxygen ion etching to define submicron features
GB2117175A (en) * 1982-03-17 1983-10-05 Philips Electronic Associated Semiconductor device and method of manufacture
US4544416A (en) * 1983-08-26 1985-10-01 Texas Instruments Incorporated Passivation of silicon oxide during photoresist burnoff
US4552831A (en) * 1984-02-06 1985-11-12 International Business Machines Corporation Fabrication method for controlled via hole process
JPS62271435A (ja) * 1986-05-20 1987-11-25 Fujitsu Ltd レジストの剥離方法
US4772539A (en) * 1987-03-23 1988-09-20 International Business Machines Corporation High resolution E-beam lithographic technique
US5292671A (en) * 1987-10-08 1994-03-08 Matsushita Electric Industrial, Co., Ltd. Method of manufacture for semiconductor device by forming deep and shallow regions
JPH0712939B2 (ja) * 1988-09-28 1995-02-15 ホーヤ株式会社 ガラス成形体の製造方法
JPH06204162A (ja) * 1992-12-28 1994-07-22 Mitsubishi Electric Corp 半導体装置の製造方法および該方法に用いられるレジスト組成物
US5674357A (en) * 1995-08-30 1997-10-07 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor substrate cleaning process
US5783366A (en) * 1995-12-07 1998-07-21 Taiwan Semiconductor Manufacturing Company Ltd. Method for eliminating charging of photoresist on specimens during scanning electron microscope examination
US5962195A (en) * 1997-09-10 1999-10-05 Vanguard International Semiconductor Corporation Method for controlling linewidth by etching bottom anti-reflective coating
US10408467B2 (en) * 2014-03-12 2019-09-10 Bsh Home Appliances Corporation Home cooking appliance having flue boundary
CN104979171B (zh) * 2015-05-20 2018-01-16 中国航天科技集团公司第九研究院第七七一研究所 一种能够防止离子注入区边界硅棱剥落的离子注入方法
US12356836B2 (en) 2021-06-09 2025-07-08 Samsung Display Co., Ltd. Display device with multiple diffraction regions and method of manufacture

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3113896A (en) * 1961-01-31 1963-12-10 Space Technology Lab Inc Electron beam masking for etching electrical circuits
US3410776A (en) * 1966-02-01 1968-11-12 Lab For Electronics Inc Gas reaction apparatus
US3570112A (en) * 1967-12-01 1971-03-16 Nat Defence Canada Radiation hardening of insulated gate field effect transistors
US3653977A (en) * 1968-04-10 1972-04-04 Ion Physics Corp Method of preventing ion channeling in crystalline materials
US3615956A (en) * 1969-03-27 1971-10-26 Signetics Corp Gas plasma vapor etching process
US3575745A (en) * 1969-04-02 1971-04-20 Bryan H Hill Integrated circuit fabrication
US3860783A (en) * 1970-10-19 1975-01-14 Bell Telephone Labor Inc Ion etching through a pattern mask
US3663265A (en) * 1970-11-16 1972-05-16 North American Rockwell Deposition of polymeric coatings utilizing electrical excitation
JPS557008B2 (enExample) * 1972-02-29 1980-02-21
US3756861A (en) * 1972-03-13 1973-09-04 Bell Telephone Labor Inc Bipolar transistors and method of manufacture
US3793088A (en) * 1972-11-15 1974-02-19 Bell Telephone Labor Inc Compatible pnp and npn devices in an integrated circuit

Also Published As

Publication number Publication date
FR2292332B1 (enExample) 1977-12-16
FR2292332A1 (fr) 1976-06-18
JPS5238386B2 (enExample) 1977-09-28
CA1043667A (en) 1978-12-05
DE2534801A1 (de) 1976-05-26
IT1042373B (it) 1980-01-30
JPS5165874A (en) 1976-06-07
GB1470285A (en) 1977-04-14
US3920483A (en) 1975-11-18

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Legal Events

Date Code Title Description
OD Request for examination
D2 Grant after examination
8339 Ceased/non-payment of the annual fee