DE2506671C3 - Binärdaten-Handhabungsnetzwerk - Google Patents

Binärdaten-Handhabungsnetzwerk

Info

Publication number
DE2506671C3
DE2506671C3 DE2506671A DE2506671A DE2506671C3 DE 2506671 C3 DE2506671 C3 DE 2506671C3 DE 2506671 A DE2506671 A DE 2506671A DE 2506671 A DE2506671 A DE 2506671A DE 2506671 C3 DE2506671 C3 DE 2506671C3
Authority
DE
Germany
Prior art keywords
network
operand
mask
input
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2506671A
Other languages
German (de)
English (en)
Other versions
DE2506671B2 (de
DE2506671A1 (de
Inventor
Daniel J. Roseville Desmonds
Douglas A. Robbins
Donald P. Tate
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Control Data Corp
Original Assignee
Control Data Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Control Data Corp filed Critical Control Data Corp
Publication of DE2506671A1 publication Critical patent/DE2506671A1/de
Publication of DE2506671B2 publication Critical patent/DE2506671B2/de
Application granted granted Critical
Publication of DE2506671C3 publication Critical patent/DE2506671C3/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/764—Masking
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
DE2506671A 1974-06-03 1975-02-17 Binärdaten-Handhabungsnetzwerk Expired DE2506671C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US475533A US3906459A (en) 1974-06-03 1974-06-03 Binary data manipulation network having multiple function capability for computers

Publications (3)

Publication Number Publication Date
DE2506671A1 DE2506671A1 (de) 1975-12-11
DE2506671B2 DE2506671B2 (de) 1980-04-30
DE2506671C3 true DE2506671C3 (de) 1981-01-15

Family

ID=23888000

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2506671A Expired DE2506671C3 (de) 1974-06-03 1975-02-17 Binärdaten-Handhabungsnetzwerk

Country Status (7)

Country Link
US (1) US3906459A (Direct)
JP (1) JPS537770B2 (Direct)
CA (1) CA1005924A (Direct)
DE (1) DE2506671C3 (Direct)
FR (1) FR2275825A1 (Direct)
GB (1) GB1475962A (Direct)
NL (1) NL172798C (Direct)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4139899A (en) * 1976-10-18 1979-02-13 Burroughs Corporation Shift network having a mask generator and a rotator
US4194241A (en) * 1977-07-08 1980-03-18 Xerox Corporation Bit manipulation circuitry in a microprocessor
US4219874A (en) * 1978-03-17 1980-08-26 Gusev Valery Data processing device for variable length multibyte data fields
US4180861A (en) * 1978-03-31 1979-12-25 Ncr Corporation Selectively operable mask generator
US4569016A (en) * 1983-06-30 1986-02-04 International Business Machines Corporation Mechanism for implementing one machine cycle executable mask and rotate instructions in a primitive instruction set computing system
JPS6476220A (en) * 1987-09-17 1989-03-22 Ibm Bit mask generation circuit
US5410719A (en) * 1992-05-27 1995-04-25 Hewlett-Packard Company Field compositor for merging data and including cells each receiving three control and two data inputs and generating one control and one data output therefrom
US5487159A (en) * 1993-12-23 1996-01-23 Unisys Corporation System for processing shift, mask, and merge operations in one instruction
US6061783A (en) * 1996-11-13 2000-05-09 Nortel Networks Corporation Method and apparatus for manipulation of bit fields directly in a memory source
US20030231660A1 (en) * 2002-06-14 2003-12-18 Bapiraju Vinnakota Bit-manipulation instructions for packet processing
US20040254966A1 (en) * 2003-05-16 2004-12-16 Daewoo Educational Foundation Bit manipulation operation circuit and method in programmable processor
KR20070088190A (ko) * 2006-02-24 2007-08-29 삼성전자주식회사 멀티미디어 데이터 처리를 위한 서브워드 병렬 처리 방법
FR3101981B1 (fr) * 2019-10-11 2021-11-12 St Microelectronics Grenoble 2 Extraction et insertion de mots binaires

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3430202A (en) * 1964-10-07 1969-02-25 Bell Telephone Labor Inc Data processor utilizing combined order instructions
US3343138A (en) * 1964-10-07 1967-09-19 Bell Telephone Labor Inc Data processor employing double indexing
US3370274A (en) * 1964-12-30 1968-02-20 Bell Telephone Labor Inc Data processor control utilizing tandem signal operations
US3387278A (en) * 1965-10-20 1968-06-04 Bell Telephone Labor Inc Data processor with simultaneous testing and indexing on conditional transfer operations

Also Published As

Publication number Publication date
NL7506503A (nl) 1975-12-05
AU8153975A (en) 1976-12-02
NL172798C (nl) 1983-10-17
DE2506671B2 (de) 1980-04-30
NL172798B (nl) 1983-05-16
US3906459A (en) 1975-09-16
FR2275825A1 (fr) 1976-01-16
JPS50159941A (Direct) 1975-12-24
GB1475962A (en) 1977-06-10
JPS537770B2 (Direct) 1978-03-22
FR2275825B1 (Direct) 1977-12-02
CA1005924A (en) 1977-02-22
DE2506671A1 (de) 1975-12-11

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8328 Change in the person/name/address of the agent

Free format text: HENKEL, G., DR.PHIL. FEILER, L., DR.RER.NAT. HAENZEL, W., DIPL.-ING., PAT.-ANW., 8000 MUENCHEN

8339 Ceased/non-payment of the annual fee