DE2130002A1 - Schaltungsanordnung mit mehreren Feldeffekttransistoren - Google Patents
Schaltungsanordnung mit mehreren FeldeffekttransistorenInfo
- Publication number
- DE2130002A1 DE2130002A1 DE19712130002 DE2130002A DE2130002A1 DE 2130002 A1 DE2130002 A1 DE 2130002A1 DE 19712130002 DE19712130002 DE 19712130002 DE 2130002 A DE2130002 A DE 2130002A DE 2130002 A1 DE2130002 A1 DE 2130002A1
- Authority
- DE
- Germany
- Prior art keywords
- transistor
- transistors
- current path
- voltage
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005669 field effect Effects 0.000 title claims description 13
- 230000015654 memory Effects 0.000 description 46
- 239000011159 matrix material Substances 0.000 description 6
- 239000004020 conductor Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/04106—Modifications for accelerating switching without feedback from the output circuit to the control circuit in field-effect transistor switches
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US7350770A | 1970-09-18 | 1970-09-18 | |
| US13632771A | 1971-04-22 | 1971-04-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE2130002A1 true DE2130002A1 (de) | 1972-03-30 |
Family
ID=26754545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19712130002 Pending DE2130002A1 (de) | 1970-09-18 | 1971-06-16 | Schaltungsanordnung mit mehreren Feldeffekttransistoren |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US3638039A (OSRAM) |
| DE (1) | DE2130002A1 (OSRAM) |
| FR (1) | FR2106593A1 (OSRAM) |
| GB (1) | GB1338959A (OSRAM) |
| NL (1) | NL7107967A (OSRAM) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3801964A (en) * | 1972-02-24 | 1974-04-02 | Advanced Memory Sys Inc | Semiconductor memory with address decoding |
| US3789243A (en) * | 1972-07-05 | 1974-01-29 | Ibm | Monolithic memory sense amplifier/bit driver having active bit/sense line pull-up |
| US3879621A (en) * | 1973-04-18 | 1975-04-22 | Ibm | Sense amplifier |
| US3967136A (en) * | 1974-06-07 | 1976-06-29 | Bell Telephone Laboratories, Incorporated | Input circuit for semiconductor charge transfer device circulating memory apparatus |
| US4110840A (en) * | 1976-12-22 | 1978-08-29 | Motorola Inc. | Sense line charging system for random access memory |
| US4340943A (en) * | 1979-05-31 | 1982-07-20 | Tokyo Shibaura Denki Kabushiki Kaisha | Memory device utilizing MOS FETs |
| DE2926050C2 (de) * | 1979-06-28 | 1981-10-01 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren und Schaltungsanordnung zum Lesen Und/oder Schreiben eines integrierten Halbleiterspeichers mit Speicherzellen in MTL-Technik |
| NL8005756A (nl) * | 1980-10-20 | 1982-05-17 | Philips Nv | Inrichting voor het opwekken van een reeks binair gewogen waarden van een elektrische grootheid. |
| US4556961A (en) * | 1981-05-26 | 1985-12-03 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor memory with delay means to reduce peak currents |
| JPS63144488A (ja) * | 1986-12-06 | 1988-06-16 | Fujitsu Ltd | 半導体記憶装置 |
| US4868903A (en) * | 1988-04-15 | 1989-09-19 | General Electric Company | Safe logic zero and one supply for CMOS integrated circuits |
| JP4459257B2 (ja) * | 2007-06-27 | 2010-04-28 | 株式会社東芝 | 半導体装置 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3343130A (en) * | 1964-08-27 | 1967-09-19 | Fabri Tek Inc | Selection matrix line capacitance recharge system |
| US3275996A (en) * | 1965-12-30 | 1966-09-27 | Rca Corp | Driver-sense circuit arrangement |
| US3535699A (en) * | 1968-01-15 | 1970-10-20 | Ibm | Complenmentary transistor memory cell using leakage current to sustain quiescent condition |
| US3599180A (en) * | 1968-11-29 | 1971-08-10 | Gen Instrument Corp | Random access read-write memory system having data refreshing capabilities and memory cell therefor |
-
1970
- 1970-09-18 US US73507A patent/US3638039A/en not_active Expired - Lifetime
-
1971
- 1971-04-22 US US136327A patent/US3688264A/en not_active Expired - Lifetime
- 1971-06-10 NL NL7107967A patent/NL7107967A/xx unknown
- 1971-06-16 GB GB2815971A patent/GB1338959A/en not_active Expired
- 1971-06-16 DE DE19712130002 patent/DE2130002A1/de active Pending
- 1971-06-18 FR FR7122345A patent/FR2106593A1/fr not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| FR2106593A1 (OSRAM) | 1972-05-05 |
| US3638039A (en) | 1972-01-25 |
| NL7107967A (OSRAM) | 1972-03-21 |
| GB1338959A (en) | 1973-11-28 |
| US3688264A (en) | 1972-08-29 |
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