DE2100119A1 - Verfahren zum Herstellen eines Halbleiterschaltungsbausteins - Google Patents

Verfahren zum Herstellen eines Halbleiterschaltungsbausteins

Info

Publication number
DE2100119A1
DE2100119A1 DE19712100119 DE2100119A DE2100119A1 DE 2100119 A1 DE2100119 A1 DE 2100119A1 DE 19712100119 DE19712100119 DE 19712100119 DE 2100119 A DE2100119 A DE 2100119A DE 2100119 A1 DE2100119 A1 DE 2100119A1
Authority
DE
Germany
Prior art keywords
fusible
conductors
arms
fusible conductors
certain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19712100119
Other languages
German (de)
English (en)
Inventor
Edward Joseph Cranbury; Bums Joseph Robert Trenton N.J.; Boleky (V.StA.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of DE2100119A1 publication Critical patent/DE2100119A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493—Fuses, i.e. interconnections changeable from conductive to non-conductive
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/03—Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
DE19712100119 1970-01-02 1971-01-04 Verfahren zum Herstellen eines Halbleiterschaltungsbausteins Pending DE2100119A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US20670A 1970-01-02 1970-01-02

Publications (1)

Publication Number Publication Date
DE2100119A1 true DE2100119A1 (de) 1971-07-08

Family

ID=21690395

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19712100119 Pending DE2100119A1 (de) 1970-01-02 1971-01-04 Verfahren zum Herstellen eines Halbleiterschaltungsbausteins

Country Status (5)

Country Link
US (1) US3646666A (https=)
JP (1) JPS4827508B1 (https=)
CA (1) CA920720A (https=)
DE (1) DE2100119A1 (https=)
GB (1) GB1319520A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0388341A3 (en) * 1989-03-14 1991-07-17 International Business Machines Corporation Method and apparatus for causing an open circuit in a conductive line

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3807037A (en) * 1972-11-30 1974-04-30 Us Army Pocketable direct current electroluminescent display device addressed by mos and mnos circuitry
US3807036A (en) * 1972-11-30 1974-04-30 Us Army Direct current electroluminescent panel using amorphus semiconductors for digitally addressing alpha-numeric displays
JPS5649178U (https=) * 1979-09-21 1981-05-01
JPS61138689U (https=) * 1984-10-25 1986-08-28
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
US6815256B2 (en) * 2002-12-23 2004-11-09 Intel Corporation Silicon building blocks in integrated circuit packaging

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR958639A (https=) * 1945-09-22 1950-03-15
US3028659A (en) * 1957-12-27 1962-04-10 Bosch Arma Corp Storage matrix
DE1266353B (de) * 1964-03-13 1968-04-18 Bbc Brown Boveri & Cie Matrixfoermige Anordnung von Oxydschichtdioden zur Verwendung als manipulierbarer Festwertspeicher oder Informationsumsetzer
US3562586A (en) * 1968-11-15 1971-02-09 Ite Imperial Corp Thermal analogue protection for capacitors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0388341A3 (en) * 1989-03-14 1991-07-17 International Business Machines Corporation Method and apparatus for causing an open circuit in a conductive line

Also Published As

Publication number Publication date
GB1319520A (en) 1973-06-06
JPS4827508B1 (https=) 1973-08-23
US3646666A (en) 1972-03-07
CA920720A (en) 1973-02-06

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