DE2034681A1 - Halbleiterscheibe mit vorgeformten goldenen Lotbereichen - Google Patents

Halbleiterscheibe mit vorgeformten goldenen Lotbereichen

Info

Publication number
DE2034681A1
DE2034681A1 DE19702034681 DE2034681A DE2034681A1 DE 2034681 A1 DE2034681 A1 DE 2034681A1 DE 19702034681 DE19702034681 DE 19702034681 DE 2034681 A DE2034681 A DE 2034681A DE 2034681 A1 DE2034681 A1 DE 2034681A1
Authority
DE
Germany
Prior art keywords
semiconductor wafer
areas
golden
soldering
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19702034681
Other languages
English (en)
Inventor
Robert Sinclair Phoenix Ariz Foote (V St A ) M
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE2034681A1 publication Critical patent/DE2034681A1/de
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/05644—Gold [Au] as principal constituent
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    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T428/12528—Semiconductor component
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    • Y10T428/12889—Au-base component

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
  • Dicing (AREA)
  • Electroplating And Plating Baths Therefor (AREA)

Description

Mein Zeichen= «"^»5
BEZüGSZEICHENLISTE
Beiugszeichen BexeJchnung
10 Halbleiterscheibe
12 Oberfläche
14 Anreissbereich
16 Halbleiterplattchen
18 hauchdünner Goldüberzug
20 Unterfläche
22)
24)		 Lötbereich
26 Halbleiterplattchen
28 Anreissbereich
30 Halbleiterplattchen
32 Lötbereich
34 hauchdünner Goldüberzug
36 Sockel
38 Metallteil
40 Goldschicht
42 • Silberschicht
44 Goldschicht
Bezelchmingsänderung
Die Besugseeichenliste wird zur Erleichterung der Bearbeitung beigefügt. Sollten amtsseitig andere Bezeichnungen für »weckmäseig erachtet werden, so wird hSflieh um eine-entsprechende Angabe auf der Zweitschrift und um deren Rücksendung gebeten«
10-9.8 UY 13 9-5
Ji
Leerseite

Claims (1)

  1. Patentansprüche
    Halbleiterscheibe mit vorgeformten goldenen Lötbereichen, dadurch, g e k β η η a © 1 c h η et, dass die Halbleiter~ schelfo© auf d©r einen Ob©rfläoha Anraissbereiche aufweist, die die fielzahl von Halbieiterplättcheii voneinander trennen, und auf der anderen Oberfläche ©inen hauchdünnen Goldüberzug besitzt„ dass ein© Vielsaal von vorgeformten goldenen Lötbareichen auf diesem Goldübersug angeordnet sind, wobei diese.Lötbereicke innerhalb der von den auf der gegenüberliegenden Oberfläche befindlichen Anreisebereichen umschlossen sind, und diese vorgeformten Lötbereiche voneinander durch einen Zwischenraum getrennt sind, der auf die Anreissbereiche ausgerichtet ist»
    Halbleiterscheibe nach Anspruch 1, dadurch g e k β η η zeichnet, dass die goldenen vorgeformten Lötbe-? . reiche eine Dick® von ungefähr 2,5 ° 10*"' mm bis ungefähr
    1 · 10 am aufweisen* f
    Halbleiterecheib© nach Anspruch 1, dadurch g e k e η η zeichnet, dass öJ.e vorgeformten goldenen Lötbereiche ungefähr 5 " 10*"* ram bis 6,3 · 10"* ßiia dick sind»
    Halbleiterscheibe nach einem der Anspruch« 1 biß 5f dadurch go k e η a ζ ei c h η β t, dass die vorgeformten goldenen Lötbereiche voneinander durch einen Abstand getrennt ßind, der zwischen etwa 1,5 " 10" mm und'etwa
    2 · ΙΟ"*1 am liegt/
    1098 U/139 5
    MUOP-385
    Halbleiterscheibe nach einem der Anspruch® 1 bis 3, dadurch gekennzeichnet, dass die vorgeformten goldenen Lötbereich© etwa 1,7 · 10 mm voneinander gstrsant sind.
    10 3 8 14/1395
DE19702034681 1969-07-23 1970-07-13 Halbleiterscheibe mit vorgeformten goldenen Lotbereichen Pending DE2034681A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US84412069A 1969-07-23 1969-07-23

Publications (1)

Publication Number Publication Date
DE2034681A1 true DE2034681A1 (de) 1971-04-01

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ID=25291869

Family Applications (2)

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DE7026304U Expired DE7026304U (de) 1969-07-23 1970-07-13 Halbleiterscheibe mit vorgeformten goldenen loetbereichen.
DE19702034681 Pending DE2034681A1 (de) 1969-07-23 1970-07-13 Halbleiterscheibe mit vorgeformten goldenen Lotbereichen

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Application Number Title Priority Date Filing Date
DE7026304U Expired DE7026304U (de) 1969-07-23 1970-07-13 Halbleiterscheibe mit vorgeformten goldenen loetbereichen.

Country Status (4)

Country Link
US (1) US3607148A (de)
JP (1) JPS4827492B1 (de)
DE (2) DE7026304U (de)
NL (1) NL7010724A (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3231732A1 (de) * 1982-08-26 1984-03-01 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Elektrischer kontakt

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3919709A (en) * 1974-11-13 1975-11-11 Gen Electric Metallic plate-semiconductor assembly and method for the manufacture thereof
US4035526A (en) * 1975-08-20 1977-07-12 General Motors Corporation Evaporated solderable multilayer contact for silicon semiconductor
US4491264A (en) * 1982-06-01 1985-01-01 Rca Corporation Method of soldering a light emitting device to a substrate

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3025439A (en) * 1960-09-22 1962-03-13 Texas Instruments Inc Mounting for silicon semiconductor device
GB1027525A (de) * 1962-03-02
US3323956A (en) * 1964-03-16 1967-06-06 Hughes Aircraft Co Method of manufacturing semiconductor devices
US3386894A (en) * 1964-09-28 1968-06-04 Northern Electric Co Formation of metallic contacts
US3387360A (en) * 1965-04-01 1968-06-11 Sony Corp Method of making a semiconductor device
US3495322A (en) * 1967-07-20 1970-02-17 Motorola Inc Process for bonding a silicon wafer to a ceramic substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3231732A1 (de) * 1982-08-26 1984-03-01 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Elektrischer kontakt

Also Published As

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DE7026304U (de) 1970-11-12
NL7010724A (de) 1971-01-26
US3607148A (en) 1971-09-21
JPS4827492B1 (de) 1973-08-23

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