DE19882363T1 - Umgehungscache mit mehreren Ports - Google Patents

Umgehungscache mit mehreren Ports

Info

Publication number
DE19882363T1
DE19882363T1 DE19882363T DE19882363T DE19882363T1 DE 19882363 T1 DE19882363 T1 DE 19882363T1 DE 19882363 T DE19882363 T DE 19882363T DE 19882363 T DE19882363 T DE 19882363T DE 19882363 T1 DE19882363 T1 DE 19882363T1
Authority
DE
Germany
Prior art keywords
multiple ports
bypass cache
cache
bypass
ports
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19882363T
Other languages
English (en)
Other versions
DE19882363B4 (de
Inventor
Steve M Curtis
Robert J Murray
Helen Opie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE19882363T1 publication Critical patent/DE19882363T1/de
Application granted granted Critical
Publication of DE19882363B4 publication Critical patent/DE19882363B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30141—Implementation provisions of register files, e.g. ports
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/355—Indexed addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G06F9/3832—Value prediction for operands; operand history buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE19882363T 1997-05-02 1998-04-30 Prozessor mit einem Umgehungsnetzwerk und mehreren Ports Expired - Fee Related DE19882363B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/850,686 1997-05-02
US08/850,686 US6000016A (en) 1997-05-02 1997-05-02 Multiported bypass cache in a bypass network
PCT/US1998/008892 WO1998050860A1 (en) 1997-05-02 1998-04-30 Multiported bypass cache

Publications (2)

Publication Number Publication Date
DE19882363T1 true DE19882363T1 (de) 2000-04-13
DE19882363B4 DE19882363B4 (de) 2007-02-01

Family

ID=25308845

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19882363T Expired - Fee Related DE19882363B4 (de) 1997-05-02 1998-04-30 Prozessor mit einem Umgehungsnetzwerk und mehreren Ports

Country Status (7)

Country Link
US (1) US6000016A (de)
KR (1) KR100338423B1 (de)
AU (1) AU7174498A (de)
DE (1) DE19882363B4 (de)
GB (1) GB2339314B (de)
HK (1) HK1025168A1 (de)
WO (1) WO1998050860A1 (de)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7382736B2 (en) 1999-01-12 2008-06-03 Mcdata Corporation Method for scoring queued frames for selective transmission through a switch
JP2001222463A (ja) * 2000-02-10 2001-08-17 Hitachi Ltd メモリ装置
US7543077B1 (en) * 2000-09-19 2009-06-02 Stragent, Llc Ternary content addressable memory embedded in a central processing unit
US7596139B2 (en) 2000-11-17 2009-09-29 Foundry Networks, Inc. Backplane interface adapter with error control and redundant fabric
US7236490B2 (en) 2000-11-17 2007-06-26 Foundry Networks, Inc. Backplane interface adapter
US7002980B1 (en) * 2000-12-19 2006-02-21 Chiaro Networks, Ltd. System and method for router queue and congestion management
KR100370140B1 (ko) * 2000-12-30 2003-01-30 주식회사 하이닉스반도체 메모리 소자에서의 ｘ１６의 동작을 ｘ４ 및 ｘ８동작으로 전환하는 방법
US6438017B1 (en) * 2001-01-09 2002-08-20 Hewlett-Packard Company Read/write eight-slot CAM with interleaving
US6934816B2 (en) * 2001-08-07 2005-08-23 Integrated Device Technology, Inc. Integrated circuit memory devices having asynchronous flow-through capability
US7093083B1 (en) 2001-12-18 2006-08-15 Integrated Device Technology, Inc. Integrated circuit memory devices having asynchronous flow-through capability
US7649885B1 (en) 2002-05-06 2010-01-19 Foundry Networks, Inc. Network routing system for enhanced efficiency and monitoring capability
US7187687B1 (en) 2002-05-06 2007-03-06 Foundry Networks, Inc. Pipeline method and system for switching packets
US20120155466A1 (en) 2002-05-06 2012-06-21 Ian Edward Davis Method and apparatus for efficiently processing data packets in a computer network
US7266117B1 (en) 2002-05-06 2007-09-04 Foundry Networks, Inc. System architecture for very fast ethernet blade
US7468975B1 (en) 2002-05-06 2008-12-23 Foundry Networks, Inc. Flexible method for processing data packets in a network routing system for enhanced efficiency and monitoring capability
US20040059874A1 (en) * 2002-09-24 2004-03-25 Intel Corporation High throughput modular pipelined memory array
US6901072B1 (en) 2003-05-15 2005-05-31 Foundry Networks, Inc. System and method for high speed packet transmission implementing dual transmit and receive pipelines
US7096345B1 (en) * 2003-09-26 2006-08-22 Marvell International Ltd. Data processing system with bypass reorder buffer having non-bypassable locations and combined load/store arithmetic logic unit and processing method thereof
US7817659B2 (en) 2004-03-26 2010-10-19 Foundry Networks, Llc Method and apparatus for aggregating input data streams
US8730961B1 (en) 2004-04-26 2014-05-20 Foundry Networks, Llc System and method for optimizing router lookup
US7657703B1 (en) 2004-10-29 2010-02-02 Foundry Networks, Inc. Double density content addressable memory (CAM) lookup scheme
GB2426084A (en) * 2005-05-13 2006-11-15 Agilent Technologies Inc Updating data in a dual port memory
US7681017B2 (en) * 2005-11-01 2010-03-16 Lsi Corporation Pseudo pipeline and pseudo pipelined SDRAM controller
US8448162B2 (en) 2005-12-28 2013-05-21 Foundry Networks, Llc Hitless software upgrades
US7903654B2 (en) 2006-08-22 2011-03-08 Foundry Networks, Llc System and method for ECMP load sharing
US7478226B1 (en) * 2006-09-29 2009-01-13 Transmeta Corporation Processing bypass directory tracking system and method
US7774583B1 (en) * 2006-09-29 2010-08-10 Parag Gupta Processing bypass register file system and method
US8238255B2 (en) 2006-11-22 2012-08-07 Foundry Networks, Llc Recovering from failures without impact on data traffic in a shared bus architecture
US20090279441A1 (en) 2007-01-11 2009-11-12 Foundry Networks, Inc. Techniques for transmitting failure detection protocol packets
GB0702571D0 (en) * 2007-02-09 2007-03-21 Texas Instruments Ltd Data transfer circuit
GB0702573D0 (en) * 2007-02-09 2007-03-21 Texas Instruments Ltd Data transfer circuit
US8271859B2 (en) * 2007-07-18 2012-09-18 Foundry Networks Llc Segmented CRC design in high speed networks
US8037399B2 (en) 2007-07-18 2011-10-11 Foundry Networks, Llc Techniques for segmented CRC design in high speed networks
US8149839B1 (en) 2007-09-26 2012-04-03 Foundry Networks, Llc Selection of trunk ports and paths using rotation
US20090249035A1 (en) * 2008-03-28 2009-10-01 International Business Machines Corporation Multi-cycle register file bypass
US8090901B2 (en) 2009-05-14 2012-01-03 Brocade Communications Systems, Inc. TCAM management approach that minimize movements
US8599850B2 (en) 2009-09-21 2013-12-03 Brocade Communications Systems, Inc. Provisioning single or multistage networks using ethernet service instances (ESIs)
CN102141905B (zh) * 2010-01-29 2015-02-25 上海芯豪微电子有限公司 一种处理器体系结构
US9170638B2 (en) * 2010-12-16 2015-10-27 Advanced Micro Devices, Inc. Method and apparatus for providing early bypass detection to reduce power consumption while reading register files of a processor
US9223965B2 (en) * 2013-12-10 2015-12-29 International Business Machines Corporation Secure generation and management of a virtual card on a mobile device
US9235692B2 (en) 2013-12-13 2016-01-12 International Business Machines Corporation Secure application debugging
US9251330B2 (en) 2014-04-09 2016-02-02 International Business Machines Corporation Secure management of a smart card
US10475026B2 (en) 2014-05-16 2019-11-12 International Business Machines Corporation Secure management of transactions using a smart/virtual card
CN108009976A (zh) * 2016-10-27 2018-05-08 超威半导体公司 用于图形处理单元(gpu)计算的超级单指令多数据(超级simd)

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155816A (en) * 1989-02-10 1992-10-13 Intel Corporation Pipelined apparatus and method for controlled loading of floating point data in a microprocessor
JP3018038B2 (ja) * 1990-01-18 2000-03-13 三菱電機株式会社 キャッシュを有するデータ処理装置
CA2045756C (en) * 1990-06-29 1996-08-20 Gregg Bouchard Combined queue for invalidates and return data in multiprocessor system
US5404482A (en) * 1990-06-29 1995-04-04 Digital Equipment Corporation Processor and method for preventing access to a locked memory block by recording a lock in a content addressable memory with outstanding cache fills
JPH04275628A (ja) * 1991-03-01 1992-10-01 Mitsubishi Electric Corp 演算処理装置
JP2539974B2 (ja) * 1991-11-20 1996-10-02 富士通株式会社 情報処理装置におけるレジスタの読出制御方式
US5542058A (en) * 1992-07-06 1996-07-30 Digital Equipment Corporation Pipelined computer with operand context queue to simplify context-dependent execution flow
US5454094A (en) * 1993-06-24 1995-09-26 Hal Computer Systems, Inc. Method and apparatus for detecting multiple matches in a content addressable memory
US5544342A (en) * 1993-06-30 1996-08-06 International Business Machines Corporation System and method for prefetching information in a processing system
JPH0756815A (ja) * 1993-07-28 1995-03-03 Internatl Business Mach Corp <Ibm> キャッシュ動作方法及びキャッシュ
US5752069A (en) * 1995-08-31 1998-05-12 Advanced Micro Devices, Inc. Superscalar microprocessor employing away prediction structure

Also Published As

Publication number Publication date
HK1025168A1 (en) 2000-11-03
WO1998050860A1 (en) 1998-11-12
US6000016A (en) 1999-12-07
DE19882363B4 (de) 2007-02-01
GB9925870D0 (en) 1999-12-29
KR100338423B1 (ko) 2002-05-27
KR20010012167A (ko) 2001-02-15
GB2339314B (en) 2001-11-14
AU7174498A (en) 1998-11-27
GB2339314A (en) 2000-01-19

Similar Documents

Publication Publication Date Title
DE19882363T1 (de) Umgehungscache mit mehreren Ports
DE69827870D1 (de) Drebohrmeissel mit beweglichen Formation-eingreifenden Elementen
DE69730392D1 (de) Verbindungsmatrix basierte Multikosten-Leitweglengkung
DE69728778D1 (de) Weichspüler mit verbesserter leistung
DE69637892D1 (de) Anordnung mit Alpha-Hexathienyl
DE69825451D1 (de) Kanüle mit mehreren leitungen
DE59603019D1 (de) Leistungsregelung mit load-sensing
DE69810132D1 (de) Multiport drams mit internen cache-speichern
ID27776A (id) Bahan dengan efek antidepresan
DE29720737U1 (de) Zielfernrohr
DE69812223D1 (de) Blockierungsfreier Pipeline-Cachespeicher
ID16558A (id) Sistim pengeboran yang dikendalikan dengan peredam kejut
DE69931695D1 (de) Geldautomat mit front- und heck-beschickbaren Konfigurationen
DE69816360D1 (de) Nachkühler mit integrierter Bypass-linie
DE29720650U1 (de) Fahrradlampe mit Mehrfachfunktion
DE69703340T2 (de) Heterozyklische monoazofarbstoffe
DE29705018U1 (de) Thermo-Bypass-Ventil
DE29720492U1 (de) Steuerungsanordnung mit separatem Multiplexer
DE29706735U1 (de) Beleuchtungselement mit veränderlichen Lichteffekten
DE69809877T2 (de) Baggerfahrzeug mit rutschlenkung
KR970049457U (ko) 1인승 자전거 겸용한 2인승 자전거
DE59911463D1 (de) Fahrzeugleitvorrichtung mit Fahrstreckenabtastung
DE29805264U1 (de) Konstruktionselement mit armiertem Stützkern
DE29817756U1 (de) Abgasleitungsanordnung mit Wärmetauscher-Katalysator-Einheit
KR970010230U (ko) 복합기능을 가진 밸브

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8607 Notification of search results after publication
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee