DE19828653A1 - Chipmodul zum Einbau in einen Chipkartenträger sowie Verfahren zu dessen Herstellung - Google Patents

Chipmodul zum Einbau in einen Chipkartenträger sowie Verfahren zu dessen Herstellung

Info

Publication number
DE19828653A1
DE19828653A1 DE19828653A DE19828653A DE19828653A1 DE 19828653 A1 DE19828653 A1 DE 19828653A1 DE 19828653 A DE19828653 A DE 19828653A DE 19828653 A DE19828653 A DE 19828653A DE 19828653 A1 DE19828653 A1 DE 19828653A1
Authority
DE
Germany
Prior art keywords
chip
semiconductor chip
chip module
leadframe
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19828653A
Other languages
German (de)
English (en)
Inventor
Frank Pueschner
Erik Heinemann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE19828653A priority Critical patent/DE19828653A1/de
Priority to PCT/DE1999/001744 priority patent/WO2000000929A2/fr
Publication of DE19828653A1 publication Critical patent/DE19828653A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/183—Connection portion, e.g. seal
    • H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Theoretical Computer Science (AREA)
  • Die Bonding (AREA)
DE19828653A 1998-06-26 1998-06-26 Chipmodul zum Einbau in einen Chipkartenträger sowie Verfahren zu dessen Herstellung Withdrawn DE19828653A1 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE19828653A DE19828653A1 (de) 1998-06-26 1998-06-26 Chipmodul zum Einbau in einen Chipkartenträger sowie Verfahren zu dessen Herstellung
PCT/DE1999/001744 WO2000000929A2 (fr) 1998-06-26 1999-06-15 Module puce a monter dans un support de carte a puce et son procede de production

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19828653A DE19828653A1 (de) 1998-06-26 1998-06-26 Chipmodul zum Einbau in einen Chipkartenträger sowie Verfahren zu dessen Herstellung

Publications (1)

Publication Number Publication Date
DE19828653A1 true DE19828653A1 (de) 2000-01-05

Family

ID=7872189

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19828653A Withdrawn DE19828653A1 (de) 1998-06-26 1998-06-26 Chipmodul zum Einbau in einen Chipkartenträger sowie Verfahren zu dessen Herstellung

Country Status (2)

Country Link
DE (1) DE19828653A1 (fr)
WO (1) WO2000000929A2 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2805639A1 (fr) * 2000-02-29 2001-08-31 Schlumberger Systems & Service Procede de fixation d'un module a un corps de carte
DE10016135A1 (de) * 2000-03-31 2001-10-18 Infineon Technologies Ag Gehäusebaugruppe für ein elektronisches Bauteil
WO2002071326A1 (fr) * 2001-03-07 2002-09-12 Infineon Technologies Ag Module de carte a puce
WO2003017196A1 (fr) * 2001-08-10 2003-02-27 Infineon Technologies Ag Etablissement des contacts de puces semiconductrices dans des cartes a puce

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD214721A1 (de) * 1983-04-15 1984-10-17 Funkwerk Erfurt Veb K Montage-anordnung fuer halbleiterbauelemente
US5214307A (en) * 1991-07-08 1993-05-25 Micron Technology, Inc. Lead frame for semiconductor devices having improved adhesive bond line control
DE19649893A1 (de) * 1995-12-01 1997-06-05 Namics Corp Elektrisch leitender Klebstoff und Schaltung, die diesen verwendet
DE19622684A1 (de) * 1996-06-05 1997-12-11 Siemens Ag Verfahren zur Herstellung mechanisch fester Klebstoffverbindungen zwischen Oberflächen
EP0840369A1 (fr) * 1995-06-30 1998-05-06 Kabushiki Kaisha Toshiba Composant electronique et son procede de fabrication
DE19651862A1 (de) * 1996-12-13 1998-06-18 Bosch Gmbh Robert Verfahren zum Reflowlöten von mit SMD-Bauelementen bestückten Leiterplatten

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4143456A (en) * 1976-06-28 1979-03-13 Citizen Watch Commpany Ltd. Semiconductor device insulation method
US5232962A (en) * 1991-10-09 1993-08-03 Quantum Materials, Inc. Adhesive bonding composition with bond line limiting spacer system
DE4325458A1 (de) * 1993-07-29 1995-02-09 Orga Bond Technik Gmbh Trägerelement für einen IC-Baustein

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD214721A1 (de) * 1983-04-15 1984-10-17 Funkwerk Erfurt Veb K Montage-anordnung fuer halbleiterbauelemente
US5214307A (en) * 1991-07-08 1993-05-25 Micron Technology, Inc. Lead frame for semiconductor devices having improved adhesive bond line control
EP0840369A1 (fr) * 1995-06-30 1998-05-06 Kabushiki Kaisha Toshiba Composant electronique et son procede de fabrication
DE19649893A1 (de) * 1995-12-01 1997-06-05 Namics Corp Elektrisch leitender Klebstoff und Schaltung, die diesen verwendet
DE19622684A1 (de) * 1996-06-05 1997-12-11 Siemens Ag Verfahren zur Herstellung mechanisch fester Klebstoffverbindungen zwischen Oberflächen
DE19651862A1 (de) * 1996-12-13 1998-06-18 Bosch Gmbh Robert Verfahren zum Reflowlöten von mit SMD-Bauelementen bestückten Leiterplatten

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
US-Z.: L. Gilg, IEEE Circuits and Devices, July 1995, S. 32-37 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2805639A1 (fr) * 2000-02-29 2001-08-31 Schlumberger Systems & Service Procede de fixation d'un module a un corps de carte
WO2001065482A1 (fr) * 2000-02-29 2001-09-07 Schlumberger Systemes Procede de fixation d'un module a un corps de carte a puce
DE10016135A1 (de) * 2000-03-31 2001-10-18 Infineon Technologies Ag Gehäusebaugruppe für ein elektronisches Bauteil
WO2002071326A1 (fr) * 2001-03-07 2002-09-12 Infineon Technologies Ag Module de carte a puce
WO2003017196A1 (fr) * 2001-08-10 2003-02-27 Infineon Technologies Ag Etablissement des contacts de puces semiconductrices dans des cartes a puce
US7019981B2 (en) 2001-08-10 2006-03-28 Infineon Technologies Ag Making contact with semiconductor chips in chip cards

Also Published As

Publication number Publication date
WO2000000929A2 (fr) 2000-01-06
WO2000000929A3 (fr) 2000-03-16

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8130 Withdrawal