DE19680668T1 - Eine transparente Brücke zwischen Bussen eines Computersystems und ein Verfahren für die Schnittstellenbildung der Busse, um als ein einziger logischer Bus zu arbeiten - Google Patents
Eine transparente Brücke zwischen Bussen eines Computersystems und ein Verfahren für die Schnittstellenbildung der Busse, um als ein einziger logischer Bus zu arbeitenInfo
- Publication number
- DE19680668T1 DE19680668T1 DE19680668T DE19680668T DE19680668T1 DE 19680668 T1 DE19680668 T1 DE 19680668T1 DE 19680668 T DE19680668 T DE 19680668T DE 19680668 T DE19680668 T DE 19680668T DE 19680668 T1 DE19680668 T1 DE 19680668T1
- Authority
- DE
- Germany
- Prior art keywords
- buses
- interfacing
- operate
- computer system
- single logical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
- G06F13/4054—Coupling between buses using bus bridges where the bridge performs a synchronising function where the function is bus cycle extension, e.g. to meet the timing requirements of the target bus
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/498,240 US5734850A (en) | 1995-07-05 | 1995-07-05 | Transparent bridge between of a computer system and a method of interfacing the buses to operate as a single logical bus |
PCT/IB1996/000729 WO1997002533A1 (en) | 1995-07-05 | 1996-07-03 | A transparent bridge between buses of a computer system and a method of interfacing the buses to operate as a single logical bus |
Publications (2)
Publication Number | Publication Date |
---|---|
DE19680668T1 true DE19680668T1 (de) | 1997-09-18 |
DE19680668C2 DE19680668C2 (de) | 2003-11-20 |
Family
ID=23980194
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19680668T Expired - Fee Related DE19680668C2 (de) | 1995-07-05 | 1996-07-03 | Verfahren zum Überbrücken zweier Busse, transparente Brücke zum Koppeln zwischen zwei Bussen und Anordnung mit einem Computersystem |
Country Status (5)
Country | Link |
---|---|
US (1) | US5734850A (de) |
KR (1) | KR100742718B1 (de) |
AU (1) | AU6315896A (de) |
DE (1) | DE19680668C2 (de) |
WO (1) | WO1997002533A1 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19882975B4 (de) * | 1998-02-13 | 2005-08-18 | Intel Corporation, Santa Clara | Zugreifen auf eine Nachrichtenaustauscheinheit von einem sekundären Bus aus |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6148356A (en) * | 1995-12-27 | 2000-11-14 | Intel Corporation | Scalable computer system |
US6134622A (en) * | 1995-12-27 | 2000-10-17 | Intel Corporation | Dual mode bus bridge for computer system |
US6175888B1 (en) | 1996-04-10 | 2001-01-16 | International Business Machines Corporation | Dual host bridge with peer to peer support |
US5968144A (en) * | 1996-06-27 | 1999-10-19 | Vlsi Technology, Inc. | System for supporting DMA I/O device using PCI bus and PCI-PCI bridge comprising programmable DMA controller for request arbitration and storing data transfer information |
US5954809A (en) * | 1996-07-19 | 1999-09-21 | Compaq Computer Corporation | Circuit for handling distributed arbitration in a computer system having multiple arbiters |
US5894563A (en) * | 1996-11-20 | 1999-04-13 | Apple Computer, Inc. | Method and apparatus for providing a PCI bridge between multiple PCI environments |
US5918026A (en) * | 1996-12-23 | 1999-06-29 | Compaq Computer Corporation | PCI to PCI bridge for transparently completing transactions between agents on opposite sides of the bridge |
US6178483B1 (en) * | 1997-02-14 | 2001-01-23 | Advanced Micro Devices, Inc. | Method and apparatus for prefetching data read by PCI host |
US5937175A (en) * | 1997-04-08 | 1999-08-10 | National Instruments Corporation | PCI bus to IEEE 1394 bus translator employing pipe-lined read prefetching |
US5953511A (en) * | 1997-04-08 | 1999-09-14 | National Instruments Corporation | PCI bus to IEEE 1394 bus translator |
FI971718A (fi) | 1997-04-22 | 1998-10-23 | Nokia Telecommunications Oy | Korttipaikkojen lisääminen suurikapasiteettiseen väylään |
US5857082A (en) * | 1997-04-25 | 1999-01-05 | Intel Corporation | Method and apparatus for quickly transferring data from a first bus to a second bus |
FR2770008B1 (fr) * | 1997-10-16 | 2001-10-12 | Alsthom Cge Alkatel | Dispositif de communication entre plusieurs processeurs |
US6275888B1 (en) * | 1997-11-19 | 2001-08-14 | Micron Technology, Inc. | Method for configuring peer-to-peer bus bridges in a computer system using shadow configuration registers |
US6263389B1 (en) | 1998-01-21 | 2001-07-17 | Micron Technology, Inc. | Apparatus for increasing the number of loads supported by a host bus |
US6041380A (en) * | 1998-01-21 | 2000-03-21 | Micron Electronics, Inc. | Method for increasing the number of devices capable of being operably connected to a host bus |
US5996038A (en) * | 1998-01-26 | 1999-11-30 | Intel Corporation | Individually resettable bus expander bridge mechanism |
US6081863A (en) * | 1998-03-13 | 2000-06-27 | International Business Machines Corporation | Method and system for supporting multiple peripheral component interconnect PCI buses by a single PCI host bridge within a computer system |
US6260093B1 (en) * | 1998-03-31 | 2001-07-10 | Lsi Logic Corporation | Method and apparatus for arbitrating access to multiple buses in a data processing system |
US6449677B1 (en) * | 1998-09-03 | 2002-09-10 | Compaq Information Technologies Group, L.P. | Method and apparatus for multiplexing and demultiplexing addresses of registered peripheral interconnect apparatus |
US6167476A (en) * | 1998-09-24 | 2000-12-26 | Compaq Computer Corporation | Apparatus, method and system for accelerated graphics port bus bridges |
US6175889B1 (en) * | 1998-10-21 | 2001-01-16 | Compaq Computer Corporation | Apparatus, method and system for a computer CPU and memory to high speed peripheral interconnect bridge having a plurality of physical buses with a single logical bus number |
US6230227B1 (en) * | 1998-12-11 | 2001-05-08 | Compaq Computer Corp. | Computer system with support for a subtractive agent on the secondary side of a PCI-to-PCI bridge |
US6618777B1 (en) | 1999-01-21 | 2003-09-09 | Analog Devices, Inc. | Method and apparatus for communicating between multiple functional units in a computer environment |
EP1189141A3 (de) * | 2000-09-13 | 2005-12-28 | Texas Instruments Inc. | Busbrücke |
US6954209B2 (en) * | 2000-12-06 | 2005-10-11 | Hewlett-Packard Development Company, L.P. | Computer CPU and memory to accelerated graphics port bridge having a plurality of physical buses with a single logical bus number |
US6748478B1 (en) * | 2000-12-27 | 2004-06-08 | Intel Corporation | System function configurable computing platform |
US6973525B2 (en) * | 2002-03-19 | 2005-12-06 | Dell Products L.P. | System and method for managing bus numbering |
US7174410B2 (en) * | 2003-04-17 | 2007-02-06 | International Business Machines Corporation | Method, apparatus and computer program product for write data transfer |
US20060136650A1 (en) * | 2004-12-16 | 2006-06-22 | Jyh-Hwang Wang | Data-read and write method of bridge interface |
US8943257B2 (en) | 2011-09-30 | 2015-01-27 | Intel Corporation | Protocol neutral fabric |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5123092A (en) * | 1988-10-21 | 1992-06-16 | Zenith Data Systems Corporation | External expansion bus interface |
JP3206006B2 (ja) * | 1991-01-25 | 2001-09-04 | 株式会社日立製作所 | 二重化バス制御方法及び装置 |
US5309568A (en) * | 1992-03-16 | 1994-05-03 | Opti, Inc. | Local bus design |
US5467295A (en) * | 1992-04-30 | 1995-11-14 | Intel Corporation | Bus arbitration with master unit controlling bus and locking a slave unit that can relinquish bus for other masters while maintaining lock on slave unit |
CA2092631C (en) * | 1992-06-19 | 1997-04-08 | Don Steven Keener | Physical partitioning of logically continuous bus |
US5448565A (en) * | 1992-11-12 | 1995-09-05 | International Business Machines Corp. | Multiport LAN bridge |
JP3183731B2 (ja) * | 1992-11-17 | 2001-07-09 | 株式会社日立製作所 | バスシステム及びバスブリッジ方式 |
US5522050A (en) * | 1993-05-28 | 1996-05-28 | International Business Machines Corporation | Bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus |
EP0651336A1 (de) * | 1993-10-28 | 1995-05-03 | International Business Machines Corporation | Busarchitekturerweiterung mit einem Vermittlungsnetzwerk |
US5455915A (en) * | 1993-12-16 | 1995-10-03 | Intel Corporation | Computer system with bridge circuitry having input/output multiplexers and third direct unidirectional path for data transfer between buses operating at different rates |
US5546546A (en) * | 1994-05-20 | 1996-08-13 | Intel Corporation | Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge |
US5557758A (en) * | 1994-11-30 | 1996-09-17 | International Business Machines Corporation | Bridge between two buses of a computer system that determines the location of memory or accesses from bus masters on one of the buses |
-
1995
- 1995-07-05 US US08/498,240 patent/US5734850A/en not_active Expired - Lifetime
-
1996
- 1996-07-03 AU AU63158/96A patent/AU6315896A/en not_active Abandoned
- 1996-07-03 DE DE19680668T patent/DE19680668C2/de not_active Expired - Fee Related
- 1996-07-03 WO PCT/IB1996/000729 patent/WO1997002533A1/en active Application Filing
- 1996-07-03 KR KR1019970701430A patent/KR100742718B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19882975B4 (de) * | 1998-02-13 | 2005-08-18 | Intel Corporation, Santa Clara | Zugreifen auf eine Nachrichtenaustauscheinheit von einem sekundären Bus aus |
Also Published As
Publication number | Publication date |
---|---|
AU6315896A (en) | 1997-02-05 |
DE19680668C2 (de) | 2003-11-20 |
WO1997002533A1 (en) | 1997-01-23 |
KR970705793A (ko) | 1997-10-09 |
US5734850A (en) | 1998-03-31 |
KR100742718B1 (ko) | 2007-12-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8607 | Notification of search results after publication | ||
8304 | Grant after examination procedure | ||
8364 | No opposition during term of opposition | ||
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |
Effective date: 20130201 |