DE69828980D1 - System und verfahren zur flusskontrolle für ein hochgeschwindigkeitsbus - Google Patents

System und verfahren zur flusskontrolle für ein hochgeschwindigkeitsbus

Info

Publication number
DE69828980D1
DE69828980D1 DE69828980T DE69828980T DE69828980D1 DE 69828980 D1 DE69828980 D1 DE 69828980D1 DE 69828980 T DE69828980 T DE 69828980T DE 69828980 T DE69828980 T DE 69828980T DE 69828980 D1 DE69828980 D1 DE 69828980D1
Authority
DE
Germany
Prior art keywords
flow control
speed bus
bus
speed
flow
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69828980T
Other languages
English (en)
Other versions
DE69828980T2 (de
Inventor
Michael Bell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE69828980D1 publication Critical patent/DE69828980D1/de
Application granted granted Critical
Publication of DE69828980T2 publication Critical patent/DE69828980T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
DE69828980T 1997-09-22 1998-09-17 System und verfahren zur flusskontrolle für ein hochgeschwindigkeitsbus Expired - Lifetime DE69828980T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US934996 1997-09-22
US08/934,996 US6108736A (en) 1997-09-22 1997-09-22 System and method of flow control for a high speed bus
PCT/US1998/019452 WO1999015972A1 (en) 1997-09-22 1998-09-17 System and method of flow control for a high speed bus

Publications (2)

Publication Number Publication Date
DE69828980D1 true DE69828980D1 (de) 2005-03-17
DE69828980T2 DE69828980T2 (de) 2006-05-04

Family

ID=25466414

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69828980T Expired - Lifetime DE69828980T2 (de) 1997-09-22 1998-09-17 System und verfahren zur flusskontrolle für ein hochgeschwindigkeitsbus

Country Status (7)

Country Link
US (1) US6108736A (de)
EP (1) EP1010085B1 (de)
CN (1) CN1118029C (de)
AU (1) AU9396598A (de)
DE (1) DE69828980T2 (de)
HK (1) HK1026959A1 (de)
WO (1) WO1999015972A1 (de)

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US6609171B1 (en) * 1999-12-29 2003-08-19 Intel Corporation Quad pumped bus architecture and protocol
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US7107383B1 (en) * 2000-05-03 2006-09-12 Broadcom Corporation Method and system for multi-channel transfer of data and control information
US6622194B1 (en) 2000-08-28 2003-09-16 Intel Corporation Efficient use of multiple buses for a scalable and reliable high-bandwidth connection
US6742160B2 (en) 2001-02-14 2004-05-25 Intel Corporation Checkerboard parity techniques for a multi-pumped bus
US20020133652A1 (en) * 2001-03-19 2002-09-19 Tai Quan Apparatus for avoiding starvation in hierarchical computer systems that prioritize transactions
US6826643B2 (en) 2001-03-19 2004-11-30 Sun Microsystems, Inc. Method of synchronizing arbiters within a hierarchical computer system
US6877055B2 (en) 2001-03-19 2005-04-05 Sun Microsystems, Inc. Method and apparatus for efficiently broadcasting transactions between a first address repeater and a second address repeater
US6889343B2 (en) 2001-03-19 2005-05-03 Sun Microsystems, Inc. Method and apparatus for verifying consistency between a first address repeater and a second address repeater
US6735654B2 (en) * 2001-03-19 2004-05-11 Sun Microsystems, Inc. Method and apparatus for efficiently broadcasting transactions between an address repeater and a client
US7102997B2 (en) * 2002-03-04 2006-09-05 Fujitsu Limited Aggregate rate transparent LAN service for closed user groups over optical rings
US7085889B2 (en) * 2002-03-22 2006-08-01 Intel Corporation Use of a context identifier in a cache memory
US7535836B2 (en) * 2003-02-12 2009-05-19 Broadcom Corporation Method and system to provide word-level flow control using spare link bandwidth
JP4507249B2 (ja) * 2004-10-19 2010-07-21 株式会社日立製作所 記憶デバイスの更新を制御するシステム及び方法
US8004988B2 (en) * 2007-11-21 2011-08-23 Microchip Technology Incorporated Ethernet controller
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US8006013B2 (en) * 2008-08-07 2011-08-23 International Business Machines Corporation Method and apparatus for preventing bus livelock due to excessive MMIO
US9531647B1 (en) * 2013-03-15 2016-12-27 Cavium, Inc. Multi-host processing

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Also Published As

Publication number Publication date
WO1999015972A1 (en) 1999-04-01
HK1026959A1 (en) 2000-12-29
EP1010085B1 (de) 2005-02-09
DE69828980T2 (de) 2006-05-04
EP1010085A4 (de) 2002-04-10
AU9396598A (en) 1999-04-12
US6108736A (en) 2000-08-22
EP1010085A1 (de) 2000-06-21
CN1279786A (zh) 2001-01-10
CN1118029C (zh) 2003-08-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806