DE69509420D1 - Schnittstelle für eine flache Anzeige bei einem hochauflösenden graphischen Computersystem - Google Patents

Schnittstelle für eine flache Anzeige bei einem hochauflösenden graphischen Computersystem

Info

Publication number
DE69509420D1
DE69509420D1 DE69509420T DE69509420T DE69509420D1 DE 69509420 D1 DE69509420 D1 DE 69509420D1 DE 69509420 T DE69509420 T DE 69509420T DE 69509420 T DE69509420 T DE 69509420T DE 69509420 D1 DE69509420 D1 DE 69509420D1
Authority
DE
Germany
Prior art keywords
interface
computer system
flat display
graphic computer
resolution graphic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69509420T
Other languages
English (en)
Other versions
DE69509420T2 (de
Inventor
Sean Michael Mcnally
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69509420D1 publication Critical patent/DE69509420D1/de
Application granted granted Critical
Publication of DE69509420T2 publication Critical patent/DE69509420T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1431—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using a single graphics controller
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Graphics (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
DE69509420T 1994-01-28 1995-01-04 Schnittstelle für eine flache Anzeige bei einem hochauflösenden graphischen Computersystem Expired - Fee Related DE69509420T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US18852194A 1994-01-28 1994-01-28

Publications (2)

Publication Number Publication Date
DE69509420D1 true DE69509420D1 (de) 1999-06-10
DE69509420T2 DE69509420T2 (de) 1999-12-16

Family

ID=22693506

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69509420T Expired - Fee Related DE69509420T2 (de) 1994-01-28 1995-01-04 Schnittstelle für eine flache Anzeige bei einem hochauflösenden graphischen Computersystem

Country Status (4)

Country Link
US (1) US5608418A (de)
EP (1) EP0665527B1 (de)
JP (1) JPH0854865A (de)
DE (1) DE69509420T2 (de)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5841418A (en) * 1995-06-07 1998-11-24 Cirrus Logic, Inc. Dual displays having independent resolutions and refresh rates
US5764201A (en) * 1996-01-16 1998-06-09 Neomagic Corp. Multiplexed yuv-movie pixel path for driving dual displays
US6542150B1 (en) * 1996-06-28 2003-04-01 Cirrus Logic, Inc. Method and apparatus for asynchronous display of graphic images
US6057809A (en) * 1996-08-21 2000-05-02 Neomagic Corp. Modulation of line-select times of individual rows of a flat-panel display for gray-scaling
US6115032A (en) * 1997-08-11 2000-09-05 Cirrus Logic, Inc. CRT to FPD conversion/protection apparatus and method
EP0905987B1 (de) * 1997-09-26 2005-06-15 Matsushita Electric Industrial Co., Ltd. Verfahren und Vorrichtung zum dekodieren von Bildern und Datenaufzeichnungsmedium
US6008821A (en) * 1997-10-10 1999-12-28 International Business Machines Corporation Embedded frame buffer system and synchronization method
KR100251499B1 (ko) * 1997-11-25 2000-04-15 윤종용 디스플레이장치의 핫플러깅 구현방법
KR200160668Y1 (ko) 1997-12-16 1999-11-15 윤종용 평판 디스플레이 장치 및 이를 사용하는 디지탈 데이터 처리 장치
TW475140B (en) 1998-04-29 2002-02-01 Samsung Electronics Co Ltd Analog/digital display adapter and a computer system having the same
US6138193A (en) * 1998-06-23 2000-10-24 Compaq Computer Corporation System for reducing noise in bus having plurality of first and second set of signals and a delay device for delaying propagation of second signals
US6670964B1 (en) * 1998-09-18 2003-12-30 Hewlett-Packard Development Company, L.P. Automatic scaler mode detection
US6894706B1 (en) 1998-09-18 2005-05-17 Hewlett-Packard Development Company, L.P. Automatic resolution detection
US6295048B1 (en) 1998-09-18 2001-09-25 Compaq Computer Corporation Low bandwidth display mode centering for flat panel display controller
US6313813B1 (en) 1999-10-21 2001-11-06 Sony Corporation Single horizontal scan range CRT monitor
US6819310B2 (en) 2000-04-27 2004-11-16 Manning Ventures, Inc. Active matrix addressed bistable reflective cholesteric displays
US6816138B2 (en) * 2000-04-27 2004-11-09 Manning Ventures, Inc. Graphic controller for active matrix addressed bistable reflective cholesteric displays
US6850217B2 (en) 2000-04-27 2005-02-01 Manning Ventures, Inc. Operating method for active matrix addressed bistable reflective cholesteric displays
KR100350019B1 (ko) * 2000-05-19 2002-08-24 탑헤드 주식회사 다수의 모니터를 구동하기 위한 비디오 신호 처리 시스템
US7123248B1 (en) * 2002-07-30 2006-10-17 Matrox Electronic Systems Ltd. Analog multi-display using digital visual interface
US8204076B2 (en) * 2003-05-01 2012-06-19 Genesis Microchip Inc. Compact packet based multimedia interface
US7424558B2 (en) * 2003-05-01 2008-09-09 Genesis Microchip Inc. Method of adaptively connecting a video source and a video display
US7839860B2 (en) * 2003-05-01 2010-11-23 Genesis Microchip Inc. Packet based video display interface
US20040221315A1 (en) * 2003-05-01 2004-11-04 Genesis Microchip Inc. Video interface arranged to provide pixel data independent of a link character clock
US8059673B2 (en) * 2003-05-01 2011-11-15 Genesis Microchip Inc. Dynamic resource re-allocation in a packet based video display interface
US20040218599A1 (en) * 2003-05-01 2004-11-04 Genesis Microchip Inc. Packet based video display interface and methods of use thereof
US20040218624A1 (en) * 2003-05-01 2004-11-04 Genesis Microchip Inc. Packet based closed loop video display interface with periodic status checks
US7733915B2 (en) * 2003-05-01 2010-06-08 Genesis Microchip Inc. Minimizing buffer requirements in a digital video system
US20040221312A1 (en) * 2003-05-01 2004-11-04 Genesis Microchip Inc. Techniques for reducing multimedia data packet overhead
US8068485B2 (en) 2003-05-01 2011-11-29 Genesis Microchip Inc. Multimedia interface
US7567592B2 (en) * 2003-05-01 2009-07-28 Genesis Microchip Inc. Packet based video display interface enumeration method
US7405719B2 (en) * 2003-05-01 2008-07-29 Genesis Microchip Inc. Using packet transfer for driving LCD panel driver electronics
US7620062B2 (en) * 2003-05-01 2009-11-17 Genesis Microchips Inc. Method of real time optimizing multimedia packet transmission rate
US7800623B2 (en) * 2003-09-18 2010-09-21 Genesis Microchip Inc. Bypassing pixel clock generation and CRTC circuits in a graphics controller chip
US7487273B2 (en) * 2003-09-18 2009-02-03 Genesis Microchip Inc. Data packet based stream transport scheduler wherein transport data link does not include a clock line
US7634090B2 (en) * 2003-09-26 2009-12-15 Genesis Microchip Inc. Packet based high definition high-bandwidth digital content protection
US7613300B2 (en) * 2003-09-26 2009-11-03 Genesis Microchip Inc. Content-protected digital link over a single signal line
US20090267866A1 (en) * 2005-05-05 2009-10-29 Degapudi Janardhana Reddy Laptop computer with a back to back display
TWI382388B (zh) * 2006-05-23 2013-01-11 Au Optronics Corp 薄膜電晶體液晶顯示器的驅動電路、時序控制器及其驅動方法
US20090094658A1 (en) * 2007-10-09 2009-04-09 Genesis Microchip Inc. Methods and systems for driving multiple displays
US20090219932A1 (en) * 2008-02-04 2009-09-03 Stmicroelectronics, Inc. Multi-stream data transport and methods of use
US20090262667A1 (en) * 2008-04-21 2009-10-22 Stmicroelectronics, Inc. System and method for enabling topology mapping and communication between devices in a network
US20100183004A1 (en) * 2009-01-16 2010-07-22 Stmicroelectronics, Inc. System and method for dual mode communication between devices in a network
US8760461B2 (en) 2009-05-13 2014-06-24 Stmicroelectronics, Inc. Device, system, and method for wide gamut color space support
US8156238B2 (en) 2009-05-13 2012-04-10 Stmicroelectronics, Inc. Wireless multimedia transport method and apparatus
US8860888B2 (en) * 2009-05-13 2014-10-14 Stmicroelectronics, Inc. Method and apparatus for power saving during video blanking periods
US8429440B2 (en) * 2009-05-13 2013-04-23 Stmicroelectronics, Inc. Flat panel display driver method and system
US8468285B2 (en) * 2009-05-18 2013-06-18 Stmicroelectronics, Inc. Operation of video source and sink with toggled hot plug detection
US8291207B2 (en) * 2009-05-18 2012-10-16 Stmicroelectronics, Inc. Frequency and symbol locking using signal generated clock frequency and symbol identification
US8582452B2 (en) 2009-05-18 2013-11-12 Stmicroelectronics, Inc. Data link configuration by a receiver in the absence of link training data
US8370554B2 (en) * 2009-05-18 2013-02-05 Stmicroelectronics, Inc. Operation of video source and sink with hot plug detection not asserted
US8671234B2 (en) 2010-05-27 2014-03-11 Stmicroelectronics, Inc. Level shifting cable adaptor and chip system for use with dual-mode multi-media device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0695273B2 (ja) * 1984-12-22 1994-11-24 株式会社日立製作所 デイスプレイ制御装置
US4860246A (en) * 1985-08-07 1989-08-22 Seiko Epson Corporation Emulation device for driving a LCD with a CRT display
JPH084340B2 (ja) * 1985-08-07 1996-01-17 セイコーエプソン株式会社 インタ−フエイス装置
US5159683A (en) * 1986-07-29 1992-10-27 Western Digital Corporation Graphics controller adapted to automatically sense the type of connected video monitor and configure the control and display signals supplied to the monitor accordingly
JPH01248185A (ja) * 1988-03-30 1989-10-03 Toshiba Corp ディスプレィコントローラ
JP2892010B2 (ja) * 1988-05-28 1999-05-17 株式会社東芝 表示制御方式
DE68924737T2 (de) * 1988-08-09 1996-05-02 Seiko Epson Corp Anzeigesignalgenerator.
JP3137367B2 (ja) * 1990-08-09 2001-02-19 株式会社東芝 カラーパネル表示制御システム及びコンピュータシステム
DE69227283T2 (de) * 1991-06-26 1999-05-27 Toshiba Kawasaki Kk Anzeigesteuersystem zur Bestimmung des Anschlusses eines wahlweisen Anzeigegerätes mittels einer Farbtafel
CA2068016A1 (en) * 1991-07-23 1993-01-24 Wei Kuo Method and apparatus for processing concurrent pick events
JPH06318060A (ja) * 1991-07-31 1994-11-15 Toshiba Corp 表示制御装置
FI91923C (fi) * 1991-09-20 1994-08-25 Icl Personal Systems Oy Menetelmä näyttöjärjestelmän näyttölaitteen ohjaamiseksi sekä näyttöjärjestelmä ja näyttölaite

Also Published As

Publication number Publication date
JPH0854865A (ja) 1996-02-27
EP0665527B1 (de) 1999-05-06
EP0665527A1 (de) 1995-08-02
DE69509420T2 (de) 1999-12-16
US5608418A (en) 1997-03-04

Similar Documents

Publication Publication Date Title
DE69509420T2 (de) Schnittstelle für eine flache Anzeige bei einem hochauflösenden graphischen Computersystem
DE69712799D1 (de) Interpolieren von pixelwerten und alphawerten in einer anzeigevorrichtung für computergrafiken
EP0689133A3 (de) Verfahren zur Anzeige einer Mehrzahl an Informationsgruppen im gleichen Rechnerbildschirmbereich
GB2292625B (en) Windowed computer display
AU1991895A (en) System for managing the display of information in a computer
GB2291528B (en) Display system with data compression
AU127268S (en) Interactive computerized information device
DE69426927D1 (de) System für rechnerunterstützte zusammenarbeit
EP0738451A4 (de) Simultanes anzeigesystem
EP0745487A4 (de) Zeicheninformationsprozessor mit funktion zur darstellung
DE69423310D1 (de) Anzeigevorrichtung für Mehrfachbilder
IL121775A0 (en) Removing discontinuities in K-space data
DE69324182D1 (de) Gerätunabhängige Schnittstelle für graphische Anzeigegeräte
GB9723467D0 (en) Display means for displaying information
DE69220956T2 (de) Graphisches rechnersystem mit pause-möglichkeit für interaktive operationen
DE69813929D1 (de) Koordinateneingabevorrichtung mit Anzeige und Verfahren zu ihrer Herstellung
EP0425174A3 (en) Parametric curve evaluation for a computer graphics display system
DE69403114T2 (de) Anzeigevorrichtung für mehrfache Anzeigen
SG74574A1 (en) Interleaving block operations in a computer system
DE9316607U1 (de) Anzeigevorrichtung für Tastaturen
DE9316277U1 (de) Einsatz für Computergehäuse
DE29719157U1 (de) Bus für eine VGA-Schnittstellenkarte
GB9400533D0 (en) Computer tagging card
GB9920252D0 (en) Computer display system
HUT69819A (en) Picture-element carrying structure for large indicating instrument

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee