DE1537975A1 - Schaltanordnung zur Verringerung der Auswirkungen positiver Rueckkoppelungsgeraeusche in Mehrphasen-Torschaltungen - Google Patents

Schaltanordnung zur Verringerung der Auswirkungen positiver Rueckkoppelungsgeraeusche in Mehrphasen-Torschaltungen

Info

Publication number
DE1537975A1
DE1537975A1 DE19681537975 DE1537975A DE1537975A1 DE 1537975 A1 DE1537975 A1 DE 1537975A1 DE 19681537975 DE19681537975 DE 19681537975 DE 1537975 A DE1537975 A DE 1537975A DE 1537975 A1 DE1537975 A1 DE 1537975A1
Authority
DE
Germany
Prior art keywords
output
switching
level
stages
inputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19681537975
Other languages
German (de)
English (en)
Inventor
Booher Robert Kenneth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing North American Inc
Original Assignee
North American Rockwell Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FR96584A external-priority patent/FR1527845A/fr
Application filed by North American Rockwell Corp filed Critical North American Rockwell Corp
Publication of DE1537975A1 publication Critical patent/DE1537975A1/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096Synchronous circuits, i.e. using clock signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B14/00Transmission systems not characterised by the medium used for transmission
    • H04B14/02Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
    • H04B14/04Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse code modulation
    • H04B14/044Sample and hold circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Time-Division Multiplex Systems (AREA)
DE19681537975 1967-02-27 1968-01-16 Schaltanordnung zur Verringerung der Auswirkungen positiver Rueckkoppelungsgeraeusche in Mehrphasen-Torschaltungen Pending DE1537975A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR96584A FR1527845A (fr) 1967-02-27 1967-02-27 Circuit d'échantillonnage pour codeur rapide en multiplex dans le temps
US62257867A 1967-03-13 1967-03-13

Publications (1)

Publication Number Publication Date
DE1537975A1 true DE1537975A1 (de) 1970-01-22

Family

ID=26174803

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19681537975 Pending DE1537975A1 (de) 1967-02-27 1968-01-16 Schaltanordnung zur Verringerung der Auswirkungen positiver Rueckkoppelungsgeraeusche in Mehrphasen-Torschaltungen
DE19681537957 Pending DE1537957A1 (de) 1967-02-27 1968-02-27 Abtastschaltung fuer einen schnellen Zeitvielfach-PCM-Codor

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE19681537957 Pending DE1537957A1 (de) 1967-02-27 1968-02-27 Abtastschaltung fuer einen schnellen Zeitvielfach-PCM-Codor

Country Status (7)

Country Link
US (1) US3567968A (US20090192370A1-20090730-C00001.png)
BE (1) BE711253A (US20090192370A1-20090730-C00001.png)
CH (1) CH477129A (US20090192370A1-20090730-C00001.png)
DE (2) DE1537975A1 (US20090192370A1-20090730-C00001.png)
FR (1) FR1549801A (US20090192370A1-20090730-C00001.png)
GB (2) GB1159773A (US20090192370A1-20090730-C00001.png)
NL (1) NL6801114A (US20090192370A1-20090730-C00001.png)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3582674A (en) * 1967-08-23 1971-06-01 American Micro Syst Logic circuit
DE2212564C3 (de) * 1971-04-06 1981-07-23 Società Italiana Telecomunicazioni Siemens S.p.A., 20149 Milano Elektronische Schalteranordnung für Videosignale
US3708688A (en) * 1971-06-15 1973-01-02 Ibm Circuit for eliminating spurious outputs due to interelectrode capacitance in driver igfet circuits
GB1375958A (en) * 1972-06-29 1974-12-04 Ibm Pulse circuit
US3965369A (en) * 1972-08-25 1976-06-22 Hitachi, Ltd. MISFET (Metal-insulator-semiconductor field-effect transistor) logical circuit having depletion type load transistor
US4107548A (en) * 1976-03-05 1978-08-15 Hitachi, Ltd. Ratioless type MIS logic circuit
US4042833A (en) * 1976-08-25 1977-08-16 Rockwell International Corporation In-between phase clamping circuit to reduce the effects of positive noise
US4345170A (en) * 1980-08-18 1982-08-17 Bell Telephone Laboratories, Incorporated Clocked IGFET logic circuit
WO1983001160A1 (en) * 1981-09-17 1983-03-31 Western Electric Co Multistage semiconductor circuit arrangement
US4495426A (en) * 1981-12-24 1985-01-22 Texas Instruments Incorporated Low power inverter circuit
US4496851A (en) * 1982-03-01 1985-01-29 Texas Instruments Incorporated Dynamic metal oxide semiconductor field effect transistor clocking circuit

Also Published As

Publication number Publication date
CH477129A (fr) 1969-08-15
FR1549801A (US20090192370A1-20090730-C00001.png) 1968-12-13
DE1537957A1 (de) 1970-03-12
US3567968A (en) 1971-03-02
NL6801114A (US20090192370A1-20090730-C00001.png) 1968-09-16
GB1159773A (en) 1969-07-30
GB1151838A (en) 1969-05-14
BE711253A (US20090192370A1-20090730-C00001.png) 1968-08-26

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