DE10350460B4 - Method for producing semiconductor devices having micromechanical and / or microelectronic structures, which result from the fixed connection of at least two semiconductor wafers, and corresponding arrangement - Google Patents
Method for producing semiconductor devices having micromechanical and / or microelectronic structures, which result from the fixed connection of at least two semiconductor wafers, and corresponding arrangement Download PDFInfo
- Publication number
- DE10350460B4 DE10350460B4 DE10350460A DE10350460A DE10350460B4 DE 10350460 B4 DE10350460 B4 DE 10350460B4 DE 10350460 A DE10350460 A DE 10350460A DE 10350460 A DE10350460 A DE 10350460A DE 10350460 B4 DE10350460 B4 DE 10350460B4
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor wafers
- electrically conductive
- melting
- glass
- connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00301—Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2207/00—Microstructural systems or auxiliary parts thereof
- B81B2207/09—Packages
- B81B2207/091—Arrangements for connecting external electrical signals to mechanical structures inside the package
- B81B2207/093—Conductive package seal
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0172—Seals
- B81C2203/019—Seals characterised by the material or arrangement of seals between parts
Abstract
Verfahren zur Herstellung von mikromechanische und/oder mikroelektronische Strukturen aufweisenden Halbleiterbauelementen, die durch das feste Verbinden von mindestens zwei Halbleiterscheiben entstehen, wobei die eine Art der Halbleiterscheiben, die als Systemscheibe (1, 8) bezeichnet wird, mikromechanische und mikroelektronische Strukturen beinhaltet und die andere Art, die als Deckscheibe (2) bezeichnet wird, mindestens elektronische Strukturen trägt und Systemscheibe (1, 8) und Deckscheibe (2) Stellen aufweisen, in denen elektrisch leitende Bereiche als Kontaktgebiete an den zu verbindenden Oberflächen der Halbleiterscheiben vorhanden sind, an welchen eine feste elektrische Verbindung hergestellt wird, dadurch gekennzeichnet, daß die haüptsächlich mechanisch tragende Verbindung der Scheiben durch niedrigschmelzende, elektrisch isolierende Glaslote (6) und die ebenfalls mechanisch feste elektrische Verbindung von niedrigschmelzenden, elektrisch leitenden Glasloten (5) hergestellt wird, wobei die Lotpaste für die nur mechanisch tragende feste Verbindung mindestens in ringförmigen geschlossenen Bereichen (6), die nach der Verbindung der Halbleiterscheiben die hermetisch abgeschlossenen Hohlräume bilden, und die Lotpaste (5) für die elektrisch...method for the production of micromechanical and / or microelectronic Structured semiconductor devices by solid bonding arise from at least two semiconductor wafers, wherein the one Type of semiconductor wafers, referred to as system disk (1, 8) is involved, micro-mechanical and microelectronic structures and the other type, referred to as cover plate (2), at least electronic Structures carries and system disk (1, 8) and cover disk (2) have locations, in which electrically conductive areas as contact areas on the to be joined surfaces the semiconductor wafers are present, to which a fixed electrical Connection is made, characterized in that the haüptsächlich mechanically carrying connection of the discs by low-melting, electric insulating glass solders (6) and the also mechanically solid electrical Combination of low-melting, electrically conductive glass solders (5), wherein the solder paste for the only mechanically bearing firm connection at least in annular closed areas (6), the hermetic after the connection of the semiconductor wafers closed cavities form, and the solder paste (5) for the electric ...
Description
Die Erfindung geht aus von einem Verfahren zum Verbinden prozessierter Halbleiterscheiben mittels elektrisch leitender und elektrisch isolierender strukturierter Verbindungszwischenschichten gemäß dem Oberbegriff des Anspruchs 1.The The invention is based on a method for connecting processed Semiconductor wafers by means of electrically conductive and electrically insulating structured Intermediate interconnection layers according to the preamble of claim 1.
Das Verbinden von prozessierten Halbleiterscheiben wird in der Fertigung von mikroelektronischen und mikroelektromechanischen Systemen eingesetzt, um bestimmte Strukturen durch eine Kappe bereits im Scheibenprozeß abzudecken. Dieser Arbeitsgang ist zum einen notwendig, um empfindliche mechanische Strukturen während nachfolgender Bearbeitungsschritte zu schützen bzw. das eigentliche Verkapseln der Einzelelemente, z.B. optische Bauelemente, bereits im Scheibenverband vorzunehmen und somit spezielle Aufbauten zu ermöglichen. Übliche Verfahren zum Verbinden von z.B. System- und Deckscheiben sind das anodische und das direkte Bonden, sowie das Bonden mittels niedrigschmelzender Glaszwischenschichten (Glas-Frit-Bonden). Dabei befinden sich in der Regel die mechanisch bzw. elektrisch aktiven Elemente auf der Systemscheibe. Die Deckscheibe hingegen dient meist nur als abdeckender Schutz und besitzt nach dem Stand der Technik keine oder nur wenige elektrische Strukturen. Die oben aufgeführten Bondverfahren haben die Eigenschaft, daß die Scheiben nicht leitend miteinander verbunden werden. Dies liegt zum einen daran, daß die Deckscheibe selbst nicht leitend ist (anodisches Bonden). Zum anderen sind beim Bonden entstehende Zwischenschichten nicht leitend (Bondoxid beim direkten Bonden, Glasszwischenschicht beim Glas-Frit-Bonden). Bei der Anwendung des Verkapselungsbondens ist es meist jedoch notwendig, gezielt den gesamten Deckel bzw. Strukturen auf dem Deckel elektrisch leitend anzuschließen. Ein elektrischer Anschluß des gesamten Deckels ist z.T. notwendig, um ihn auf ein bestimmtes Potential, z.B. Masse, zu legen. Für die Auslesung kapazitiver Sensoren sind Auswerteelektroden auf dem Deckel notwendig, die zur Systemscheibe hin kontaktiert werden müssen, um ein Drahtbonden während des Aufbau- und Verbindungsprozesses in einer Ebene zu ermöglichen. Zur Erhöhung der Packungsdichte von Mikrosystemen ist es vorteilhaft, Auswerteschaltungen auf der Deckscheibe zu integrieren, wenn diese zur Systemscheibe elektrisch kontaktiert werden können. Bisher sind nur elektrische Scheibe-zu-Scheibe-Kontaktierungen vom anodischen Bonden bekannt. Dabei werden Metallisierungsgebiete der zu verbindenden Scheiben in mechanischen Kontakt gebracht und durch die entstehende Scheibenverbindungkraft fest zusammengepresst (KADAR, Z., BOSSCHE, A., MOLLINGER, J., Sensors & Actuators A Vol. 52 (1996), pp. 151-155 – Aluminium press-on contacts for glass to silicon anodic bonding). Dieses Verfahren weist allerdings zwei gravierende Nachteile auf. Zum einem stören die elektrischen Kontaktgebiete die Ausbildung der eigentlichen Scheibenbondverbindung. Zum anderen besteht keine stoffliche Verbindung im Bereich der elektrischen Kontakte, so daß deren Zuverlässigkeit somit fraglich ist. Als am universellsten einsetzbares Scheibenbondverfahren für Verkapselungszwecke gilt das Glas-Frit-Bonden, da es sehr hohe Bondausbeuten liefert und aufgrund der planarisierenden Wirkung der geschmolzenen Glaszwischenschicht Oberflächenprofile der zu verbindenden Scheiben ausgleicht und somit laterale metallische Kontaktdurchführungen im Bondinterface ermöglicht.The Connecting processed semiconductor wafers is in production used by microelectronic and microelectromechanical systems, to cover certain structures by a cap already in the disk process. This operation is firstly necessary to sensitive mechanical Structures during subsequent processing steps to protect or the actual encapsulation of the individual elements, e.g. optical components, already in the disk association make and thus allow special structures. Usual methods for joining from e.g. System and cover discs are anodic and direct bonding, and the bonding by means of low-melting glass intermediate layers (Glass frit bonding). there are usually the mechanical or electrically active Elements on the system disk. The cover disk, however, usually serves only as a protective cover and has the state of the art no or only a few electrical structures. The bonding methods listed above have the property that the Disks are not conductively connected. This is on the one hand, that the Cover disc itself is not conductive (anodic bonding). On the other hand Bonding intermediate layers are not conductive (Bondoxid for direct bonding, glass interlayer for glass-frit bonding). However, when using encapsulation bonding, it is usually necessary to targeted the entire lid or structures on the lid electrically conductively connect. An electrical connection of the entire lid is z.T. necessary to bring it to a certain potential, e.g. Mass, to lay. For The readout of capacitive sensors are evaluation electrodes on the Lid necessary, which must be contacted to the system disk out to a wire bonding during to enable the set-up and connection process in one level. To increase The packing density of microsystems, it is advantageous Auswerteschaltungen to integrate on the cover disk, if this to the system disk can be contacted electrically. So far, only electrical disc-to-disc contacts of known anodic bonding. This metallization of the brought to be bonded discs in mechanical contact and through the resulting disc connection force is firmly compressed (KADAR, Z., BOSSCHE, A., MOLLINGER, J., Sensors & Actuators A Vol. 52 (1996), p. 151-155 - aluminum press-on contacts for glass to silicon anodic bonding). This method however, has two serious disadvantages. For one disturb the electrical contact areas the formation of the actual Scheibenbondverbindung. On the other hand, there is no material connection in the field of electrical Contacts, so that their reliability is therefore questionable. As the most universal disc bonding method for encapsulation purposes the glass-frit bonding, since it provides very high bond yields and due to the planarizing effect of the molten glass interlayer surface profiles compensates for the discs to be joined and thus lateral metallic Vias enabled in the bond interface.
In
der
Dieses Verbindungselement verursacht zusätzlichen Aufwand, erhöht damit die Kosten und wirkt sich negativ auf die Zuverlässigkeit des Bauelementes aus.This Connecting element causes additional effort, thus increasing the cost and has a negative impact on the reliability of the device.
Der Erfindung liegt die Aufgabe zugrunde, das Verbindungsverfahren von mikromechanische und elektronische Strukturen tragenden Halbleiterscheiben so zu gestalten, daß eine feste und bezüglich Hohlräumen dicht schließende Verbindung der Halbleiterscheiben bei gleichzeitiger fester elektrischer Verbindung der Scheiben ohne den zusätzlichen Aufwand eines extra Verbindungselementes gegeben ist.Of the Invention is based on the object, the connection method of Micromechanical and electronic structures bearing semiconductor wafers so that a fixed and re cavities tight closing Connection of the semiconductor wafers with simultaneous solid electrical Connection of the discs without the extra effort of an extra Connection element is given.
Gelöst wird die Aufgabe mit den im kennzeichnenden Teil der Ansprüche 1, 9 und 12 angegebenen Merkmalen.Is solved the task with the in the characterizing part of claims 1, 9 and 12 specified characteristics.
Der Gegenstand des Anspruchs 1 weist die Vorteile auf, daß die Kombination von leitenden und isolierenden Glasstrukturen beim Glas-Frit-Bonden es in vereinfachter Weise möglich macht, in einem Arbeitsgang die Halbleiterscheiben zu verbinden und gezielt Bereiche miteinander verbundener Scheiben elektrisch mit fester Kontaktverbindung ohne ein gesondertes Verbindungselement anzuschließen.Of the The subject matter of claim 1 has the advantages that the combination of conductive and insulating glass structures in glass frit bonding in a simplified way possible makes it possible to connect the semiconductor wafers in one operation and targeted areas of interconnected slices electrically with a fixed contact connection without a separate connection element to join.
Die Erfindung eignet sich besonders für mikroelektromechanische Strukturen, die mit Strukturen der Auswerteelektronik integriert sind. Darüber hinaus können auch mehr als zwei Halbleiterscheiben stapelförmig miteinander verbunden werden.The invention is particularly suitable for microelectromechanical structures that are integrated with structures of the evaluation. In addition, more than two semiconductor slides ben stacked together.
Vorteilhafte Ausgestaltungen des Gegenstandes der Ansprüche 1, 9 und 12 sind in den Unteransprüchen angegeben.advantageous Embodiments of the subject matter of claims 1, 9 and 12 are in the dependent claims specified.
Die Erfindung wird nun anhand eines Ausführungsbeispiels mit zwei Halbleiterscheiben unter Zuhilfenahme der Zeichnungen erläutert. Es zeigenThe Invention will now be described with reference to an embodiment with two semiconductor wafers explained with the aid of the drawings. Show it
Wie
in
Sind im Design der Systemscheibe und der Deckscheibe die entsprechenden elektrischen Kontaktflächen und notwendigen Scheibenverbindungsrahmen berücksichtigt, ist z.B. folgender Prozess zur Herstellung der elektrisch leitfähigen und isolierenden Scheibenverbindungen möglich:
- – Siebdruck zum Aufbringen der elektrisch nicht leitenden Glaspaste auf die Deckscheibe
- – Konditionieren und Vorschmelzen des elektrisch nicht leitenden Glases
- – Siebdruck zum Aufbringen der elektrisch leitenden Glaspaste auf die Deckscheiben
- – Konditionieren und Vorschmelzen des elektrisch leitenden Glases
- – Ausrichten von System- und Deckscheibe
- – Bonden unter mechanischem Druck bei der Verarbeitungstemperatur der Gläser
- - Screen printing for applying the electrically non-conductive glass paste on the cover plate
- - Conditioning and premelting of the electrically non-conductive glass
- - Screen printing for applying the electrically conductive glass paste on the cover plates
- - Conditioning and pre-melting of the electrically conductive glass
- - Aligning the system and cover disk
- - Bonding under mechanical pressure at the processing temperature of the glasses
- 11
- Systemscheibe mit mikroelektromechanischen bzw. mitsystem disc with microelectromechanical or with
- elektronischen Strukturenelectronic structures
- 22
- Deckscheibe, z.B. auch mit elektronischen Strukturen versehenCover plate, e.g. also provided with electronic structures
- 33
- zu schützende mikroelektromechanische bzw. elektronischeto protective microelectromechanical or electronic
- Strukturenstructures
- 44
- Metallstrukturen, Zuleitungen und Bondinseln (Bondpads)Metal structures Feeders and Bonding Pads
- 55
- elektrisch leitfähiges Verbindungsglaselectrical conductive connection glass
- 66
- elektrisch isolierendes Verbindungsglaselectrical insulating connecting glass
- 77
- ZwischenisolationsschichtInterlayer insulation film
- 88th
- SOI-Scheiben (silicon on insulator)SOI wafers (silicon on insulator)
- 99
- aktive elektronische Strukturen tragende Siliziumschicht (aktiveactive electronic structures supporting silicon layer (active
- Schicht)Layer)
- 1010
- vergrabenes Oxidburied oxide
- 1111
- Trägerscheibe (Substrat)carrier disc (Substrate)
- 1212
- Isolationsgräben in aktiver SchichtIsolation trenches in active layer
Claims (14)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10350460A DE10350460B4 (en) | 2003-10-29 | 2003-10-29 | Method for producing semiconductor devices having micromechanical and / or microelectronic structures, which result from the fixed connection of at least two semiconductor wafers, and corresponding arrangement |
CNA2004800319774A CN1874956A (en) | 2003-10-29 | 2004-10-29 | Fixed, insulated and electric connection of treated semiconductor wafers |
CA002543736A CA2543736A1 (en) | 2003-10-29 | 2004-10-29 | Method and device for secure, insulated and electrically conductive assembling of treated semiconductor wafers |
DE112004002626T DE112004002626D2 (en) | 2003-10-29 | 2004-10-29 | Solid insulating and electrically conductive connection of processed semiconductor wafers |
US10/595,303 US8129255B2 (en) | 2003-10-29 | 2004-10-29 | Firm, insulating and electrically conducting connection of processed semiconductor wafers |
EP04802660A EP1678074A1 (en) | 2003-10-29 | 2004-10-29 | Method and device for secure, insulated and electrically conductive assembling of treated semiconductor wafers |
PCT/DE2004/002413 WO2005042401A1 (en) | 2003-10-29 | 2004-10-29 | Method and device for secure, insulated and electrically conductive assembling of treated semiconductor wafers |
JP2006537055A JP2007510295A (en) | 2003-10-29 | 2004-10-29 | Stable insulating and conductive bonding of processed semiconductor wafers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10350460A DE10350460B4 (en) | 2003-10-29 | 2003-10-29 | Method for producing semiconductor devices having micromechanical and / or microelectronic structures, which result from the fixed connection of at least two semiconductor wafers, and corresponding arrangement |
Publications (2)
Publication Number | Publication Date |
---|---|
DE10350460A1 DE10350460A1 (en) | 2005-06-30 |
DE10350460B4 true DE10350460B4 (en) | 2006-07-13 |
Family
ID=34529872
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10350460A Expired - Fee Related DE10350460B4 (en) | 2003-10-29 | 2003-10-29 | Method for producing semiconductor devices having micromechanical and / or microelectronic structures, which result from the fixed connection of at least two semiconductor wafers, and corresponding arrangement |
DE112004002626T Ceased DE112004002626D2 (en) | 2003-10-29 | 2004-10-29 | Solid insulating and electrically conductive connection of processed semiconductor wafers |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE112004002626T Ceased DE112004002626D2 (en) | 2003-10-29 | 2004-10-29 | Solid insulating and electrically conductive connection of processed semiconductor wafers |
Country Status (7)
Country | Link |
---|---|
US (1) | US8129255B2 (en) |
EP (1) | EP1678074A1 (en) |
JP (1) | JP2007510295A (en) |
CN (1) | CN1874956A (en) |
CA (1) | CA2543736A1 (en) |
DE (2) | DE10350460B4 (en) |
WO (1) | WO2005042401A1 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7768360B2 (en) * | 2002-10-15 | 2010-08-03 | Marvell World Trade Ltd. | Crystal oscillator emulator |
US7760039B2 (en) * | 2002-10-15 | 2010-07-20 | Marvell World Trade Ltd. | Crystal oscillator emulator |
US7791424B2 (en) * | 2002-10-15 | 2010-09-07 | Marvell World Trade Ltd. | Crystal oscillator emulator |
US20060113639A1 (en) * | 2002-10-15 | 2006-06-01 | Sehat Sutardja | Integrated circuit including silicon wafer with annealed glass paste |
US20060267194A1 (en) | 2002-10-15 | 2006-11-30 | Sehat Sutardja | Integrated circuit package with air gap |
DE102006040115A1 (en) * | 2006-08-26 | 2008-03-20 | X-Fab Semiconductor Foundries Ag | Method and arrangement for the hermetically sealed vertical electrical through-connection of cover plates of microsystem technology |
US8138062B2 (en) * | 2009-12-15 | 2012-03-20 | Freescale Semiconductor, Inc. | Electrical coupling of wafer structures |
EP3101805B1 (en) * | 2015-06-01 | 2019-04-03 | Aros Electronics AB | Dc bus ripple reduction |
Citations (4)
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DE3837300A1 (en) * | 1988-11-03 | 1990-05-23 | Messerschmitt Boelkow Blohm | Method for producing microelectronic circuits and hybrids |
DE4006108A1 (en) * | 1990-02-27 | 1991-08-29 | Bosch Gmbh Robert | METHOD FOR BUILDING MICROMECHANICAL COMPONENTS IN THICK LAYER TECHNOLOGY |
DE19616014A1 (en) * | 1996-04-23 | 1997-10-30 | Bosch Gmbh Robert | Method for producing semiconductor components having micromechanical structures |
DE10141753A1 (en) * | 2001-08-29 | 2003-03-20 | Orga Kartensysteme Gmbh | Method for installing electronic component on support structure, involves using face-down technology |
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US5094969A (en) * | 1989-09-14 | 1992-03-10 | Litton Systems, Inc. | Method for making a stackable multilayer substrate for mounting integrated circuits |
US5164328A (en) | 1990-06-25 | 1992-11-17 | Motorola, Inc. | Method of bump bonding and sealing an accelerometer chip onto an integrated circuit chip |
US5545912A (en) * | 1994-10-27 | 1996-08-13 | Motorola, Inc. | Electronic device enclosure including a conductive cap and substrate |
JP3514349B2 (en) | 1996-02-13 | 2004-03-31 | 株式会社日立国際電気 | Micro package structure |
DE69807976T2 (en) | 1997-05-09 | 2003-06-05 | Jsr Corp | Composition of a glass paste |
DE69736630D1 (en) * | 1997-06-19 | 2006-10-19 | St Microelectronics Srl | Hermetically sealed sensor with movable microstructure |
GB9713831D0 (en) | 1997-06-30 | 1997-09-03 | Fry Metals Inc | Sealing glass paste for cathode ray tubes |
US5955771A (en) * | 1997-11-12 | 1999-09-21 | Kulite Semiconductor Products, Inc. | Sensors for use in high vibrational applications and methods for fabricating same |
US6020646A (en) * | 1997-12-05 | 2000-02-01 | The Charles Stark Draper Laboratory, Inc. | Intergrated circuit die assembly |
JP3689598B2 (en) | 1998-09-21 | 2005-08-31 | キヤノン株式会社 | Spacer manufacturing method and image forming apparatus manufacturing method using the spacer |
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-
2003
- 2003-10-29 DE DE10350460A patent/DE10350460B4/en not_active Expired - Fee Related
-
2004
- 2004-10-29 CA CA002543736A patent/CA2543736A1/en not_active Abandoned
- 2004-10-29 CN CNA2004800319774A patent/CN1874956A/en active Pending
- 2004-10-29 EP EP04802660A patent/EP1678074A1/en not_active Withdrawn
- 2004-10-29 JP JP2006537055A patent/JP2007510295A/en active Pending
- 2004-10-29 US US10/595,303 patent/US8129255B2/en not_active Expired - Fee Related
- 2004-10-29 WO PCT/DE2004/002413 patent/WO2005042401A1/en active Application Filing
- 2004-10-29 DE DE112004002626T patent/DE112004002626D2/en not_active Ceased
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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DE3837300A1 (en) * | 1988-11-03 | 1990-05-23 | Messerschmitt Boelkow Blohm | Method for producing microelectronic circuits and hybrids |
DE4006108A1 (en) * | 1990-02-27 | 1991-08-29 | Bosch Gmbh Robert | METHOD FOR BUILDING MICROMECHANICAL COMPONENTS IN THICK LAYER TECHNOLOGY |
DE19616014A1 (en) * | 1996-04-23 | 1997-10-30 | Bosch Gmbh Robert | Method for producing semiconductor components having micromechanical structures |
DE10141753A1 (en) * | 2001-08-29 | 2003-03-20 | Orga Kartensysteme Gmbh | Method for installing electronic component on support structure, involves using face-down technology |
Non-Patent Citations (1)
Title |
---|
Kadar et al.: "Aluminium press-on contacts for glass to silicon anodic bonding" in Sensors and Actuators A, 1996, Vol. 52, S. 151-155 * |
Also Published As
Publication number | Publication date |
---|---|
WO2005042401A1 (en) | 2005-05-12 |
US20080029878A1 (en) | 2008-02-07 |
US8129255B2 (en) | 2012-03-06 |
DE112004002626D2 (en) | 2006-09-21 |
EP1678074A1 (en) | 2006-07-12 |
CN1874956A (en) | 2006-12-06 |
CA2543736A1 (en) | 2005-05-12 |
JP2007510295A (en) | 2007-04-19 |
DE10350460A1 (en) | 2005-06-30 |
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