JP3514349B2 - Micro package structure - Google Patents
Micro package structureInfo
- Publication number
- JP3514349B2 JP3514349B2 JP04840396A JP4840396A JP3514349B2 JP 3514349 B2 JP3514349 B2 JP 3514349B2 JP 04840396 A JP04840396 A JP 04840396A JP 4840396 A JP4840396 A JP 4840396A JP 3514349 B2 JP3514349 B2 JP 3514349B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- bump
- frame
- mounting
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Micromachines (AREA)
- Wire Bonding (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Description
【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は、微小素子（マイクロデ
バイス）のパッケージ（気密封止）構造に関し、特に、
弾性表面波デバイスや水晶振動子などの振動デバイス，
加速度センサやジャイロなどの慣性センサ，圧力セン
サ，アクチュエータなど、機械的運動を伴う微小機械的
機能素子（マイクロメカニカルデバイス）のパッケージ
構造に関するものである。
【０００２】
【従来の技術】製品の小型化と信号の高速化，高機能化
に伴い、多種複数のチップ状デバイスを１つのモジュー
ル内に組み込むマルチチップモジュール（ＭＣＭ：Mult
i-Chip-Module ）技術が開発され実用化されている。そ
こでは、例えば、半導体や集積回路などの複数のベアチ
ップを基板に複合搭載し、テープ自動ボンディング（Ｔ
ＡＢ：Tape Automated Bonding）やワイヤボンディング
またはフリップチップのバンプによる接続などで実装し
た後、全体を樹脂封止（プラスチックシール）するマル
チチップパッケージ構造が実施されている。上記マルチ
チップモジュールは、樹脂が直接デバイスに密接して封
止されるため、弾性表面波デバイスのような振動子、或
いは、超小型の加速度センサやアクチュエータのように
マイクロマシンとも呼ばれる機械的運動体などのマイク
ロメカニカルデバイスを複合搭載することができない。
これらのマイクロメカニカルデバイスは個別に金属，セ
ラミック，ガラスなどを用いて気密封止した後に主基板
に搭載されている。
【０００３】図３は従来の例えば弾性表面波装置の構造
を示す平面図と縦断面図であり、弾性表面波素子をセラ
ミックパッケージ５に収容しキャップ９を覆せて気密封
止した構造を示す。（Ａ）の平面図はキャップ９を取り
外して内部がわかるようにした図である。１は圧電基
板、２はＩＤＴ電極、３は端子電極（ボンディングパッ
ド）、４はボンディングワイヤ、５はセラミックパッケ
ージ、６はダイボンド樹脂、７は内部端子、８は外部端
子、９はキャップ、１０は中空部である。この中空部１
０の空気は不活性ガスで置換されて素子が保護される。
この中空部１０は、弾性表面波素子やマイクロメカニカ
ルデバイスにとって極めて重要な部分である。
【０００４】例えば、弾性表面波デバイスの場合、表面
波が励振し伝搬するＩＤＴ（すだれ状電極）面に表面波
エネルギが集中するためその振動機能面が弾性的に開放
となる条件が課せられているため中空部１０が必要であ
る。同様に他のマイクロメカニカルデバイスの場合も機
械的運動体であるため中空部１０を設ける気密封止（ハ
ーメチックシール）構造が必然である。
【０００５】
【発明が解決しようとする課題】しかし、さらに小型化
高密度実装と信号の高速化が要求され、既にマルチチッ
プモジュール化されたＬＳＩ（大規模集積回路）のチッ
プと個別に気密封止されたマイクロメカニカルデバイス
との配線距離による遅延時間を縮めなければならなくな
り、マイクロメカニカルデバイスもベアチップの状態で
一つのモジュール基板に複合搭載できるように求められ
ている。
【０００６】本発明の目的は、上記のニーズに応え、小
型高密度実装化と信号の高速化を実現するために、マイ
クロメカニカルデバイスをベアチップの状態で、しか
も、中空部を確保して他のベアチップとともに樹脂封止
することのできるマイクロパッケージ構造を提供するこ
とにある。
【０００７】
【課題を解決するための手段】本発明のマイクロパッケ
ージ構造は、機械的動作部分から引き出された端子電極
を有する微小機械的機能素子の基板と、前記機械的動作
部分を囲み該基板上に形成された上端面が平らで接着機
能をもつ枠と、該枠の外側の前記基板上の端子電極面に
形成されたバンプとを備え、取付け基板にフェイスダウ
ン実装を用いて前記枠の平らな上端面と該取付け基板と
が接合されたとき前記機械的動作部分の表面に密閉空間
が形成され、前記バンプによって取付け基板上の導体に
導通接続されるように構成したことを特徴とするもので
ある。
【０００８】
【発明の実施の形態】図１は本発明の実施例を示す構造
図であり、例えば、マイクロメカニカルデバイスとして
弾性表面波デバイスを示してある。（Ａ）はチップ状態
の弾性表面波素子の平面図であり、（Ｂ）はそのＸ−Ｙ
切断端面図、（Ｃ）はチップの取付け基板１７、例え
ば、マルチチップモジュールの基板にフェイスダウン方
式で搭載した状態を示す。図１において、１１は圧電基
板、１２はＩＤＴ電極であり、運動，振動機能部分であ
る。１３は端子電極、１４は接着機能を持つ絶縁材料で
形成した枠、１５はバンプ、１６は接着強度改善用金
属、１７は取付け基板であり例えばマルチチップモジュ
ールの基板、１８はその取付け基板１７に設けられた印
刷導体、１９は中空部である。
【０００９】端子電極１３と接着強度改善用金属１６
は、ＩＤＴ電極１２を形成するときフォトリソグラフィ
とドライエッチングを用いて形成される。この時端子電
極１３は、予め枠１４の外まで延長して形成させる。ま
た、接着強度改善用金属１６は、動作空間の周りに配置
する。
【００１０】次に、接着機能を持つ枠１４を接着強度改
善用金属１６上に形成する。この接着機能を持つ材料と
して、予め必要なパターンに形作った絶縁性の両面テー
プやハーフキュアしたポリイミドなどが用いられる。テ
ープの場合、熱伝導性が高いテープならばさらによい。
また、ポリイミドは、感光性で低応力な材料を使用する
ことが望ましい。
【００１１】次に、枠１４の外まで延ばした端子電極１
３上にバンプ１５を形成する。この時バンプ１５の高さ
は枠１４の高さより高くする。バンプ１５には、はんだ
バンプ，導電樹脂バンプ，メタルバンプなどがあり、い
ずれのバンプ材料を使用してもよいが、デバイスと基板
の熱膨張係数の差による応力が問題になる場合、金（Ａ
ｕ）のメタルバンプが適する。ここまでのプロセスはウ
エハ上でバッチ処理が行われる。
【００１２】次に、ウエハをデバイス毎にダイシングマ
シンを用いてチップに分離する。続いて分離されたデバ
イスを基板上にのせ、デバイスを基板側に押しつけ加熱
する。この時バンプ１５はデバイスと基板間の電気的接
続を行う。枠１４の材料としてポリイミドを用いた場
合、実装時に熱圧着を行う。最初デバイスを基板側に押
しつけた状態で加熱し、仮止めをする。この時、加圧が
強すぎるとバンプがつぶれすぎて基板との間で剥離が生
じるので加圧を調整する。次に、ポリイミドをフルキュ
アする。ポリイミドはフルキュアすると収縮するためバ
ンプが基板を押す力は強くなる。この状態でも電極数が
少なければ十分な電気的接続の信頼性が得られる。これ
らのパッケージプロセスが終了すると枠とデバイス、取
付け基板によって中空部（密閉空間）１９が形成され、
表面弾性波デバイスの動作空間は中空部に封止される。
【００１３】図２は電極数が多い場合、さらに高信頼性
を得るための実装方法を示す。この方法では、バンプ１
５の先または取付け基板１７側に、スクリーン印刷で導
電性樹脂２０を形成させる。バンプ１５にＡｕを使用し
た場合、バンプと基板は接触している程度なので、実装
時の加圧が強すぎると電気的にオープンになることがあ
る。ウエハには多くの場合そりがあるため、電極数が多
くなると加圧にばらつきが生じオープン状態となる電極
が現れる。これらの問題をなくすためには、バンプ１５
の先または基板側にスクリーン印刷で形成した導電性樹
脂２０を用いて電気的接続を行うことが有効である。ま
た、この導電性樹脂２０を加えた方法は電極数が少ない
場合の信頼性向上にも役立つ。
【００１４】これらの方法を用いることにより、他の構
造体，センサも実装できる。
【００１５】
【発明の効果】以上詳細に述べたように、本発明によれ
ば、マイクロメカニカルデバイスを、その中空部を確保
してベアチップ状で取付け基板に直接実装できるので、
セラミックパッケージ等が不用となり、大幅な小型，軽
量化が図れ、かつ、他のチップとの配線間距離が短くな
るので信号の高速化に寄与すること大である。また、半
導体チップと一体化でき、従来の樹脂封止をそのまま適
用できるのでマイクロメカニカルデバイスを搭載したマ
ルチチップモジュール化を実現することができる。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package (hermetic sealing) structure of a micro element (micro device),
Vibration devices such as surface acoustic wave devices and quartz oscillators,
The present invention relates to a package structure of a micromechanical device (micromechanical device) with mechanical movement, such as an inertial sensor such as an acceleration sensor or a gyro, a pressure sensor, or an actuator. 2. Description of the Related Art With the miniaturization of products, the increase in signal speed, and the sophistication of functions, a multi-chip module (MCM: Mult: Multi-chip module) in which a plurality of types of chip-like devices are incorporated in one module.
i-Chip-Module) technology has been developed and put into practical use. Here, for example, a plurality of bare chips such as semiconductors and integrated circuits are combined and mounted on a substrate, and a tape automatic bonding (T
A multi-chip package structure is implemented in which the semiconductor device is mounted by AB (Tape Automated Bonding), wire bonding, flip-chip bump connection, or the like, and then entirely sealed with a resin (plastic seal). In the multi-chip module, since the resin is directly sealed in close contact with the device, a vibrator such as a surface acoustic wave device, or a mechanical moving body called a micromachine such as a micro acceleration sensor or actuator is used. Micro-mechanical devices cannot be combined.
These micromechanical devices are individually hermetically sealed using metal, ceramic, glass, or the like, and then mounted on a main substrate. FIG. 3 is a plan view and a longitudinal sectional view showing a structure of a conventional surface acoustic wave device, for example, and shows a structure in which a surface acoustic wave element is accommodated in a ceramic package 5 and a cap 9 is covered to hermetically seal. The plan view of (A) is a view in which the cap 9 is removed so that the inside can be seen. 1 is a piezoelectric substrate, 2 is an IDT electrode, 3 is a terminal electrode (bonding pad), 4 is a bonding wire, 5 is a ceramic package, 6 is a die bond resin, 7 is an internal terminal, 8 is an external terminal, 9 is a cap, and 10 is a cap. It is a hollow part. This hollow part 1
The air of 0 is replaced by an inert gas to protect the element.
The hollow portion 10 is an extremely important part for a surface acoustic wave device and a micro mechanical device. For example, in the case of a surface acoustic wave device, surface wave energy is concentrated on an IDT (interdigital electrode) surface on which a surface wave is excited and propagates, so that a condition is imposed on the vibrating function surface to be elastically open. Therefore, the hollow portion 10 is required. Similarly, since other micromechanical devices are mechanical moving bodies, an airtight sealing (hermetic seal) structure in which the hollow portion 10 is provided is inevitable. [0005] However, further miniaturization and high-density mounting and high-speed signal are required, and the LSI (large-scale integrated circuit) chip already formed as a multi-chip module is individually hermetically sealed. The delay time due to the wiring distance to the stopped micromechanical device must be reduced, and there is a demand for the micromechanical device to be mounted on a single module substrate in a bare chip state. SUMMARY OF THE INVENTION It is an object of the present invention to meet the above-mentioned needs and to realize a small-sized, high-density mounting and a high-speed signal, by mounting a micromechanical device in a bare chip state and securing a hollow portion. An object of the present invention is to provide a micro package structure that can be sealed with a resin together with a bare chip. [0007] A micro-package structure according to the present invention comprises a substrate of a micromechanical functional element having terminal electrodes extended from a mechanically operating part, and a substrate surrounding the mechanically operating part and including the substrate. A frame having an adhesive function and a flat upper end surface formed thereon, and a bump formed on a terminal electrode surface on the substrate outside the frame, and a face-down mounting of the frame on a mounting substrate. When the flat upper end surface and the mounting board are joined, a closed space is formed on the surface of the mechanically operating portion, and the bump is electrically connected to a conductor on the mounting board. Things. FIG. 1 is a structural view showing an embodiment of the present invention. For example, a surface acoustic wave device is shown as a micromechanical device. (A) is a plan view of a surface acoustic wave device in a chip state, and (B) is an XY plane thereof.
(C) shows a state in which the chip is mounted on a chip mounting substrate 17 , for example, a substrate of a multi-chip module by a face-down method. In FIG. 1, reference numeral 11 denotes a piezoelectric substrate, and 12 denotes an IDT electrode, which is a motion and vibration function portion. 13 is a terminal electrode, 14 is a frame formed of an insulating material having an adhesive function, 15 is a bump, 16 is a metal for improving adhesive strength, 17 is a mounting board, for example, a board of a multi-chip module, and 18 is a mounting board 17 thereof. The printed conductor 19 provided is a hollow part. Terminal electrode 13 and metal 16 for improving adhesive strength
Is formed by using photolithography and dry etching when forming the IDT electrode 12. At this time, the terminal electrodes 13 are formed to extend outside the frame 14 in advance. Further, the metal 16 for improving the adhesive strength is arranged around the working space. Next, a frame 14 having an adhesive function is formed on the metal 16 for improving the adhesive strength. As a material having this adhesive function, an insulating double-sided tape or a half-cured polyimide formed in a necessary pattern in advance is used. In the case of a tape, a tape having high thermal conductivity is more preferable.
Further, it is desirable to use a photosensitive and low stress material for the polyimide. Next, the terminal electrode 1 extended outside the frame 14
A bump 15 is formed on 3. At this time, the height of the bump 15 is higher than the height of the frame 14. The bumps 15 include solder bumps, conductive resin bumps, metal bumps, and the like. Any of the bump materials may be used. However, when stress due to the difference in the coefficient of thermal expansion between the device and the substrate becomes a problem, gold (A) is used.
u) metal bumps are suitable. In the processes up to this point, batch processing is performed on the wafer. Next, the wafer is separated into chips using a dicing machine for each device. Subsequently, the separated device is placed on a substrate, and the device is pressed against the substrate and heated. At this time, the bump 15 makes an electrical connection between the device and the substrate. When polyimide is used as the material of the frame 14, thermocompression bonding is performed at the time of mounting. First, the device is heated while being pressed against the substrate, and temporarily fixed. At this time, if the pressure is too strong, the bumps will be over-crushed and peel off from the substrate, so the pressure is adjusted. Next, the polyimide is fully cured. Since the polyimide shrinks when fully cured, the force with which the bump presses the substrate increases. Even in this state, if the number of electrodes is small, sufficient reliability of electrical connection can be obtained. When these packaging processes are completed, a hollow portion (sealed space) 19 is formed by the frame, the device, and the mounting board,
The operating space of the surface acoustic wave device is sealed in a hollow part. FIG. 2 shows a mounting method for obtaining higher reliability when the number of electrodes is large. In this method, bump 1
The conductive resin 20 is formed by screen printing on the tip of the fifth or on the mounting substrate 17 side. When Au is used for the bumps 15, the bumps and the substrate are only in contact with each other, and if the pressure during mounting is too strong, the bumps 15 may be electrically opened. Since the wafer often has warpage, when the number of electrodes is increased, the pressure is varied and some electrodes are opened. To eliminate these problems, the bump 15
It is effective to make an electrical connection using a conductive resin 20 formed by screen printing on the tip or the substrate side. Also, the method of adding the conductive resin 20 is useful for improving the reliability when the number of electrodes is small. By using these methods, other structures and sensors can be mounted. As described in detail above, according to the present invention, a micromechanical device can be directly mounted on a mounting substrate in a bare chip shape while securing a hollow portion thereof.
Since a ceramic package or the like is not required, a significant reduction in size and weight can be achieved, and the distance between wirings with other chips is shortened. Further, since it can be integrated with a semiconductor chip and can be applied with conventional resin sealing as it is, a multi-chip module equipped with a micromechanical device can be realized.
【図面の簡単な説明】 【図１】本発明の実施例を示す構造例図である。 【図２】本発明の他の実施例を示す切断端面図である。 【図３】従来の構造例図である。 【符号の説明】 １，１１ 圧電基板 ２，１２ ＩＤＴ電極 ３，１３ ボンディングパッド（端子電極） ４ ボンディングワイヤ ５ セラミックパッケージ ６ ダイボンド樹脂 ７ 内部端子 ８ 外部端子 ９ キャップ １０ 中空部 １４ 絶縁枠 １５ バンプ １６ 接着強度改善用金属 １７ 取付け基板 １８ 印刷導体 １９ 中空部 ２０ 導電性樹脂[Brief description of the drawings] FIG. 1 is a structural example diagram showing an embodiment of the present invention. FIG. 2 is a cut end view showing another embodiment of the present invention. FIG. 3 is a diagram showing an example of a conventional structure. [Explanation of symbols] 1,11 Piezoelectric substrate 2,12 IDT electrode 3,13 Bonding pad (terminal electrode) 4 Bonding wire 5 Ceramic package 6 Die bond resin 7 Internal terminals 8 External terminals 9 caps 10 hollow part 14 Insulation frame 15 Bump 16 Metals for improving adhesive strength 17 Mounting board 18 Printed conductor 19 hollow part 20 conductive resin
フロントページの続き (56)参考文献 特開 昭59−94441（ＪＰ，Ａ) 特開 平４−302209（ＪＰ，Ａ) 特開 平５−55303（ＪＰ，Ａ) 特開 平６−13426（ＪＰ，Ａ) 特開 平６−318625（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 21/60 311 H01L 23/02 Continuation of front page (56) References JP-A-59-94441 (JP, A) JP-A-4-302209 (JP, A) JP-A-5-55303 (JP, A) JP-A-6-13426 (JP) , A) JP-A-6-318625 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 21/60 311 H01L 23/02
Claims (1)
極を有する微小機械的機能素子の基板と、前記機械的動
作部分を囲み該基板上に形成された上端面が平らで接着
機能をもつ枠と、該枠の外側の前記基板上の端子電極面
に形成されたバンプとを備え、取付け基板にフェイスダ
ウン実装を用いて前記枠の平らな上端面と該取付け基板
とが接合されたとき前記機械的動作部分の表面に密閉空
間が形成され、前記バンプによって取付け基板上の導体
に導通接続されるように構成したマイクロパッケージ構
造。(57) Claims 1. A substrate of a micromechanical functional element having terminal electrodes drawn out from a mechanically operating portion, and a substrate formed on the substrate surrounding the mechanically operating portion. A frame having a flat end surface and an adhesive function, and a bump formed on a terminal electrode surface on the substrate outside the frame, and a flat upper end surface of the frame using face-down mounting on a mounting substrate, and A micro-package structure, wherein a closed space is formed on the surface of the mechanically operating portion when the mounting board is joined, and the bump is electrically connected to a conductor on the mounting board by the bump.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04840396A JP3514349B2 (en) | 1996-02-13 | 1996-02-13 | Micro package structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04840396A JP3514349B2 (en) | 1996-02-13 | 1996-02-13 | Micro package structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09219423A JPH09219423A (en) | 1997-08-19 |
| JP3514349B2 true JP3514349B2 (en) | 2004-03-31 |
Family
ID=12802346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP04840396A Expired - Fee Related JP3514349B2 (en) | 1996-02-13 | 1996-02-13 | Micro package structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3514349B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1757556A2 (en) | 2005-08-22 | 2007-02-28 | Sony Corporation | Packaging a semiconductor device |
| WO2008023465A1 (en) * | 2006-08-25 | 2008-02-28 | Kyocera Corporation | Microelectronic machine mechanism device, and its manufacturing method |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3003670B2 (en) | 1998-05-25 | 2000-01-31 | 日本電気株式会社 | Micro actuator and manufacturing method thereof |
| IL133453A0 (en) * | 1999-12-10 | 2001-04-30 | Shellcase Ltd | Methods for producing packaged integrated circuit devices and packaged integrated circuit devices produced thereby |
| JP2004358603A (en) * | 2003-06-04 | 2004-12-24 | Shinko Electric Ind Co Ltd | Method of manufacturing micro-device |
| DE10350460B4 (en) | 2003-10-29 | 2006-07-13 | X-Fab Semiconductor Foundries Ag | Method for producing semiconductor devices having micromechanical and / or microelectronic structures, which result from the fixed connection of at least two semiconductor wafers, and corresponding arrangement |
| JP4831949B2 (en) | 2004-09-08 | 2011-12-07 | 株式会社デンソー | Physical quantity sensor device |
| JP4365308B2 (en) * | 2004-12-02 | 2009-11-18 | 富士通株式会社 | Micro oscillating device |
| JP4138736B2 (en) * | 2004-12-02 | 2008-08-27 | 富士通株式会社 | Micro oscillating device |
| WO2007058280A1 (en) * | 2005-11-16 | 2007-05-24 | Kyocera Corporation | Electronic part sealing board, electronic part sealing board in multiple part form, electronic device using electronic part sealing board, and electronic device fabricating method |
| JP5013824B2 (en) * | 2005-11-16 | 2012-08-29 | 京セラ株式会社 | Electronic component sealing substrate, plural-shaped electronic component sealing substrate, electronic device using electronic component sealing substrate, and method of manufacturing electronic device |
| JP4731291B2 (en) * | 2005-11-25 | 2011-07-20 | 京セラ株式会社 | Electronic component sealing substrate, electronic device using the same, and method of manufacturing electronic device |
| KR100826394B1 (en) * | 2007-05-17 | 2008-05-02 | 삼성전기주식회사 | Method for manufacturing semiconductor package |
-
1996
- 1996-02-13 JP JP04840396A patent/JP3514349B2/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1757556A2 (en) | 2005-08-22 | 2007-02-28 | Sony Corporation | Packaging a semiconductor device |
| WO2008023465A1 (en) * | 2006-08-25 | 2008-02-28 | Kyocera Corporation | Microelectronic machine mechanism device, and its manufacturing method |
| JPWO2008023465A1 (en) * | 2006-08-25 | 2010-01-07 | 京セラ株式会社 | Micro-electromechanical mechanism device and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09219423A (en) | 1997-08-19 |
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