DE102013226334A1 - Circuit carrier with a sintered semiconductor device - Google Patents

Circuit carrier with a sintered semiconductor device Download PDF

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Publication number
DE102013226334A1
DE102013226334A1 DE102013226334.1A DE102013226334A DE102013226334A1 DE 102013226334 A1 DE102013226334 A1 DE 102013226334A1 DE 102013226334 A DE102013226334 A DE 102013226334A DE 102013226334 A1 DE102013226334 A1 DE 102013226334A1
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Germany
Prior art keywords
sintered
circuit carrier
expansion coefficient
sintered layer
semiconductor device
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DE102013226334.1A
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German (de)
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DE102013226334B4 (en
Inventor
Hubert Zoller
Alfred Goerlach
Thomas Knupfer
Thomas Kalich
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Robert Bosch GmbH
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Robert Bosch GmbH
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Abstract

Die Erfindung betrifft einen Schaltungsträger. Der Schaltungsträger weist einen insbesondere massiv ausgebildeten Halbleiterbaustein auf. Der Halbleiterbaustein weist wenigstens einen elektrischen Anschluss auf. Bevorzugt bildet der elektrische Anschluss einen Oberflächenbereich des Halbleiterbausteins. Der Anschluss ist mittels wenigstens eines gesinterten elektrischen Verbindungsmittels mit einem elektrischen Kontakt verbunden. Der Kontakt und der Halbleiterbaustein bilden jeweils einen Fügepartner für das gesinterte Verbindungsmittel. Erfindungsgemäß ist das Verbindungsmittel zwischen dem Anschluss und dem Kontakt durch wenigstens zwei in ihrer flachen Erstreckung einander kontaktierenden Sinterschichten gebildet. Ein thermischer Ausdehnungskoeffizient wenigstens einer der Sinterschichten oder aller Sinterschichten liegt bevorzugt zwischen dem Ausdehnungskoeffizienten des Fügepartners und dem Ausdehnungskoeffizienten der zu der Sinterschicht benachbarten Sinterschicht. The invention relates to a circuit carrier. The circuit carrier has a particularly solid semiconductor device. The semiconductor device has at least one electrical connection. The electrical connection preferably forms a surface region of the semiconductor component. The terminal is connected to an electrical contact by means of at least one sintered electrical connection means. The contact and the semiconductor module each form a joining partner for the sintered connection means. According to the invention, the connection means between the connection and the contact is formed by at least two sintered layers contacting each other in their flat extension. A thermal expansion coefficient of at least one of the sintered layers or all sintered layers is preferably between the expansion coefficient of the joining partner and the expansion coefficient of the sintered layer adjacent to the sintered layer.

Figure DE102013226334A1_0001
Figure DE102013226334A1_0001

Description

Stand der TechnikState of the art

Die Erfindung betrifft einen Schaltungsträger. Der Schaltungsträger weist einen insbesondere massiv ausgebildeten Halbleiterbaustein auf. Der Halbleiterbaustein weist wenigstens einen elektrischen Anschluss auf. Bevorzugt bildet der elektrische Anschluss einen Oberflächenbereich des Halbleiterbausteins. Der Anschluss ist mittels wenigstens eines gesinterten elektrischen Verbindungsmittels mit einem elektrischen Kontakt verbunden. Der Kontakt und der Halbleiterbaustein bilden jeweils einen Fügepartner für das gesinterte Verbindungsmittel.The invention relates to a circuit carrier. The circuit carrier has a particularly solid semiconductor device. The semiconductor device has at least one electrical connection. The electrical connection preferably forms a surface region of the semiconductor component. The terminal is connected to an electrical contact by means of at least one sintered electrical connection means. The contact and the semiconductor module each form a joining partner for the sintered connection means.

Bei aus dem Stand der Technik bekannten Halbleiterbausteinen, insbesondere massiv ausgebildeten Halbleiterbausteinen, auch Bare-Die genannt, besteht das Problem, dass es bei einem Betrieb zu einer Rissbildung des Halbleiterbausteins oder des Verbindungsmittels, insbesondere einer Silber-Sinter-Verbindung, kommen kann. Weiter kann beim Betrieb eine Delamination zwischen der Sinterschicht und einem durch eine Metallschicht gebildeten elektrischen Anschluss des Halbleiterbausteins, oder zwischen dem Anschluss und dem Halbleiterbaustein selbst auftreten.In known from the prior art semiconductor devices, in particular solid semiconductor devices, also called Bare-Die, there is the problem that it may come in operation to cracking of the semiconductor device or the bonding agent, in particular a silver-sintered compound. Further, during operation, delamination may occur between the sintered layer and an electrical terminal of the semiconductor device formed by a metal layer, or between the terminal and the semiconductor device itself.

Offenbarung der ErfindungDisclosure of the invention

Erfindungsgemäß ist das Verbindungsmittel der eingangs genannten Art zwischen dem Anschluss und dem Kontakt durch wenigstens zwei in ihrer flachen Erstreckung einander kontaktierenden Sinterschichten gebildet. Ein thermischer Ausdehnungskoeffizient wenigstens einer der Sinterschichten oder aller Sinterschichten liegt bevorzugt zwischen dem Ausdehnungskoeffizienten des Fügepartners und dem Ausdehnungskoeffizienten der zu der Sinterschicht benachbarten Sinterschicht. According to the invention, the connection means of the type mentioned above is formed between the connection and the contact by at least two sinter layers which contact one another in their flat extension. A thermal expansion coefficient of at least one of the sintered layers or all sintered layers is preferably between the expansion coefficient of the joining partner and the expansion coefficient of the sintered layer adjacent to the sintered layer.

Bevorzugt sind die thermischen Ausdehnungskoeffizienten von zwei aneinandergrenzenden Sinterschichten zueinander verschieden. The thermal expansion coefficients of two adjacent sintered layers are preferably different from one another.

Dadurch kann vorteilhaft eine in diesem Ausführungsbeispiel gestufte Anpassung des thermischen Ausdehnungskoeffizienten von dem Halbleitermaterial, bis hin zu dem elektrischen Kontakt erzeugt sein. As a result, an adaptation of the coefficient of thermal expansion, graded in this exemplary embodiment, from the semiconductor material to the electrical contact can advantageously be generated.

Es wurde nämlich erkannt, dass zueinander verschiedene thermische Ausdehnungskoeffizienten des Halbleiterbausteins, insbesondere eines Halbleitermaterials des Halbleiterbausteins, dem Verbindungsmittel und dem elektrischen Kontakt die eingangs erwähnte Rissbildung bewirken kann.It has been recognized that mutually different thermal expansion coefficients of the semiconductor device, in particular of a semiconductor material of the semiconductor device, the connection means and the electrical contact can cause the cracking mentioned above.

In einer bevorzugten Ausführungsform ist das Verbindungsmittel zwischen dem Anschluss und dem Kontakt durch wenigstens drei oder wenigstens vier in ihrer flachen Erstreckung einander kontaktierenden Sinterschichten gebildet. Bevorzugt liegt ein thermischer Ausdehnungskoeffizient der Sinterschicht zwischen dem Ausdehnungskoeffizienten der zu der Sinterschicht benachbarten Sinterschichten beziehungsweise des Fügepartners. So kann vorteilhaft eine gute Stufenanpassung des Ausdehnungskoeffizienten zwischen den Fügepartnern gebildet sein.In a preferred embodiment, the connecting means between the terminal and the contact by at least three or at least four in their flat extension contacting sintered layers formed. A thermal expansion coefficient of the sintered layer is preferably located between the expansion coefficient of the sintering layers or the joining partner adjacent to the sintered layer. Thus, advantageously, a good step adaptation of the expansion coefficient between the joining partners can be formed.

Beispielsweise weist das Halbleitermaterial des Halbleiterbausteins den kleinsten thermischen Ausdehnungskoeffizienten auf. Vorteilhaft weist die Sinterschicht, welche den Halbleiterbaustein über den elektrischen Anschluss kontaktiert, einen thermischen Ausdehnungskoeffizienten auf, welcher größer ist als der thermische Ausdehnungskoeffizient des Halbleitermaterials. Die Sinterschicht, welche den Halbleiterbaustein über den elektrischen Anschluss unmittelbar kontaktiert, ist von einer weiteren Sinterschicht, insbesondere einer reinen Silberschicht, kontaktiert. Die reine Silberschicht weist beispielsweise einen thermischen Ausdehnungskoeffizienten von 19 ppm pro Kelvin auf. Das Halbleitermaterial weist beispielsweise einen thermischen Ausdehnungskoeffizienten von drei ppm pro Kelvin auf. Die Sinterschicht, welche zwischen der reinen Silbersinterschicht und dem Halbleiterbaustein angeordnet ist, weist bevorzugt einen thermischen Ausdehnungskoeffizienten auf, welcher zwischen dem Ausdehnungskoeffizient der Silbersinterschicht und dem des Halbleiterbausteins liegt, bevorzugt in der Mitte zwischen den zuvor genannten Ausdehnungskoeffizienten. Beispielsweise beträgt der thermische Ausdehnungskoeffizient der Sinterschicht, welcher den Halbleiterbaustein über den elektrischen Anschluss kontaktiert, elf ppm pro Kelvin. Die so gebildete Sinterschicht kann beispielsweise mittels eines Beimischens oder Anfüllens von Silber erzeugt werden, wobei das beigemischte oder angefüllte Material einen thermischen Ausdehnungskoeffizienten aufweist, welcher kleiner ist als der Ausdehnungskoeffizient von Silber. Für die zuvor genannte zwischen der Silbersinterschicht und dem Halbleiterbaustein angeordnete Sinterschicht mögliche Füllpartner sind beispielsweise Wolfram, welches einen thermischen Ausdehnungskoeffizient von 4,5 ppm pro Kelvin aufweist, oder Eisen, welches einen thermischen Ausdehnungskoeffizient von 11,8 ppm pro Kelvin aufweist. For example, the semiconductor material of the semiconductor device has the smallest coefficient of thermal expansion. Advantageously, the sintered layer, which contacts the semiconductor component via the electrical connection, has a thermal expansion coefficient which is greater than the thermal expansion coefficient of the semiconductor material. The sintered layer, which directly contacts the semiconductor component via the electrical connection, is contacted by a further sintered layer, in particular a pure silver layer. The pure silver layer has, for example, a thermal expansion coefficient of 19 ppm per Kelvin. The semiconductor material has, for example, a thermal expansion coefficient of three ppm per Kelvin. The sintered layer, which is arranged between the pure silver sintered layer and the semiconductor component, preferably has a thermal expansion coefficient which lies between the coefficient of expansion of the silver sintered layer and that of the semiconductor component, preferably in the middle between the aforementioned coefficients of expansion. By way of example, the coefficient of thermal expansion of the sintered layer, which contacts the semiconductor module via the electrical connection, is 11 ppm per Kelvin. The sintered layer thus formed can be produced, for example, by means of admixing or filling silver, the admixed or filled material having a thermal expansion coefficient which is smaller than the coefficient of expansion of silver. For the aforementioned sintering layer arranged between the silver sintered layer and the semiconductor module, possible filling partners are, for example, tungsten, which has a thermal expansion coefficient of 4.5 ppm per Kelvin, or iron which has a thermal expansion coefficient of 11.8 ppm per Kelvin.

In einer bevorzugten Ausführungsform des Schaltungsträgers ist der Ausdehnungskoeffizient des Halbleitermaterials kleiner als der Ausdehnungskoeffizient des elektrischen Kontaktes. So kann vorteilhaft ausgehend vom Halbleitermaterial, welches beispielsweise im Falle von Silizium einem thermischen Ausdehnungskoeffizienten von 2,6 ppm pro Kelvin aufweist, zum elektrischen Kontakt hin ein stufenweiser Anstieg des Ausdehnungskoeffizienten in den jeweiligen Schichten ausgebildet sein.In a preferred embodiment of the circuit carrier, the coefficient of expansion of the semiconductor material is smaller than the coefficient of expansion of the electrical contact. Thus, advantageously starting from the semiconductor material which, for example in the case of silicon, a thermal expansion coefficient of 2.6 ppm per Kelvin, be formed for electrical contact a stepwise increase in the expansion coefficient in the respective layers.

In einer bevorzugten Ausführungsform weist der Halbleiterbaustein wenigstens zwei elektrische Anschlüsse auf, welche jeweils durch zueinander parallel erstreckende Flächenbereiche des Halbleiterbausteins gebildet sind. Bevorzugt ist ein Anschluss über wenigstens zwei Sinterschichten durch den Kontakt kontaktiert und der weitere Anschluss über wenigstens zwei Sinterschichten durch einen mit einem Substrat des Schaltungsträgers verbundenen Kontakt, oder einen durch das Substrat selbst gebildeten Kontakt kontaktiert. Der durch das Substrat selbst gebildete Kontakt ist beispielsweise durch ein Kupferblech gebildet. In a preferred embodiment, the semiconductor component has at least two electrical connections, which are each formed by surface areas of the semiconductor component that extend parallel to one another. A connection is preferably contacted by the contact via at least two sintered layers, and the further connection is contacted via at least two sintered layers by a contact connected to a substrate of the circuit carrier, or a contact formed by the substrate itself. The contact formed by the substrate itself is formed, for example, by a copper sheet.

Mittels des so gebildeten Schaltungsträgers kann der Halbleiterbaustein vorteilhaft nach Art eines Sandwiches zwischen Silbersinterschichten eingebunden sein, wobei die Silbersinterschichten selbst über Zwischensinterschichten an den Halbleiterbaustein beziehungsweise an den elektrischen Kontakt angebunden sind.By means of the circuit carrier thus formed, the semiconductor device can advantageously be integrated in the manner of a sandwich between silver sintered layers, wherein the silver sintered layers are themselves connected via intermediate sintered layers to the semiconductor component or to the electrical contact.

In einer bevorzugten Ausführungsform ist wenigstens eine Sinterschicht durch eine silberhaltige Schicht oder eine Silberschicht gebildet. So kann vorteilhaft eine aufwandsgünstig bereitzustellende und gut elektrisch leitfähige Sinterschicht ausgebildet sein.In a preferred embodiment, at least one sintered layer is formed by a silver-containing layer or a silver layer. Thus, advantageously, a cost-effectively provided and well electrically conductive sintered layer can be formed.

In einer bevorzugten Ausführungsform weist wenigstens eine Sinterschicht einen Füllstoff auf, wobei der Füllstoff ausgebildet ist, beim Versintern einen Stoffschluss mit einem Matrixmaterial der Sinterschicht auszubilden. Das Matrixmaterial der Sinterschicht bildet bevorzugt einen Hauptanteil, insbesondere einen Hauptvolumenanteil der Sinterschicht. Die so den Füllstoff aufweisende Sinterschicht kann die zuvor erwähnte Sinterschicht aus reinem Silber ersetzen, so dass der thermische Ausdehnungskoeffizient kleiner sein kann als der des elektrischen Kontaktes, insbesondere Kupferkontaktes.In a preferred embodiment, at least one sintered layer has a filler, wherein the filler is designed to form a material bond with a matrix material of the sintering layer during sintering. The matrix material of the sintered layer preferably forms a major portion, in particular a major volume fraction of the sintered layer. The sintered layer thus having the filler may replace the aforementioned pure silver sintered layer, so that the thermal expansion coefficient may be smaller than that of the electrical contact, in particular copper contact.

In einer bevorzugten Ausführungsform des Schaltungsträgers umfasst der Füllstoff ein Metall, insbesondere wenigstens ein Metall aus der Gruppe, nur ein Metall aus der Gruppe, oder eine Mischung der Metalle aus der Gruppe umfassend Eisen, Wolfram, Invar und Kovar. Das Metall weist bevorzugt eine kleinere thermische Ausdehnung auf als das Matrixmaterial, insbesondere Silber. Das Invar weist vorteilhaft nur eine geringe oder keine thermische Ausdehnung auf. Bevorzugt weist das Invar Eisen und Nickel auf. Weiter bevorzugt beträgt ein Nickelanteil des Invars, insbesondere einer Invar-Legierung zwischen 30 und 50 Prozent, weiter bevorzugt zwischen 33 und 38 Prozent, besonders bevorzugt zwischen 35 und 36 Prozent. Bevorzugt weist die Invar-Legierung zwischen 2 und 5 Prozent Kobalt auf.In a preferred embodiment of the circuit carrier, the filler comprises a metal, in particular at least one metal from the group, only one metal from the group, or a mixture of the metals from the group comprising iron, tungsten, Invar and Kovar. The metal preferably has a smaller thermal expansion than the matrix material, in particular silver. The Invar advantageously has little or no thermal expansion. Preferably, the invar has iron and nickel. More preferably, a nickel content of the Invar, in particular an Invar alloy, is between 30 and 50 percent, more preferably between 33 and 38 percent, particularly preferably between 35 and 36 percent. Preferably, the Invar alloy has between 2 and 5 percent cobalt.

Weitere vorteilhafte Invar-Legierungen sind jeweils aus Legierungsbestandteilen umfassend Nickel und Eisen, Platin und Eisen, Palladium und Eisen, Mangan und Eisen, Mangan und Kobalt, Platin, Nickel und Eisen, Mangan, Nickel und Eisen, Kobalt, Mangan und Eisen, Chrom und Eisen gebildet.Further advantageous Invar alloys are each composed of alloying constituents comprising nickel and iron, platinum and iron, palladium and iron, manganese and iron, manganese and cobalt, platinum, nickel and iron, manganese, nickel and iron, cobalt, manganese and iron, chromium and Iron formed.

Das Kovar weist bevorzugt Eisen, Nickel und Kobalt auf. Bevorzugt beträgt ein Nickelanteil des Kovars bis zu 30 Prozent, ein Kobaltanteil zwischen 15 und 20 Prozent, bevorzugt 17 Prozent und der Restanteil ist durch Eisen gebildet.The kovar preferably has iron, nickel and cobalt. Preferably, a nickel content of the kovar is up to 30 percent, a cobalt content between 15 and 20 percent, preferably 17 percent and the remainder is formed by iron.

So kann vorteilhaft aufwandsgünstig von einer Silbersinterschicht ausgehend, zu dem Halbleitermaterial eine gefüllte Silbersinterschicht gebildet sein, welche einen kleineren Ausdehnungskoeffizienten als Silber aufweist und einen größeren Ausdehnungskoeffizienten als das Halbleitermaterial des Halbleiterbausteins.Thus, starting from a silver sintered layer, a filled silver sintered layer can advantageously be formed, which has a smaller coefficient of expansion than silver and a larger expansion coefficient than the semiconductor material of the semiconductor chip.

In einer bevorzugten Ausführungsform weist wenigstens eine Sinterschicht Füllpartikel auf. Die Füllpartikel sind ausgebildet, beim Versintern keinen Stoffschluss mit einem Sintermetall der Sinterschicht auszubilden und in der gesinterten Schicht als Füllpartikel erhalten zu bleiben. Ein Ausdehnungskoeffizient der Füllpartikel unterscheidet sich bevorzugt von dem Ausdehnungskoeffizient des Sintermetalls. Das Sintermetall ist bevorzugt Silber. Die Füllpartikel sind bevorzugt durch wenigstens ein Metalloxid, insbesondere Keramikpartikel oder Glaspartikel, gebildet. Die Keramikpartikel sind beispielsweise Aluminiumoxidpartikel, die Glaspartikel beispielsweise Siliziumdioxidpartikel. Die Metalloxidpartikel können vorteilhaft – in entsprechend kleinem Anteil zu dem Matrixmaterial der Sinterschicht zugesetzt, ohne die elektrische Leitfähigkeit der so gebildeten beigemischten Sinterschicht wesentlich zu verschlechtern – den thermischen Ausdehnungskoeffizient und so eine Rissbildung in günstiger Weise beeinflussen. Die zuvor benannten Füllstoffe zum Ausbilden einer beigemischten Sinterschicht, insbesondere Eisen und/oder Wolfram, sind vorteilhaft selbst elektrisch leitfähig, sodass eine elektrische Leitfähigkeit der so beigemischten Sinterschicht nicht wesentlich im Vergleich zu einer reinen Silberschicht verschlechtert ist.In a preferred embodiment, at least one sintered layer has filler particles. The filler particles are designed to form no material bond with a sintered metal of the sintered layer during sintering and to remain in the sintered layer as filler particles. An expansion coefficient of the filler particles preferably differs from the expansion coefficient of the sintered metal. The sintered metal is preferably silver. The filler particles are preferably formed by at least one metal oxide, in particular ceramic particles or glass particles. The ceramic particles are, for example, aluminum oxide particles, the glass particles, for example silicon dioxide particles. The metal oxide particles can advantageously - added in a correspondingly small proportion to the matrix material of the sintered layer, without significantly deteriorating the electrical conductivity of the admixed sintered layer thus formed - the coefficient of thermal expansion and thus favorably influence a cracking. The above-mentioned fillers for forming a mixed sintered layer, in particular iron and / or tungsten, are advantageously themselves electrically conductive, so that an electrical conductivity of the sintering layer so mixed is not significantly worsened compared to a pure silver layer.

In einer bevorzugten Ausführungsform sind die Füllpartikel durch ein Halbleitermaterial gebildet. Das Halbleitermaterial ist beispielsweise Silizium oder Germanium oder Selen. Vorteilhaft weisen die Halbleitermaterialien als Beimischungspartner für das Sinter-Matrix-Material, beispielsweise Silber, sowohl einen kleinen thermischen Ausdehnungskoeffizient aus, der einen Gesamtausdehnungskoeffizienten der beigemischten Silberschicht im Vergleich zu einer reinen Silberschicht verkleinern kann, als auch dieselben kristallinen Eigenschaften, insbesondere kristallbildenden Eigenschaften wie das Halbleitermaterial, sodass die beigemischte Sinterschicht hinsichtlich ihrer Textur der Textur des Halbleitermaterials ähnlich ist. In a preferred embodiment, the filler particles are formed by a semiconductor material. The semiconductor material is, for example, silicon or germanium or selenium. Advantageously, the semiconductor materials as admixing partner for the sintered matrix material, for example silver, both a small coefficient of thermal expansion, of a total expansion coefficient of the mixed silver layer in comparison to a pure silver layer, as well as the same crystalline properties, in particular crystal-forming properties such as the semiconductor material, so that the mixed sintered layer is similar in texture to the texture of the semiconductor material.

Die Erfindung wird nun im Folgenden anhand von Figuren und weiteren Ausführungsbeispielen beschrieben. Weitere vorteilhafte Ausführungsvarianten ergeben sich aus den in den abhängigen Ansprüchen und in den Figuren beschriebenen Merkmalen.The invention will now be described below with reference to figures and further embodiments. Further advantageous embodiments will become apparent from the features described in the dependent claims and in the figures.

1 zeigt ein Ausführungsbeispiel für einen Schaltungsträger, bei dem ein Leistungshalbleiter mit einem Substrat und einem elektrisch leitfähigen Kontakt über eine thermisch optimierte Sinterverbindung stoffschlüssig verbunden ist; 1 shows an exemplary embodiment of a circuit carrier in which a power semiconductor is materially connected to a substrate and an electrically conductive contact via a thermally optimized sintered connection;

2 zeigt ein Ausführungsbeispiel für einen Schaltungsträger, bei dem ein Leistungshalbleiter einseitig mit einem keramischen Substrat und zwei mit dem Substrat verbundenen elektrisch leitfähigen Kontakten jeweils über eine thermisch optimierte Sinterverbindung stoffschlüssig verbunden ist. 2 shows an embodiment of a circuit carrier, in which a power semiconductor is integrally connected on one side with a ceramic substrate and two electrically conductive contacts connected to the substrate in each case via a thermally optimized sintered connection.

1 zeigt ein Ausführungsbeispiel für einen Schaltungsträger 1. Der Schaltungsträger 1 weist einen Halbleiterbaustein 2 auf, welcher in diesem Ausführungsbeispiel durch einen Leistungshalbleiter, insbesondere einen quaderförmigen Leistungshalbleiter, im Englischen auch Bare-Die genannt, gebildet ist. Der Halbleiterbaustein 2 weist in diesem Ausführungsbeispiel zwei jeweils einen Oberflächenbereich bildende und zueinander sich parallel erstreckende elektrische Anschlüsse 4 und 5 auf. Die Anschlüsse 4 und 5 sind beispielsweise jeweils durch eine Oberflächenmetallisierung des Halbleiterbausteins 2 gebildet, welche eine stoffschlüssige Sinteranbindung einer Sinterschicht beim Versintern des Halbleiterbausteins 2 mit einem elektrischen Kontakt erleichtert. 1 shows an embodiment of a circuit carrier 1 , The circuit carrier 1 has a semiconductor device 2 on, which in this embodiment by a power semiconductor, in particular a cuboid power semiconductors, also called Bare-Die, is formed. The semiconductor device 2 In this exemplary embodiment, two electrical connections each forming a surface area and extending parallel to one another are provided 4 and 5 on. The connections 4 and 5 are each, for example, by a surface metallization of the semiconductor device 2 formed, which a cohesive sintered bond of a sintered layer during sintering of the semiconductor device 2 facilitated with an electrical contact.

Der Schaltungsträger 1 weist in diesem Ausführungsbeispiel auch einen elektrischen Kontakt 7 auf und ein Substrat 8. Das Substrat 8 und der elektrische Kontakt 7 sind in diesem Ausführungsbeispiel jeweils als Kupferblech ausgebildet. The circuit carrier 1 also has an electrical contact in this embodiment 7 on and a substrate 8th , The substrate 8th and the electrical contact 7 are each formed in this embodiment as a copper sheet.

Der Halbleiterbaustein 2 ist über den elektrischen Anschluss 4 mit einer gefüllten Sinterschicht 13 verbunden. Die gefüllte Sinterschicht 13 weist in diesem Ausführungsbeispiel als Sintermatrixmaterial Silber und als Füllmaterial 14, welches einen Stoffschluss mit dem Sintermatrixmaterial ausbildet, insbesondere Eisen oder Invar auf. Zusätzlich zu dem Füllmaterial 14 weist die gefüllte Sinterschicht 13 Füllpartikel 15 auf. Die Füllpartikel 15 sind in diesem Ausführungsbeispiel aus Halbleitermaterial, insbesondere Silizium, gebildet. So kann die gefüllte Sinterschicht 13 vorteilhaft einen thermischen Ausdehnungskoeffizienten zwischen fünf und neun ppm pro Kelvin aufweisen. Die gefüllte Sinterschicht 13 ist über eine weitere Sinterschicht 9 mit dem elektrischen Kontakt 7 verbunden. Die weitere Sinterschicht 9 ist somit nach Art eines Sandwiches zwischen der gefüllten Sinterschicht 13 und dem elektrischen Kontakt 7 angeordnet. Die weitere Sinterschicht 9 weist einen thermischen Ausdehnungskoeffizienten auf, welcher zwischen dem Ausdehnungskoeffizienten der gefüllten Sinterschicht 13 und dem Ausdehnungskoeffizienten des elektrischen Kontakts 7 liegt.The semiconductor device 2 is over the electrical connection 4 with a filled sintered layer 13 connected. The filled sintered layer 13 has silver as a sintered matrix material and filler material in this embodiment 14 which forms a material bond with the sintered matrix material, in particular iron or invar. In addition to the filler 14 indicates the filled sintered layer 13 filler particles 15 on. The filler particles 15 are formed in this embodiment of semiconductor material, in particular silicon. So can the filled sintered layer 13 advantageously have a thermal expansion coefficient between five and nine ppm per Kelvin. The filled sintered layer 13 is over another sintered layer 9 with the electrical contact 7 connected. The further sintered layer 9 is thus in the manner of a sandwich between the filled sintered layer 13 and the electrical contact 7 arranged. The further sintered layer 9 has a thermal expansion coefficient which is between the expansion coefficient of the filled sintered layer 13 and the expansion coefficient of the electrical contact 7 lies.

Das Material des elektrischen Kontakts 7 ist beispielsweise Kupfer. Die Sinterschicht 9, welche beispielsweise Silber als Sintermatrixmaterial aufweist, kann zum Herabsetzen des Ausdehnungskoeffizienten von reinem Silber ein Füllmaterial 14, beispielsweise Eisen, aufweisen.The material of the electrical contact 7 is, for example, copper. The sintered layer 9 For example, which has silver as a sintered matrix material, for example, a filler may be used to lower the expansion coefficient of pure silver 14 , For example, iron.

Der Halbleiterbaustein 2 ist mit dem elektrischen Anschluss 5 mit einer gefüllten Sinterschicht 12 verbunden. Die gefüllte Sinterschicht 12 weist wie die gefüllte Sinterschicht 13 ein Füllmaterial 14, beispielsweise Eisen, und Füllpartikel 15, beispielsweise Siliziumpartikel, auf. Der thermische Ausdehnungskoeffizient der gefüllten Sinterschicht 12 beträgt beispielsweise wie der thermische Ausdehnungskoeffizient der gefüllten Sinterschicht 13 zwischen fünf und neun ppm pro Kelvin.The semiconductor device 2 is with the electrical connection 5 with a filled sintered layer 12 connected. The filled sintered layer 12 points like the filled sintered layer 13 a filler 14 , for example iron, and filler particles 15 , For example, silicon particles on. The thermal expansion coefficient of the filled sintered layer 12 is, for example, like the thermal expansion coefficient of the filled sintered layer 13 between five and nine ppm per Kelvin.

Die gefüllte Sinterschicht 12 ist über eine weitere Sinterschicht 11 mit dem Substrat 8, beispielsweise einem Kupferblech, verbunden. Die Sinterschicht 11 weist wie die Sinterschicht 9 Silber als Matrixsintermaterial und zum Herabsetzen des thermischen Ausdehnungskoeffizienten ein Füllmaterial 14, beispielsweise Eisen oder Wolfram auf.The filled sintered layer 12 is over another sintered layer 11 with the substrate 8th , For example, a copper sheet, connected. The sintered layer 11 points like the sintered layer 9 Silver as a matrix sintered material and to lower the thermal expansion coefficient of a filler 14 , For example, iron or tungsten.

Die Sinterschichten 9, 13, 12 und 11 können jeweils zusätzlich oder unabhängig von dem Füllmaterial 14 wenigstens ein weiteres Füllmaterial 18 aufweisen, beispielsweise Invar. The sintered layers 9 . 13 . 12 and 11 may each additionally or independently of the filler material 14 at least one other filler 18 have, for example Invar.

Der elektrische Kontakt 7 und das Substrat 8, welche jeweils einen zuvor genannten Fügepartner bilden, sind beispielsweise aus Kupfer gebildet und weisen einen thermischen Ausdehnungskoeffizienten auf, welcher größer ist als der thermische Ausdehnungskoeffizient des Halbleiterbausteins 2. Die Sinterschichten 9 und 11 weisen jeweils einen thermischen Ausdehnungskoeffizienten auf, welcher kleiner ist als der Ausdehnungskoeffizient des elektrischen Kontakts 7 beziehungsweise des Substrats 8 und welcher größer ist als der thermische Ausdehnungskoeffizient des Halbleiterbausteins 2. Die Sinterschichten 12 und 13 weisen jeweils einen thermischen Ausdehnungskoeffizienten auf, welcher größer ist als der des Halbleiterbausteins 2 und welcher kleiner ist als der thermische Ausdehnungskoeffizient der Sinterschichten 9 und 11. Somit liegt der thermische Ausdehnungskoeffizient der Sinterschicht 9 zwischen dem Ausdehnungskoeffizienten des elektrischen Anschlusses 7 und dem Ausdehnungskoeffizienten der Sinterschicht 13 und der Ausdehnungskoeffizient der Sinterschicht 13 zwischen dem Ausdehnungskoeffizienten der Sinterschicht 9 und dem Ausdehnungskoeffizienten des Halbleiterbausteins 2. The electrical contact 7 and the substrate 8th , which each form a previously mentioned joining partner, are formed for example of copper and have a thermal expansion coefficient which is greater than the thermal expansion coefficient of the semiconductor device 2 , The sintered layers 9 and 11 each have a thermal expansion coefficient which is smaller than the coefficient of expansion of the electrical contact 7 or the substrate 8th and which is greater than the thermal expansion coefficient of the semiconductor device 2 , The sintered layers 12 and 13 each have a thermal expansion coefficient which is greater than that of the semiconductor device 2 and which is smaller than the thermal expansion coefficient of the sintered layers 9 and 11 , Thus, the thermal expansion coefficient of the sintered layer is 9 between the expansion coefficient of the electrical connection 7 and the expansion coefficient of the sintered layer 13 and the expansion coefficient of the sintered layer 13 between the expansion coefficient of the sintered layer 9 and the expansion coefficient of the semiconductor device 2 ,

Die thermischen Ausdehnungskoeffizienten der Sinterschichten 11 und 12 liegen somit ebenfalls zwischen den thermischen Ausdehnungskoeffizienten der zu den jeweils benachbarten Sinterschichten beziehungsweise Fügepartnern.The thermal expansion coefficients of the sintered layers 11 and 12 are therefore also between the thermal expansion coefficients of the respective adjacent sintered layers or joining partners.

Der in 1 gezeigte Halbleiterbaustein 2 ist beispielsweise durch einen Transistor, insbesondere einen Feldeffekttransistor oder ein IGBT, oder eine Diode gebildet. Die Anschlüsse 4 und 5 bilden jeweils einen Anschluss einer Schaltstrecke des Transistors, im Falle des Feldeffekttransistors einen Source- oder Drain-Anschluss, im Falle des IGBT (IGBT = Insulated-Gate-Bipolar-Transistor) einen Emitter-Anschluss oder einen Kollektor-Anschluss. Im Falle der Diode bilden die Anschlüsse 4 und 5 jeweils einen Kathodenanschluss beziehungsweise Anodenanschluss. The in 1 shown semiconductor device 2 is formed for example by a transistor, in particular a field effect transistor or an IGBT, or a diode. The connections 4 and 5 each form one terminal of a switching path of the transistor, in the case of the field effect transistor, a source or drain terminal, in the case of the IGBT (IGBT = Insulated Gate Bipolar Transistor) an emitter terminal or a collector terminal. In the case of the diode, the connections form 4 and 5 in each case a cathode connection or anode connection.

2 zeigt ein Ausführungsbeispiel für einen Schaltungsträger 10. Der Schaltungsträger 10 weist ein Substrat auf, welches in diesem Ausführungsbeispiel als DBC-Substrat (DBC = Direct-Bonded-Copper) ausgebildet ist. Das DBC-Substrat weist in diesem Ausführungsbeispiel eine Keramikschicht 22 und zwei jeweils elektrisch voneinander isolierte Kupferschichten 20 und 21 auf. Die elektrisch leitfähige Schicht 21 ist mit einer Sinterschicht 11, insbesondere einem Teil einer Sinterschicht 11, verbunden, wobei die Sinterschicht 11 einen kleineren thermischen Ausdehnungskoeffizienten aufweist als die elektrisch leitfähige Schicht 21. Die Sinterschicht 11 ist – anders als die Sinterschicht 11 in 1 – über eine Sinterschicht 19 mit einer Sinterschicht 12 verbunden. Die Sinterschicht 12 ist mit einem elektrischen Anschluss 6 des Halbleiterbausteins 3 verbunden. Der Halbleiterbaustein 3 weist auf einer Seite, welche dem Substrat zugewandt ist, neben dem elektrischen Anschluss 6 auch einen weiteren elektrischen Anschluss 16 auf. Die elektrischen Anschlüsse 6 und 16 bilden jeweils einen Anschluss der durch den Halbleiterbaustein 3 gebildeten Diode, beispielsweise einen Anodenanschluss beziehungsweise einen Kathodenanschluss. 2 shows an embodiment of a circuit carrier 10 , The circuit carrier 10 has a substrate, which is formed in this embodiment as a DBC substrate (DBC = Direct-Bonded-Copper). The DBC substrate has a ceramic layer in this embodiment 22 and two copper layers each electrically isolated from each other 20 and 21 on. The electrically conductive layer 21 is with a sintered layer 11 , in particular a part of a sintered layer 11 , wherein the sintered layer 11 has a smaller thermal expansion coefficient than the electrically conductive layer 21 , The sintered layer 11 is - unlike the sintered layer 11 in 1 - Over a sintered layer 19 with a sintered layer 12 connected. The sintered layer 12 is with an electrical connection 6 of the semiconductor device 3 connected. The semiconductor device 3 indicates a side which faces the substrate, next to the electrical connection 6 also another electrical connection 16 on. The electrical connections 6 and 16 each form a connection through the semiconductor device 3 formed diode, for example, an anode terminal or a cathode terminal.

Der elektrische Anschluss 16 ist wie der elektrische Anschluss 6 mittels einer Sinterschicht 23, welche der Sinterschicht 12 entspricht und weiter über eine Sinterschicht 24, welche der Sinterschicht 19 entspricht und über eine Sinterschicht 25, welche der Sinterschicht 11 entspricht, mit der elektrisch leitfähigen Schicht 20 stoffschlüssig verbunden. Die Sinterschichten 19 und 24 weisen in diesem Ausführungsbeispiel wenigstens einen Füllstoff auf, insbesondere einen Füllstoff 14, nämlich Eisen, und einen weiteren Füllstoff 18, nämlich Invar. Die Füllstoffe 14 und 18 sind jeweils ausgebildet, einen thermischen Ausdehnungskoeffizienten der durch die Sinterschicht 19 beziehungsweise 24 gebildeten gefüllte Sinterschicht im Vergleich zu einem thermischen Ausdehnungskoeffizienten eines Sintermatrixmaterials, beispielsweise Silber, zu verändern, insbesondere zu verkleinern. Die Sinterschichten 12 und 23 weisen in diesem Ausführungsbeispiel jeweils Füllpartikel 15, insbesondere Siliziumpartikel und/oder Siliziumoxidpartikel auf. Die Füllpartikel wie die Füllpartikel 15 sind ausgebildet, einen thermischen Ausdehnungskoeffizienten der Sinterschicht 12 beziehungsweise 23 im Vergleich zu einem Ausdehnungskoeffizienten eines Matrixsintermaterials, insbesondere Silber, zu verkleinern, sodass der Ausdehnungskoeffizient der Sinterschichten 12 und 23 kleiner ist als ein thermischer Ausdehnungskoeffizient der Sinterschichten 19 und 24. Beispielsweise beträgt ein Ausdehnungskoeffizient einer Silbersinterschicht mit 33 Prozent Siliziumanteil im Silber 11 ppm pro Kelvin.The electrical connection 16 is like the electrical connection 6 by means of a sintered layer 23 , which of the sintered layer 12 corresponds and further via a sintered layer 24 , which of the sintered layer 19 corresponds and over a sintered layer 25 , which of the sintered layer 11 corresponds to the electrically conductive layer 20 cohesively connected. The sintered layers 19 and 24 have in this embodiment at least one filler, in particular a filler 14 iron, and another filler 18 , namely Invar. The fillers 14 and 18 are each formed, a thermal expansion coefficient through the sintered layer 19 respectively 24 compared with a thermal expansion coefficient of a sintered matrix material, such as silver, to change, in particular to reduce the size of the filled sintered layer formed. The sintered layers 12 and 23 have in this embodiment each filler particles 15 , in particular silicon particles and / or silicon oxide particles. The filler particles like the filler particles 15 are formed, a thermal expansion coefficient of the sintered layer 12 respectively 23 in comparison with a coefficient of expansion of a matrix sintered material, in particular silver, in order to reduce the expansion coefficient of the sintered layers 12 and 23 smaller than a thermal expansion coefficient of the sintered layers 19 and 24 , For example, an expansion coefficient of a silver sintered layer with 33 Percent silicon content in silver 11 ppm per Kelvin.

Die Sinterschichten 12, 19 und 11, wie auch die entsprechenden Sinterschichten 23, 24 und 25, bewirken so eine stufenweise Anpassung des thermischen Ausdehnungskoeffizienten von dem Substratmaterial zu dem Halbleiterbaustein 3 hin.The sintered layers 12 . 19 and 11 as well as the corresponding sintered layers 23 . 24 and 25 , thus effect a stepwise adjustment of the thermal expansion coefficient of the substrate material to the semiconductor device 3 out.

Der Schaltungsträger 10 kann – anders als in 2 dargestellt – auf einer vom Substrat 22 abgewandten Seite des Halbleiterbausteins 3 wenigstens einen weiteren elektrischen Kontakt, insbesondere Bond-Kontakt aufweisen. Der Bond-Kontakt kann beispielsweise im Falle eines Transistors als Halbleiterbaustein einen Steueranschluss, insbesondere Basis- oder Gate-Anschluss bilden.The circuit carrier 10 can - unlike in 2 shown - on one of the substrate 22 remote side of the semiconductor device 3 have at least one further electrical contact, in particular bonding contact. The bond contact, for example, in the case of a transistor as a semiconductor device form a control terminal, in particular base or gate terminal.

Claims (10)

Schaltungsträger (1, 10) mit einem massiv ausgebildeten Halbeiterbaustein (2, 3), wobei der Halbleiterbaustein (2, 3) wenigstens einen einen Oberflächenbereich des Halbleiterbausteins bildenden elektrischen Anschluss (4, 5, 6, 16) aufweist, wobei der Anschluss (4, 5, 6, 16) mittels wenigstens eines gesinterten elektrischen Verbindungsmittels mit einem elektrischen Kontakt (7, 8, 20, 21) stoffschlüssig verbunden sind, wobei der Kontakt (7, 8, 20, 21) und der Halbleiterbaustein (2, 3) jeweils einen Fügepartner für das Verbindungsmittel bilden, dadurch gekennzeichnet, dass das Verbindungsmittel zwischen dem Anschluss (4, 5, 6, 16) und dem Kontakt (7, 8, 20, 21) durch wenigstens zwei in ihrer flachen Erstreckung einander kontaktierenden Sinterschichten (9, 11, 12, 13, 16, 19, 23, 24, 25) gebildet ist, wobei ein thermischer Ausdehnungskoeffizient wenigstens einer der Sinterschichten (9, 11, 12, 13, 16, 19, 23, 24, 25) zwischen dem Ausdehnungskoeffizienten des Fügepartners (7, 8, 2, 3, 20, 21) und dem Ausdehnungskoeffizienten der zu der Sinterschicht (9, 11, 12, 13, 16, 19, 23, 24, 25) benachbarten Sinterschicht (9, 11, 12, 13, 16, 19, 23, 24, 25) liegt.Circuit carrier ( 1 . 10 ) with a solid trained Halbeiterbaustein ( 2 . 3 ), wherein the semiconductor device ( 2 . 3 ) at least one surface area of the semiconductor device forming an electrical connection ( 4 . 5 . 6 . 16 ), the connection ( 4 . 5 . 6 . 16 ) by means of at least one sintered electrical connection means with an electrical contact ( 7 . 8th . 20 . 21 ) are materially connected, wherein the contact ( 7 . 8th . 20 . 21 ) and the semiconductor device ( 2 . 3 ) each form a joining partner for the connecting means, characterized in that the connecting means between the terminal ( 4 . 5 . 6 . 16 ) and the contact ( 7 . 8th . 20 . 21 ) by at least two in their flat extension contacting each other Sintered layers ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ), wherein a thermal expansion coefficient of at least one of the sintered layers ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) between the expansion coefficient of the joining partner ( 7 . 8th . 2 . 3 . 20 . 21 ) and the expansion coefficient of the to the sintered layer ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) adjacent sintered layer ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) lies. Schaltungsträger (1, 10) nach Anspruch 1, dadurch gekennzeichnet, dass das Verbindungsmittel zwischen dem Anschluss (4, 5, 6, 16) und dem Kontakt (7, 8, 20, 21) durch wenigstens drei oder vier in ihrer flachen Erstreckung einander kontaktierenden Sinterschichten (9, 11, 12, 13, 16, 19, 23, 24, 25) gebildet ist, wobei ein thermischer Ausdehnungskoeffizient der Sinterschicht (9, 11, 12, 13, 16, 19, 23, 24, 25) zwischen den Ausdehnungskoeffizienten der zu der Sinterschicht (9, 11, 12, 13, 16, 19, 23, 24, 25) benachbarten Sinterschichten (9, 11, 12, 13, 16, 19, 23, 24, 25), beziehungsweise des Fügepartners (7, 8, 2) liegt. Circuit carrier ( 1 . 10 ) according to claim 1, characterized in that the connecting means between the terminal ( 4 . 5 . 6 . 16 ) and the contact ( 7 . 8th . 20 . 21 ) by at least three or four in their flat extension contacting sintering layers ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ), wherein a thermal expansion coefficient of the sintered layer ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) between the expansion coefficients of the to the sintered layer ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) adjacent sinter layers ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ), or of the joining partner ( 7 . 8th . 2 ) lies. Schaltungsträger (1, 10) nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass der Ausdehnungskoeffizient des Halbleiterbausteins (2, 3) kleiner ist als der Ausdehnungskoeffizient des elektrischen Kontaktes (7, 8, 20, 21). Circuit carrier ( 1 . 10 ) according to claim 1 or 2, characterized in that the expansion coefficient of the semiconductor device ( 2 . 3 ) is smaller than the coefficient of expansion of the electrical contact ( 7 . 8th . 20 . 21 ). Schaltungsträger (1, 10) nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass der Halbleiterbaustein (2, 3) wenigstens zwei elektrische Anschlüsse (4, 5) aufweist, welche jeweils durch zueinander parallel erstreckende Flächenbereiche des Halbleiterbausteins gebildet sind, wobei ein Anschluss (4) über wenigstens zwei Sinterschichten (9, 13) durch den Kontakt (7) kontaktiert ist und der weitere Anschluss (5) über wenigstens zwei Sinterschichten (11, 12) durch einen mit einem Substrat (22) des Schaltungsträgers (1) verbundenen Kontakt (20, 21) oder einen durch das Substrat gebildeten Kontakt (8) kontaktiert ist.Circuit carrier ( 1 . 10 ) according to one of the preceding claims, characterized in that the semiconductor device ( 2 . 3 ) at least two electrical connections ( 4 . 5 ), which are each formed by mutually parallel extending surface areas of the semiconductor device, wherein a terminal ( 4 ) over at least two sinter layers ( 9 . 13 ) through contact ( 7 ) and the further connection ( 5 ) over at least two sinter layers ( 11 . 12 ) by one with a substrate ( 22 ) of the circuit carrier ( 1 ) ( 20 . 21 ) or a contact formed by the substrate ( 8th ) is contacted. Schaltungsträger (1, 10) nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass wenigstens eine Sinterschicht (9, 11, 12, 13, 16, 19, 23, 24, 25) durch eine Silberhaltige Schicht oder eine Silberschicht gebildet ist.Circuit carrier ( 1 . 10 ) according to one of the preceding claims, characterized in that at least one sintered layer ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) is formed by a silver-containing layer or a silver layer. Schaltungsträger (1, 10) nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass wenigstens eine Sinterschicht (9, 11, 12, 13, 16, 19, 23, 24, 25) einen Füllstoff (14, 18) aufweist, welcher ausgebildet ist, beim Versintern einen Stoffschluss oder eine Legierung auszubilden.Circuit carrier ( 1 . 10 ) according to one of the preceding claims, characterized in that at least one sintered layer ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) a filler ( 14 . 18 ), which is designed to form a material bond or an alloy during sintering. Schaltungsträger (1, 10) nach Anspruch 6, dadurch gekennzeichnet, dass der Füllstoff (14, 18) wenigstens ein Metall aus der Gruppe umfassend Eisen (14), Wolfram, Invar (18) und Kovar aufweist. Circuit carrier ( 1 . 10 ) according to claim 6, characterized in that the filler ( 14 . 18 ) at least one metal from the group comprising iron ( 14 ), Tungsten, invar ( 18 ) and Kovar. Schaltungsträger (1, 10) nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass wenigstens eine Sinterschicht (9, 11, 12, 13, 16, 19, 23, 24, 25) Füllpartikel (15) aufweist, welche ausgebildet sind, beim Versintern keine Legierung mit einem Sintermetall der Sinterschicht (9, 11, 12, 13, 16, 19, 23, 24, 25) auszubilden und in der gesinterten Schicht als Füllpartikel (15) erhalten zu bleiben, wobei ein Ausdehnungskoeffizient der Füllpartikel (15) sich von dem Ausdehnungskoeffizient des Sintermetalls unterscheidet.Circuit carrier ( 1 . 10 ) according to one of the preceding claims, characterized in that at least one sintered layer ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) Filler particles ( 15 ), which are formed during sintering no alloy with a sintered metal of the sintered layer ( 9 . 11 . 12 . 13 . 16 . 19 . 23 . 24 . 25 ) and in the sintered layer as filler particles ( 15 ), wherein an expansion coefficient of the filler particles ( 15 ) differs from the expansion coefficient of the sintered metal. Schaltungsträger (1, 10) nach Anspruch 8, dadurch gekennzeichnet, dass die Füllpartikel (15) durch wenigstens ein Metalloxid, insbesondere Keramik gebildet sind. Circuit carrier ( 1 . 10 ) according to claim 8, characterized in that the filler particles ( 15 ) are formed by at least one metal oxide, in particular ceramic. Schaltungsträger (1, 10) nach Anspruch 8, dadurch gekennzeichnet, dass die Füllpartikel (15) durch ein Halbleitermaterial, insbesondere Silizium gebildet sind.Circuit carrier ( 1 . 10 ) according to claim 8, characterized in that the filler particles ( 15 ) are formed by a semiconductor material, in particular silicon.
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