DE102006008948B3 - Verfahren zum Aufbringen und elektrischen Kontaktieren von elektronischen Bauteilen auf eine Substratbahn - Google Patents

Verfahren zum Aufbringen und elektrischen Kontaktieren von elektronischen Bauteilen auf eine Substratbahn Download PDF

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Publication number
DE102006008948B3
DE102006008948B3 DE200610008948 DE102006008948A DE102006008948B3 DE 102006008948 B3 DE102006008948 B3 DE 102006008948B3 DE 200610008948 DE200610008948 DE 200610008948 DE 102006008948 A DE102006008948 A DE 102006008948A DE 102006008948 B3 DE102006008948 B3 DE 102006008948B3
Authority
DE
Germany
Prior art keywords
substrate web
contact pads
components
substrate
electrically conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE200610008948
Other languages
German (de)
English (en)
Inventor
Ralf Wolfgang God
Brod Volker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Muehlbauer GmbH and Co KG
Original Assignee
Muehlbauer GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Muehlbauer GmbH and Co KG filed Critical Muehlbauer GmbH and Co KG
Priority to DE200610008948 priority Critical patent/DE102006008948B3/de
Priority to PCT/EP2007/050644 priority patent/WO2007096220A1/fr
Application granted granted Critical
Publication of DE102006008948B3 publication Critical patent/DE102006008948B3/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07718—Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G06K19/07752—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna using an interposer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/76—Apparatus for connecting with build-up interconnects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2405—Shape
    • H01L2224/24051—Conformal with the semiconductor or solid-state device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/76—Apparatus for connecting with build-up interconnects
    • H01L2224/7665—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
DE200610008948 2006-02-23 2006-02-23 Verfahren zum Aufbringen und elektrischen Kontaktieren von elektronischen Bauteilen auf eine Substratbahn Expired - Fee Related DE102006008948B3 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE200610008948 DE102006008948B3 (de) 2006-02-23 2006-02-23 Verfahren zum Aufbringen und elektrischen Kontaktieren von elektronischen Bauteilen auf eine Substratbahn
PCT/EP2007/050644 WO2007096220A1 (fr) 2006-02-23 2007-01-23 Procédé permettant d'appliquer et d'amener en contact électrique des composants électroniques sur une bande de substrat

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE200610008948 DE102006008948B3 (de) 2006-02-23 2006-02-23 Verfahren zum Aufbringen und elektrischen Kontaktieren von elektronischen Bauteilen auf eine Substratbahn

Publications (1)

Publication Number Publication Date
DE102006008948B3 true DE102006008948B3 (de) 2007-10-04

Family

ID=37891862

Family Applications (1)

Application Number Title Priority Date Filing Date
DE200610008948 Expired - Fee Related DE102006008948B3 (de) 2006-02-23 2006-02-23 Verfahren zum Aufbringen und elektrischen Kontaktieren von elektronischen Bauteilen auf eine Substratbahn

Country Status (2)

Country Link
DE (1) DE102006008948B3 (fr)
WO (1) WO2007096220A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117423643A (zh) * 2023-10-31 2024-01-19 东莞触点智能装备有限公司 一种芯片高精固晶机用的取料系统及无损取料方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5299379B2 (ja) * 2010-08-17 2013-09-25 パナソニック株式会社 部品実装装置および部品検出方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0615285A2 (fr) * 1993-03-11 1994-09-14 Btg International Limited Montage d'un circuit électronique sur un substrat
DE19845296A1 (de) * 1998-09-03 2000-03-16 Fraunhofer Ges Forschung Verfahren zur Kontaktierung eines Schaltungschips
US6091332A (en) * 1998-06-09 2000-07-18 Motorola, Inc. Radio frequency identification tag having printed circuit interconnections
US6246327B1 (en) * 1998-06-09 2001-06-12 Motorola, Inc. Radio frequency identification tag circuit chip having printed interconnection pads
DE10358422B3 (de) * 2003-08-26 2005-04-28 Muehlbauer Ag Verfahren zur Herstellung von Modulbrücken
US20050284917A1 (en) * 2004-06-24 2005-12-29 Checkpoint Systems, Inc. Die attach area cut-on-fly method and apparatus

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL218158A (fr) * 1956-06-19 1900-01-01
US6951596B2 (en) * 2002-01-18 2005-10-04 Avery Dennison Corporation RFID label technique
JP4033705B2 (ja) * 2002-05-08 2008-01-16 富士機械製造株式会社 プリント配線板位置誤差取得方法，プログラムおよび電子回路部品装着システム
JP4742526B2 (ja) * 2003-12-26 2011-08-10 シンフォニアテクノロジー株式会社 Ｉｃチップ実装体の製造方法及び製造装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0615285A2 (fr) * 1993-03-11 1994-09-14 Btg International Limited Montage d'un circuit électronique sur un substrat
US6091332A (en) * 1998-06-09 2000-07-18 Motorola, Inc. Radio frequency identification tag having printed circuit interconnections
US6246327B1 (en) * 1998-06-09 2001-06-12 Motorola, Inc. Radio frequency identification tag circuit chip having printed interconnection pads
DE19845296A1 (de) * 1998-09-03 2000-03-16 Fraunhofer Ges Forschung Verfahren zur Kontaktierung eines Schaltungschips
DE10358422B3 (de) * 2003-08-26 2005-04-28 Muehlbauer Ag Verfahren zur Herstellung von Modulbrücken
US20050284917A1 (en) * 2004-06-24 2005-12-29 Checkpoint Systems, Inc. Die attach area cut-on-fly method and apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117423643A (zh) * 2023-10-31 2024-01-19 东莞触点智能装备有限公司 一种芯片高精固晶机用的取料系统及无损取料方法
CN117423643B (zh) * 2023-10-31 2024-06-04 东莞触点智能装备有限公司 一种芯片高精固晶机用的取料系统及无损取料方法

Also Published As

Publication number Publication date
WO2007096220A1 (fr) 2007-08-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20140902