DE10196382T1 - Semiconductor chip and semiconductor device for which the semiconductor chip is used - Google Patents

Semiconductor chip and semiconductor device for which the semiconductor chip is used

Info

Publication number
DE10196382T1
DE10196382T1 DE10196382T DE10196382T DE10196382T1 DE 10196382 T1 DE10196382 T1 DE 10196382T1 DE 10196382 T DE10196382 T DE 10196382T DE 10196382 T DE10196382 T DE 10196382T DE 10196382 T1 DE10196382 T1 DE 10196382T1
Authority
DE
Germany
Prior art keywords
semiconductor chip
semiconductor
chip
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE10196382T
Other languages
German (de)
Inventor
Yuji Kikuchi
Kiyoharu Kishimoto
Kazunari Nakagawa
Yoshiharu Hino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyushu Hitachi Maxell Ltd
Original Assignee
Hitachi Maxell Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Maxell Ltd filed Critical Hitachi Maxell Ltd
Publication of DE10196382T1 publication Critical patent/DE10196382T1/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G06K19/07756—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being non-galvanic, e.g. capacitive
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07775—Antenna details the antenna being on-chip
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07777—Antenna details the antenna being of the inductive type
    • G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/0502—Disposition
    • H01L2224/05022—Disposition the internal layer being at least partially embedded in the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/0502—Disposition
    • H01L2224/05024—Disposition the internal layer being disposed on a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05541—Structure
    • H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05569—Disposition the external layer being disposed on a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
    • H01L2224/05572—Disposition the external layer being disposed in a recess of the surface the external layer extending out of an opening
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0613—Square or rectangular array
    • H01L2224/06131—Square or rectangular array being uniform, i.e. having a uniform pitch across the array
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10—Inductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
DE10196382T 2000-06-21 2001-06-20 Semiconductor chip and semiconductor device for which the semiconductor chip is used Ceased DE10196382T1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000186409 2000-06-21
PCT/JP2001/005282 WO2001099193A1 (en) 2000-06-21 2001-06-20 Semiconductor chip and semiconductor device using the semiconductor chip

Publications (1)

Publication Number Publication Date
DE10196382T1 true DE10196382T1 (en) 2003-12-04

Family

ID=18686575

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10196382T Ceased DE10196382T1 (en) 2000-06-21 2001-06-20 Semiconductor chip and semiconductor device for which the semiconductor chip is used

Country Status (6)

Country Link
US (1) US6838773B2 (en)
KR (1) KR100741039B1 (en)
CN (1) CN1275328C (en)
AU (1) AU7457401A (en)
DE (1) DE10196382T1 (en)
WO (1) WO2001099193A1 (en)

Families Citing this family (61)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7268740B2 (en) * 2000-03-13 2007-09-11 Rcd Technology Inc. Method for forming radio frequency antenna
US6476775B1 (en) 2000-03-13 2002-11-05 Rcd Technology Corporation Method for forming radio frequency antenna
US7298331B2 (en) * 2000-03-13 2007-11-20 Rcd Technology, Inc. Method for forming radio frequency antenna
KR100741039B1 (en) * 2000-06-21 2007-07-20 히다치 막셀 가부시키가이샤 Semiconductor chip and semiconductor device using the semiconductor chip
JP3616605B2 (en) * 2002-04-03 2005-02-02 沖電気工業株式会社 Semiconductor device
US7009576B2 (en) * 2002-06-11 2006-03-07 Michelin Recherche Et Technique S.A. Radio frequency antenna for a tire and method for same
US7456752B2 (en) 2003-05-06 2008-11-25 Rcd Technology, Inc. Radio frequency identification sensor for fluid level
DE60337036D1 (en) * 2003-08-28 2011-06-16 Hitachi Ltd SEMICONDUCTOR COMPONENT AND METHOD FOR THE PRODUCTION THEREOF
JP2005123591A (en) * 2003-09-25 2005-05-12 Rohm Co Ltd Semiconductor device and electronic apparatus packaging the same
WO2005074030A1 (en) * 2004-01-30 2005-08-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US7842948B2 (en) * 2004-02-27 2010-11-30 Nvidia Corporation Flip chip semiconductor die internal signal access system and method
CN100478986C (en) * 2004-03-04 2009-04-15 株式会社半导体能源研究所 ID chip, and IC card
KR101113010B1 (en) * 2004-03-12 2012-03-13 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Semiconductor device
EP1733334B1 (en) 2004-04-09 2011-05-25 Semiconductor Energy Laboratory Co., Ltd. Product management system
WO2006028195A1 (en) * 2004-09-09 2006-03-16 Semiconductor Energy Laboratory Co., Ltd. Wireless chip
KR101258672B1 (en) * 2004-10-22 2013-04-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Semiconductor device
US7307528B2 (en) * 2004-12-15 2007-12-11 Impinj, Inc. RFID tag design with circuitry for wafer level testing
US7380190B2 (en) * 2004-12-15 2008-05-27 Impinj, Inc. RFID tag with bist circuits
CN101088158B (en) * 2004-12-24 2010-06-23 株式会社半导体能源研究所 Semiconductor device
TWI252575B (en) * 2005-01-17 2006-04-01 Phoenix Prec Technology Corp Flip-chip package structure with direct electrical connection of semiconductor chip
US7400255B2 (en) * 2005-02-28 2008-07-15 Impinj, Inc. Wireless functional testing of RFID tag
US7528724B2 (en) * 2005-02-28 2009-05-05 Impinj, Inc. On die RFID tag antenna
JP2006243724A (en) 2005-03-04 2006-09-14 Samsung Electronics Co Ltd Driving chip, display device, and manufacturing method thereof
US7456506B2 (en) * 2005-03-14 2008-11-25 Rcd Technology Inc. Radio frequency identification (RFID) tag lamination process using liner
US20060205113A1 (en) * 2005-03-14 2006-09-14 Rcd Technology Corp. Radio frequency identification (RFID) tag lamination process
KR100642643B1 (en) 2005-03-18 2006-11-10 삼성전자주식회사 Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits
WO2006104792A1 (en) * 2005-03-28 2006-10-05 Avery Dennison Corporation Method for making rfid device antennas
US7607586B2 (en) * 2005-03-28 2009-10-27 R828 Llc Semiconductor structure with RF element
JP2006286966A (en) * 2005-03-31 2006-10-19 Fujitsu Ltd Semiconductor device and production management method thereof
JP2006303344A (en) * 2005-04-25 2006-11-02 Matsushita Electric Ind Co Ltd Semiconductor device disposed by flipping lsi chip on package substrate, and its substrate wiring design method
US7470927B2 (en) * 2005-05-18 2008-12-30 Megica Corporation Semiconductor chip with coil element over passivation layer
US7651932B2 (en) 2005-05-31 2010-01-26 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing antenna and method for manufacturing semiconductor device
JP4547625B2 (en) * 2005-07-04 2010-09-22 ソニー株式会社 Communication board
JP2007067012A (en) * 2005-08-29 2007-03-15 Matsushita Electric Ind Co Ltd Semiconductor device
WO2007043602A1 (en) * 2005-10-14 2007-04-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and communication system using the semiconductor device
US7388542B2 (en) * 2005-11-10 2008-06-17 Rcd Technology, Inc. Method for an element using two resist layers
US7377447B2 (en) 2005-12-05 2008-05-27 Rcd Technology, Inc. Tuned radio frequency identification (RFID) circuit used as a security device for wristbands and package security
US20080129455A1 (en) * 2006-05-24 2008-06-05 Rcd Technology Inc. Method for forming rfid tags
US8448870B2 (en) * 2006-07-10 2013-05-28 Nxp B.V. Transponder and method of producing a transponder
TWI380500B (en) * 2007-02-06 2012-12-21 Mutual Pak Technology Co Ltd Integrated circuit device having antenna conductors and the mothod for the same
CN101246849B (en) * 2007-02-13 2010-05-19 相丰科技股份有限公司 Integrated circuit with antenna conductor and process for manufacturing the same
JP2009212481A (en) * 2007-04-27 2009-09-17 Sharp Corp Semiconductor device and manufacturing method thereof
DE102008046761B4 (en) 2007-09-14 2021-08-05 Infineon Technologies Ag Semiconductor component with conductive connection arrangement and method for forming a semiconductor component
US7986023B2 (en) * 2007-09-17 2011-07-26 Infineon Technologies Ag Semiconductor device with inductor
JP2009278030A (en) * 2008-05-19 2009-11-26 Panasonic Corp Semiconductor device, and manufacturing method thereof
JP5140565B2 (en) * 2008-11-28 2013-02-06 三洋電機株式会社 Device mounting substrate, semiconductor module, and portable device
US9011706B2 (en) * 2008-12-16 2015-04-21 City University Of Hong Kong Method of making foraminous microstructures
KR101810248B1 (en) * 2009-03-31 2017-12-18 도다 고교 가부시끼가이샤 Composite rf tag and tool provided with the composite rf tag
US8366009B2 (en) 2010-08-12 2013-02-05 Féinics Amatech Teoranta Coupling in and to RFID smart cards
DE102010039156A1 (en) * 2010-08-10 2012-02-16 Robert Bosch Gmbh Method for producing an electrical circuit and electrical circuit
US8789762B2 (en) 2010-08-12 2014-07-29 Feinics Amatech Teoranta RFID antenna modules and methods of making
US8991712B2 (en) 2010-08-12 2015-03-31 Féinics Amatech Teoranta Coupling in and to RFID smart cards
JP2012049434A (en) 2010-08-30 2012-03-08 Sony Corp Electronic component, feeder device, power receiver, and wireless feeder system
JP5087118B2 (en) * 2010-09-28 2012-11-28 株式会社東芝 Communication equipment
US9781783B2 (en) 2011-04-15 2017-10-03 Semiconductor Energy Laboratory Co., Ltd. Light-emitting device, display device, light-emitting system, and display system
CA2853768A1 (en) * 2011-08-08 2013-02-14 Feinics Amatech Teoranta Improving coupling in and to rfid smart cards
KR20140082648A (en) * 2011-08-08 2014-07-02 페이닉스 아마테크 테오란타 Improving coupling in and to rfid smart cards
US10403511B2 (en) * 2013-01-14 2019-09-03 Intel Corporation Backside redistribution layer patch antenna
TWI515843B (en) * 2013-12-16 2016-01-01 南茂科技股份有限公司 Chip package structure
US10157807B2 (en) * 2016-05-26 2018-12-18 Taiwan Semiconductor Manufacturing Co., Ltd. Sensor packages and manufacturing mehtods thereof
CN107705976B (en) * 2017-08-30 2020-08-25 潍坊歌尔微电子有限公司 Coil manufacturing method, coil and electronic equipment

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10162112A (en) * 1996-12-02 1998-06-19 Mitsui High Tec Inc Ic card
JP4255141B2 (en) * 1998-02-02 2009-04-15 株式会社ルネサステクノロジ Semiconductor device
US6525410B1 (en) * 1998-07-24 2003-02-25 Texas Instruments Incorporated Integrated circuit wireless tagging
JP2000137779A (en) 1998-10-30 2000-05-16 Hitachi Maxell Ltd Non-contact information medium and production thereof
KR100741039B1 (en) * 2000-06-21 2007-07-20 히다치 막셀 가부시키가이샤 Semiconductor chip and semiconductor device using the semiconductor chip

Also Published As

Publication number Publication date
CN1275328C (en) 2006-09-13
WO2001099193A1 (en) 2001-12-27
CN1436370A (en) 2003-08-13
US6838773B2 (en) 2005-01-04
US20030116790A1 (en) 2003-06-26
KR20030041870A (en) 2003-05-27
KR100741039B1 (en) 2007-07-20
AU7457401A (en) 2002-01-02

Similar Documents

Publication Publication Date Title
DE10196382T1 (en) Semiconductor chip and semiconductor device for which the semiconductor chip is used
DE50112868D1 (en) SEMICONDUCTOR CHIP
DE60200455D1 (en) Thermosetting resin compound and semiconductor device using the same
DE60034070D1 (en) Integrated semiconductor device
NO20023642D0 (en) Nitride semiconductor laser device
DE60229776D1 (en) PAD DEVICE
FR2817658B1 (en) SEMICONDUCTOR DEVICE
DE10196595T1 (en) Device and semiconductor test device
DE69900274T2 (en) Multi-chip semiconductor power device of the pressure contact type
DE60227475D1 (en) Semiconductor component
DE69942813D1 (en) Semiconductor device
DE69937739D1 (en) SEMICONDUCTOR DEVICE
DE60140691D1 (en) SEMICONDUCTOR DIODES COMPONENT
DE60142141D1 (en) Semiconductor device
DE60211244D1 (en) Semiconductor device
DE50114925D1 (en) RADIATION-EMITTING SEMICONDUCTOR CHIP
DE19980453T1 (en) Semiconductor device test device
DE60005959D1 (en) SEMICONDUCTOR DEVICE
DE60133429D1 (en) Wiring substrate, its manufacture and semiconductor device
DE10191585B8 (en) Semiconductor device
DE60141670D1 (en) Semiconductor memory device, its manufacturing method and its operation
DE10291889D2 (en) Semiconductor chip for optoelectronics
DE60218009D1 (en) Semiconductor memory device
DE60228777D1 (en) Semiconductor component of the pressure contact type
DE59912585D1 (en) J-FET SEMICONDUCTOR DEVICE

Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8127 New person/name/address of the applicant

Owner name: KYUSHU HITACHI MAXELL LTD., FUKUOKA, JP

R016 Response to examination communication
R016 Response to examination communication
R002 Refusal decision in examination/registration proceedings
R003 Refusal decision now final

Effective date: 20131212