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US20060205113A1 - Radio frequency identification (RFID) tag lamination process - Google Patents

Radio frequency identification (RFID) tag lamination process Download PDF

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Publication number
US20060205113A1
US20060205113A1 US11079143 US7914305A US2006205113A1 US 20060205113 A1 US20060205113 A1 US 20060205113A1 US 11079143 US11079143 US 11079143 US 7914305 A US7914305 A US 7914305A US 2006205113 A1 US2006205113 A1 US 2006205113A1
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Prior art keywords
adhesive
circuit
module
chip
integrated
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
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US11079143
Inventor
Robert Oberle
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Square 1 Bank
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RCD Tech Corp
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3164Partial encapsulation or coating the coating being a foil
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/86Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/0781Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811Extrinsic, i.e. with electrical conductive fillers
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10628Leaded surface mounted device
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305Moulding and encapsulation
    • H05K2203/1311Foil encapsulation, e.g. of mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions ; Methods of application thereof
    • H05K3/3478Applying solder paste, particles or preforms; Transferring prefabricated solder patterns
    • H05K3/3484Paste or slurry or powder
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00Climate change mitigation technologies for sector-wide applications
    • Y02P80/30Reducing waste in manufacturing processes; Calculations of released waste quantities

Abstract

A method of constructing an RFID unit can include using a protective layer to hold an integrated circuit chip module to a substrate layer with an antenna unit while a conductive adhesive has not yet fully set.

Description

    BACKGROUND OF INVENTION
  • [0001]
    Radio Frequency Identification (RFID) tags are typically small objects that can be attached to or incorporated into a product. RFID tags contain antenna to enable them to receive and respond to radio-frequency queries from an RFID tranciever. The RFID tags are used in a host of industries for purposes such as inventory control, security, personal identification and the like.
  • [0002]
    The RFID tags can be passive or active. Active devices have their own power supply. Passive devices rely on energization from the RFID tranciever. Passive and active RFID tags can use integrated circuit chips to modulate the identification response.
  • [0003]
    The construction of RFID units can consist of the attachment of a chip module to a substrate with an antenna unit. The chip module is typically attached to the substrate with an electrically conductive adhesive and then the combined unit can be further processed after the adhesive sets.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0004]
    FIG. 1 is a cross sectional view of an RFID unit of one embodiment.
  • [0005]
    FIG. 2 is a top view of an RFID unit of one embodiment.
  • [0006]
    FIG. 3 is a diagram of an apparatus to construct an RFID unit of one embodiment.
  • DETAILED DESCRIPTION
  • [0007]
    One embodiment of the present invention comprises a method of constructing an RFID unit. The method comprises attaching an integrated circuit chip to a substrate with an antenna unit using an adhesive; and laminating a protective layer over at least a portion of the integrated circuit chip while the adhesive has not yet fully set.
  • [0008]
    FIG. 1 illustrates a cross section diagram of an RFID unit 100 of one embodiment. In this embodiment, the integrated circuit 102 is part of a module 104 which also includes lead frame elements 106 and 108. Other connection elements other than a lead frame could be used in the module 104. The module 104 is adhesively connected to substrate 110 including antenna elements 112 and 114 using a conductive adhesive 116. The conductive adhesive 116 can be a conventional isotropic conductive adhesive, and anisotropic conductive adhesive or even solder such as solder paste.
  • [0009]
    FIG. 2 illustrates a top view where module 202 with IC 204 and lead frame 206 and 208 are connected using the conductive adhesive to the antenna unit 210 to form the RFID unit 200.
  • [0010]
    Looking again at FIG. 1, the protective layer 120 can be laminated over the module 104 including the integrated circuit 102. The protective layer 120 can hold the module 102 in place while the conductive adhesive 116 sets.
  • [0011]
    The laminating protective layer can be made of many type of materials including thermoplastic material, thermoset material, polyester, polystyrene, polypropylene, polyethylene. The protective layer may have an adhesive layer. In one embodiment, the protective layer is relatively stretchy and will conform the shape of the module or integrated circuit chip. In one embodiment, since the lamination is done before the adhesive is fully set, there does not have to be any dwell time between attaching and laminating steps. In one embodiment, the dwell time can be reduced below a minute. The attachment step can be done at a high rate due to the lack of requirement for the conductive adhesive to fully set. In one embodiment, the attachment is done at a rate of one attachment per second or greater. The conductive adhesive can be of such that it takes a long time to fully set since the protective layer holds the module in place. Thus, the conductive adhesive can take over a day to fully set, which can greatly increase the pot time of the adhesive in the apparatus to produce the RFID units.
  • [0012]
    The protective layer can have a radiation or heat curable adhesive. In one embodiment, the protective layer has an ultra violet (UV) curable adhesive that can be cured in a later step.
  • [0013]
    FIG. 3 illustrates an apparatus of one embodiment. In this embodiment, the laminating protective layer is held in a strip on roll 302. If the protective layer has a liner it can be removed onto roll 304. A roll 305 containing a strip with chip modules can feed to device 307 which can attached the chip module up side down on the protective layer 308. The antenna material can be a strip on roll 310. The conductive adhesive can be provided by an adhesive dispenser 314 to dispense upon module, such as on the leadframe of the module. An attachment unit 316 attaches the protective layer 308 with modules to the antenna material strip 309. Dancers 320 and 321 can be used to register the substrate strip having antenna units with the modules on the protective layer 308. A lamination unit 322 can later be used to laminate the protective layer over the integrated circuit chip module. The finished material can be rolled up into a roll 324 which can be held for later processing. The later processing can include cure step which can be done at a separate location from the apparatus 300. The laminating unit 322 can use hot rollers. The attaching unit 316 can operate at a rate greater than one attachment per second or greater.
  • [0014]
    In the example of FIG. 3, the integrated circuit chip (as part of the chip module) is attached to the protective layer before the attaching unit. This need not be the case, but it can allow the chips to be spaced on a strip such that the chips will register in position with the substrate strip having the antenna unit. In an alternate embodiment, the integrated circuit chip, as part of the chip module, is attached to the substrate with antenna first followed by the lamination of the protective layer.
  • [0015]
    One embodiment of the present invention is a method of constructing an RFID unit comprising using a conductive adhesive to attach an integrated circuit chip module to a substrate with an antenna unit; and laminating a protective layer over at least a part of the integrated circuit chip module while the conductive adhesive has not yet fully set.
  • [0016]
    One embodiment of the present invention is a method of constructing an RFID unit comprising placing a integrated circuit chip module on a protective layer, wherein the protective layer includes an adhesive to hold the integrated circuit module; placing a conductive adhesive on at least portions of the integrated circuit chip module; and attaching the integrated circuit chip module to a substrate with an antenna unit.
  • [0017]
    One embodiment of the present invention is an RFID unit comprising a substrate with an antenna unit; an integrated circuit chip to the substrate with an antenna unit using an adhesive; and a protective layer laminated over at least a part of the integrated circuit chip while the adhesive has not yet fully set.
  • [0018]
    The chip module can be a single chip attached to a lead frame or suitable substrate with appropriate electrical connections for attachment to the antenna-examples of chip modules are offered by Philips Electronics, Netherlands (FCP package) and Alien Technologies of Morgan Hill Calif. (Alien Strap) The lead frame can terminates in two pads, which are intended to attach to the RFID circuit by a conductive adhesive. Chip modules can be utilized in order to alleviate the difficulties that normally arise when placing a small integrated circuits (typical integrated circuits are <1 mm square, and the areal density of integrated circuits are typically very low, <0.25 units/square inch). In traditional application, the mounting of small integrated circuits without a leadframe leads to low process throughput owing to the time delay inherent in locating and placing such a small integrated circuit.
  • [0019]
    The disadvantages of previous processes relate to process throughput and reliability. Application of non-conductive epoxy under the integrated circuit and conductive epoxy to the outer leads results in a mechanically and electrically reliable assembly, however the dwell time for the circuit, i.e. that time that the circuit must be immobilized while the adhesives cure is typically several minutes. This may be decreased by using faster curing epoxy resins however the inherent chemical instability of so-called snap cure resins makes handling difficult and leads to excessive yield loss or high material wastage. Anisotropic adhesives, either tapes or pastes offer increased throughput with respect to epoxy adhesives however the dwell time per attachment is typically several seconds and during the dwell time the module must be held immobile on the substrate using considerable pressure to effect a reliable electrical connection. The use of a laminated protective layer can produce a throughput in excess of one attachment per second that insures mechanical stability of the device. The equipment can be relatively simple to maintain a very low cost of ownership of the overall process. This can be as low as $0.01 or less per attachment when considering the overall cost of materials and equipment amortization.
  • [0020]
    In one embodiment, a traditional conductive adhesive can be placed over the terminals of the circuit to which the module is to be attached or placed on the terminals of the module prior to assembly.
  • [0021]
    The module can be placed on the substrate with contact of the terminals of the module on the appropriate terminal of the circuit. Alternatively, the module may be temporarily attached to a tape which is subsequently laminated to the circuit.
  • [0022]
    A protective layer can be laminated over the module of a tape which holds the module in place while the adhesive is cured (partially or fully). The tape may held in place by a variety of adhesives including an adhesive selected from any of a number of adhesive types; hot melt, pressure sensitive, UV cure, thermoset etc. This laminate may cover the module fully or partially or it may be advantageous to use a segmented or multiple adhesives for specific uses.
  • [0023]
    A curing step can be done to set, such as cure, the conductive adhesive. This step may be of a type that initiates cure of the adhesive which proceeds after the circuit has been removed from the immediate vicinity of the attachment and/or curing station.
  • [0024]
    The protective layer can form a protective cover for the module, particularly if the laminate conforms closely to the shape of the module after lamination. There is no requirement for dwell time in the placement equipment. This means that parts with a partially cured adhesive can be safely rolled up and stored while the curing process takes place. This has the dual benefit of increasing process throughput and reducing material waste costs. Tape lamination equipment presently available can be modified to suit this application. The throughput of exiting equipment is sufficient to meet the imperative of a low cost high throughput process for placement and attachment of the module.
  • [0025]
    In alternate embodiments, a curable adhesive can be placed over the module contemporaneously with the conductive adhesive; an anisotropic adhesive can be used rather than traditional conductive adhesive; and/or an anisotropic adhesive can be used in place of both the traditional conductive adhesive and a laminating adhesive.
  • [0026]
    An alternate embodiment is a method for constructing a flexible circuit comprising attaching an integrated circuit chip to a substrate with an circuit traces using an adhesive; and laminating a protective layer over at least part of the integrated circuit chip while the adhesive has not yet fully set.
  • [0027]
    The foregoing description of preferred embodiments of the present invention has been provided for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many embodiments were chosen and described in order to best explain the principles of the invention and its practical application, thereby enabling others skilled in the art to understand the invention for various embodiments and with various modifications that are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims and their equivalents.

Claims (18)

  1. 1. A method of constructing an RFID unit comprising:
    attaching an integrated circuit chip to a substrate with an antenna unit using an adhesive; and
    laminating a protective layer over at least part of the integrated circuit chip while the adhesive has not yet fully set.
  2. 2. The method of claim 1, wherein the integrated circuit chip is part of a chip module.
  3. 3. The method of claim 2, wherein the chip module includes a lead frame.
  4. 4. The method of claim 2, wherein attaching step comprises using the adhesive to connect a connection element of the module to the substrate.
  5. 5. The method of claim 1, wherein any dwell time between the attaching and laminating steps is less than less than minute.
  6. 6. The method of claim 1, wherein the attachment step is done at a rate of one attachment per second or greater.
  7. 7. The method of claim 1, wherein the adhesive takes over a day to fully set.
  8. 8. The method of claim 1, wherein the adhesive is an electrically conductive adhesive.
  9. 9. The method of claim 8, wherein the conductive adhesive is solder paste.
  10. 10. The method of claim 1, wherein the integrated circuit chip is attached to the protective layer before the attaching step.
  11. 11. The method of claim 1, wherein the protective layer is stretchy to conform to IC chip.
  12. 12. An apparatus to construct an RFID unit comprising:
    a unit to attach an integrated circuit chip to a substrate with an antenna unit using an adhesive; and
    a unit to laminate a protective layer over at least part of the integrated circuit chip while the adhesive has not yet fully set.
  13. 13. The apparatus of claim 12, wherein the integrated circuit chip is part of a chip module.
  14. 14. The apparatus of claim 12, wherein the laminating unit connects a strip of the protective layer to a strip of the substrate.
  15. 15. The apparatus of claim 12, wherein the laminating unit uses hot rollers.
  16. 16. The apparatus of claim 12, wherein the attaching unit operates at a rate of one attachment per second or greater.
  17. 17. The apparatus of claim 12, wherein the integrated circuit chip is attached to the protective layer before the attaching unit.
  18. 18. A method of constructing an flexible circuit comprising:
    attaching an integrated circuit chip to a substrate with an circuit traces using an adhesive; and;
    laminating a protective layer over at least part of the integrated circuit chip while the adhesive has not yet fully set.
US11079143 2005-03-14 2005-03-14 Radio frequency identification (RFID) tag lamination process Abandoned US20060205113A1 (en)

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US11079143 US20060205113A1 (en) 2005-03-14 2005-03-14 Radio frequency identification (RFID) tag lamination process
US11284761 US7456506B2 (en) 2005-03-14 2005-11-22 Radio frequency identification (RFID) tag lamination process using liner
PCT/US2006/007283 WO2006098879A1 (en) 2005-03-14 2006-03-01 Radio frequency identification (rfid) tag lamination process using liner
US12187143 US7674649B2 (en) 2005-03-14 2008-08-06 Radio frequency identification (RFID) tag lamination process using liner

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US12187143 Continuation US7674649B2 (en) 2005-03-14 2008-08-06 Radio frequency identification (RFID) tag lamination process using liner

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Cited By (2)

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Publication number Priority date Publication date Assignee Title
US20080117057A1 (en) * 2006-11-21 2008-05-22 Rcd Technology Inc. Radio frequency identification (rfid) tag lamination process
EP3154328A1 (en) 2015-10-07 2017-04-12 Mecstar S.r.l. Apparatus, method and device for making products incorporating an rfid

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Publication number Priority date Publication date Assignee Title
US7737513B2 (en) * 2007-05-30 2010-06-15 Tessera, Inc. Chip assembly including package element and integrated circuit chip

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