DE1001837B - Elektronisches Rechenmaschinenelement - Google Patents

Elektronisches Rechenmaschinenelement

Info

Publication number
DE1001837B
DE1001837B DEH10011A DEH0010011A DE1001837B DE 1001837 B DE1001837 B DE 1001837B DE H10011 A DEH10011 A DE H10011A DE H0010011 A DEH0010011 A DE H0010011A DE 1001837 B DE1001837 B DE 1001837B
Authority
DE
Germany
Prior art keywords
signals
binary
circuit
signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEH10011A
Other languages
German (de)
English (en)
Inventor
Eldred C Nelson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of DE1001837B publication Critical patent/DE1001837B/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/5016—Half or full adders, i.e. basic adder cells for one denomination forming at least one of the output signals directly from the minterms of the input signals, i.e. with a minimum number of gate levels
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/502—Half adders; Full adders consisting of two cascaded half adders
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/504—Adding; Subtracting in bit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Logic Circuits (AREA)
DEH10011A 1950-10-10 1951-10-09 Elektronisches Rechenmaschinenelement Pending DE1001837B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US317524XA 1950-10-10 1950-10-10

Publications (1)

Publication Number Publication Date
DE1001837B true DE1001837B (de) 1957-01-31

Family

ID=21861203

Family Applications (1)

Application Number Title Priority Date Filing Date
DEH10011A Pending DE1001837B (de) 1950-10-10 1951-10-09 Elektronisches Rechenmaschinenelement

Country Status (4)

Country Link
CH (1) CH317524A (fr)
DE (1) DE1001837B (fr)
FR (1) FR1151451A (fr)
GB (1) GB750475A (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3245039A (en) * 1954-03-22 1966-04-05 Ibm Electronic data processing machine
US2879001A (en) * 1956-09-10 1959-03-24 Weinberger Arnold High-speed binary adder having simultaneous carry generation
US2907526A (en) * 1956-11-02 1959-10-06 Ibm Electronic accumulator

Also Published As

Publication number Publication date
FR1151451A (fr) 1958-01-30
GB750475A (en) 1956-06-13
CH317524A (fr) 1956-11-30

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