CS244084B1 - A method of surface passivation of a vertically articulated semiconductor component recess - Google Patents

Abstract

The purpose of the solution is to eliminate the possibility of an electrical short circuit between the adjacent and surface semiconductor layer in semiconductor components with a vertically divided structure. The stated purpose is achieved by a method where, after the last photolithographic processing of the contact and washing off the photoresist, the entire structure is again provided with a photoresist layer, exposed through a mask and developed. The photoresist layer remaining on the surface of the recess hardens and serves as a protective passivation layer for the adjacent semiconductor layer.

Description

The invention relates to a method of passivating a recess of a vertically segmented structure of a semiconductor component, wherein the recessed portions of the surface of the structure extend into an adjacent semiconductor layer to the surface semiconductor layer.

In multilayer semiconductor components with a vertically structured structure, where the recessed portions of the structure surface extend up to the adjacent semiconductor layer to the surface semiconductor layer, where both semiconductor layers are of opposite electrical conductivity, often due to mechanical deflection of the semiconductor diode electrode system semiconductor layer. The short-circuit also occurs due to various contamination of the surface of the adjacent semiconductor layer. The short circuit is usually caused by the upper dilatation element of the semiconductor component, which is loosely applied to the contacted surface semiconductor layer when the whole semiconductor component is subjected to mechanical perpendicular pressure.

The electric short-circuit causes degradation of the electrical parameters of the semiconductor device.

To eliminate these electrical shorts, the adjacent semiconductor layer exposed by the recess is separated by passivation from the surface semiconductor layer. In the semiconductor components of the present embodiment, passivation with solid or deposited oxides, nitrides, passivation glass, etc. is used.

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A disadvantage of these methods of passivation of the recess surface is the complex and expensive preparation of the passivation layer. Often expensive process equipment is required to prepare the deposited or grown passivation layer. Further, post-treatment by standard photolithographic process is necessary.

These disadvantages are overcome by the method of passivating the recess of the vertically segmented structure of the semiconductor device, wherein the recessed portions of the surface of the structure extend beyond the adjacent semiconductor layer to the surface semiconductor layer, the layers being of opposite electrical conductivity. After the last photolithographic treatment of the contact and wash of the photoresist, the entire structure is again coated with a photoresist layer, which is exposed through the mask, developed and the photoresist layer remaining on the recess surface is cured.

The advantage of the passivation process according to the invention is to simplify and shorten the preparation of the passivation layer and to save technological equipment.

The attached drawing shows a section of a vertically structured structure of a semiconductor component in cross-section.

Exemplary embodiment

On a silicon wafer with a diameter of 40 mm, a thyristor four-layer PNPN ⁺ structure is formed, with an etched N ⁺ emitter over a photoresist masking layer and a deposited contact also processed by a photolithographic method. After the last operation, ie. washing the photoresist, the entire semiconductor system is re-coated with a photo resist layer and exposed through a mask designed so that the photoresist layer remains on the recess surface 2 formed by the adjacent semiconductor layer 2 and the edges of the surface semiconductor layer 1.

After the layer 4 has been developed and cured, the usual veneer grinding operations, surface protection and measurement are followed.

The photoresist layer 4 on the adjacent semiconductor layer 2 and the edges of the surface semiconductor layer 1 serves as a protective passivation layer of the adjacent semiconductor layer 2.

The method of passivating the recess surface according to the invention is suitable for all multi-layer power semiconductor devices with a vertically structured structure.

Claims (1)

A method of passivating the recess of a vertically articulated semiconductor device structure * wherein the recessed portions of the surface of the structure engage db adjacent semiconductor layers to the surface semiconductor layer * wherein the layers are of opposite electrical conductivity * characterized by the entire structure is again coated with a photoresist layer * over the mask exposes * induces and the photoresist layer (4) remaining on the surface of the recess (3) is cured.