CS226594B1 - Automatic range change-over circuitry for digital measuring apparatuses - Google Patents

Description

(54)

Circuit for automatic switching of ranges of digital measuring instrument

BACKGROUND OF THE INVENTION The present invention relates to circuitry for automatic switching of ranges of a digital measuring instrument with conversion of the measured quantity to the Ses interval.

When measuring various quantities, in particular electrical quantities, digital measuring instruments with automatic range switching are often used.

This switching is solved by a relatively complex logic circuit which compares the unmeasured numeric state with the number selected for switching to a higher or lower range. The basic comparative and relatively complex unit of such an automatic switch is a digital comparator with other auxiliary and cooperating circuits. The complexity of the automatic switch circuitry is often comparable to the actual digital meter, and therefore only the higher, and therefore more costly, class meters are equipped with the automatic range switch.

These shortcomings of the state of the art are overcome by the invention of an automatic meter switching range of the invention, wherein the first input of the first monostable circuit is coupled to a time output determining the end of the digital meter measurement. the second monostable circuit input, the second monostable circuit input, and the third monostable circuit input are coupled to a time output determining the start of the digital meter measurement, the third monostable circuit output is coupled to the fourth monostable circuit input, the fourth monostable circuit output is coupled to the first input second gate circuit, the output of the second monostable circuit is coupled to the first input of the first gate circuit, the output of the blocking circuit n the lowest address of the range is connected to the second input of the first gating circuit, the output of the first gating circuit is connected to the input for reverse counting of the synchronous

226 5S4 of the second gating circuit is coupled to the forward count input of the synchronous return counter, the highest range address lockout output is coupled to the synchronous return counter setting input, the synchronous return counter input is coupled to the highest desired range address, wherein the synchronous return address variable output counters and high range lockout input and low range lockout input and digital meter range address input are linked together ·

The advantage of the invention is the possibility to retrofit any existing digital measuring instrument with the possibility of remote address control and having Czech pulses defining linear conversion of the measured quantity to a time interval at low cost as an additional unit. to deliver these impulses. The widespread single-time and multiple-integration meters work with this magnitude-time conversion.

In new designs of such meters with said range selection based on the selection time circuit, it will achieve about 30-50% savings in the automatic switch circuitry, which can be considered as a major technical and economic benefit.

The wiring according to the invention will be explained in more detail in the following two examples of possible embodiment by means of two drawings showing the wiring diagram.

Example 1

The automatic range switch consists of four monostable MO circuits. MO. ,, MOj,

MO ^. two gating circuits HO ,. HIM". SVC synchronous return counter. the DMIN range lock circuit and the DMAX high range lock circuit. whose inputs marked with an arrow and the outputs without a marking are connected to each other and to the measuring device M according to FIG. 1.

The first input A, of the first monostable circuit MO, is connected to the time output K determining the end of the measurement of the digital meter M, the output 6 of the first monostable circuit MO, is connected to the third input g of the first hredloving circuit HO, and HCL. the input Ag of the second monostable circuit MO „and the input A ^ of the third monostable circuit MOj are connected to a time output Z determining the start of the measurement of the digital measuring instrument M, the output gj of the third monostable circuit MO ^. the output 2 ' of the fourth monostable circuit MO ', is connected to the first input 6 of the second gating circuit HO '. the output 2g of the second monostable circuit MO ' is connected to the first input 6 of the first gating circuit HO ', the output 2 of the lowest address address range DMIN is connected to the second input 2 of the first gating circuit HO ' CD Sync Return Counter SVC. the output 6 of the second gating circuit 110 is coupled to the forward count input CV of the synchronous return counter SVC. the DMAX highest address lockout circuit output θ is coupled to the set-up input L of the SVC synchronous return counter. the synchronous return counter SVC input N is connected to the highest desired address of range A, B, C, D, with the variable address output 2, _A , Sb> Sq »S, p of the SVC synchronous counter counter and input 10 of the DMAX highest address block circuit and the blocking circuit input nejnižší of the lowest address of the DMIN range and the address input of the range * *, B ^, C *, D ^ of the digital measuring instrument M are coupled together.

After connecting the automatic switch to the digital measuring instrument M with the conversion of the measured quantity to the length of time t indicated by the pulses at the outputs Z and K, the monostable circuits MO, and MO 'are triggered in each meter measuring cycle M. The monostable circuit MO produces a width pulse and the MO circuit, a gating pulse of width t _{n &gt;} corresponding to its width in each range of the meter M a numeric value for switching to a lower range. If 'zk <' platíη ⁽¹⁾ goes, pulse> P. through the centering circuit HO, to the CD input of the SVC counter, and decreases its original set default address A, B, CJ D for the highest meter range M by one. In the next cycle of the meter M, the described activity is repeated until the inequality ^t zk>'n ⁽²⁾

Then, in a longer meter cycle M, the pulse t _kp no longer passes through the centering circuit HO, and the counter of the range reduction Q ^, Qg, Qq, Qg stops at the counter SVC c.

If condition (2) is not satisfied even for the lowest address of the most sensitive range, the blocking circuit of the lowest address of the DMIN range blocks the centering circuit 110, so that further pulses t ^ p cannot pass.

Monostable circuits MOj are used to increase the range address. And the centering circuit HO1. Moj monostable produces pulse width T _Z and the circuit MO ^ hredlovací pulse width t · _Vol maximum numerical data measuring time M corresponds let · t _LA is valid for Moj circuits and MO.

t, + t zi z zkm (3) the time t _zi - t _k corresponds to its length in each meter range M when it is switched to a higher range. If for the measured data (5) <'zi -' kp 'kp ^no P ^p ° d ^ ^e through the centering circuit HOg to the counter ^t zk>' zi 'kp ⁽⁴⁾ the pulse t _kp passes through the centering circuit H0' to the input The CV of the SVC counter and increments its previous address of the range Q _A , Qg, Qg, Qg by one. In the longer cycle of the meter U, the described operation is repeated until an unevenness occurs

Then, in the next meter cycle M, the SVC pulse and the address increase Q _A , Qg, Q _c , Qg stop.

If the condition (5) or for splnšna maximum address range of the least sensitive, blocking circuit sets the maximum address range of the counter DMAX SVC setup input L to the address A, B, £, D, although the pulse T _kp still coming. If the inequality of 'žn <' zk <'zi *' kp ⁽⁶ > applies)

the pulses t _kp do not pass through any gate circuit HO,, HO ... with the address range rozsahu ^, Qg.

£ ¢, S, _D does not change.

The wiring according to the example allows automatic continuous search for the most suitable measuring range when measuring a variable varying in a wide order of magnitude in both directions or at random.

Example .2

The automatic range switch consists of two monostable MO circuits. MO „. the gating circuit HO, the synchronous return counter SVC and the blocking circuit of the lowest address of the DMIN range. the inputs indicated by the arrow and the outputs without the marking are connected to each other and the measuring device M according to FIG. 2. Against FIG. 1, the monostable circuits MOj are omitted. MO ,. a second centering circuit 110 &apos; and a blocking circuit of the highest address of the DMAX range. which allow to increase the address £ _A , Qg. £ q, SVC counters. Setting input SVC counter L is connected to the external input E. Before beginning of the measurement pulse is maintained at the input E NO OUTPUT £ _A £ g Sq »SVC highest address counters A, B £ D. After this pulse is initiated one-way search by progressively decreasing the address of the range as described in Example 1.

The connection according to the example allows automatic search for a suitable range always from the highest range when measuring quantities of which the size is not known in advance, without the risk of damaging the inputs of the measuring instrument.

Claims (1)

SUBJECT OF THE INVENTION Circuitry for automatic ranging of a digital meter consisting of four monostable circuits, two gating circuits, a synchronous return counter and two address blocking circuits, characterized in that the first input (A,) of the first monostable circuit (MO,) is connected to a time output (K) determining the end of the measurement of the digital measuring device (M), the outlet (Q) of the first monostable circuit (MO,) is connected to the third input (3) of the first gating circuit (HO, e) to the second input (6) of the second centering circuit (HOg) , the input (Ag) of the second monostable circuit (MOg) and the input (Aj) of the third monostable circuit (MO ^) are associated with a time output (Z) determining the start of measurement of the digital measuring instrument (M), output (Q3) of the third monostable circuit (MO) ^) is connected to the input (A ^) of the fourth monostable circuit (MO ^) the output (Q ^) of the fourth monostable circuit (MO ^) is connected with the first input (5) of the second gating circuit (HOg), the output (Qg) of the second monostable circuit (MOg) is connected to the first input (1) of the first gating circuit (HO,), the output (9) of the lowest range address blocking (DMIN) is connected to the second input (2) of the first gating circuit (HO,), the output (4) of the first gating circuit (HO,) is connected to the reverse count input (CD) of the synchronous return counter (SVC), output (7) of the second the gate circuit (HOg) is coupled to the CVC input (CV) of the synchronous return counter (SVC), the output (11) of the non-SSi address blocking circuit (ΓΜΑΧ) is connected to the setting input (L) of the synchronous return counter input (N) of the synchronous reversible counter (SVC) is connected to the highest desired address range (a, B, C, D), the output variables Ades (Q _a, Qg, Q _c, Qg) synchronous reversible counter (SVC) and the input (10) a blocking circuit n Most of the range address (DMAX) and the low range address (DMIN) lockout circuit input (8) and the range meter address (Α _χ , Β _χ , Ο _χ , Ώ _χ ) are connected together.