SU1051728A1 - Counter check device - Google Patents

Abstract

1. DEVICE FOR CHECKING COUNTERS, containing generator, control bus, reset bus, two AND elements, trigger, display unit, n OR-NOT elements and n checked counters, clock inputs of which are connected to the outputs of the corresponding OR-NOT elements, the first inputs of which connected to the output of the first element I, the first input of which is connected to the output of the generator and to the first input of the second element I, the second input of which is connected to the control bus and to the second input of the first element I, the third inputs of the first and second elements I connecting respectively, with the inverse and direct outputs of the trigger, whose input to zero is connected to, to the inputs of the installation to Zero of checked counters and to the reset bus, the transfer output of each checked counter, except the last, is connected to the second input of the corresponding element OR NOT , the second input of the first element OR is NOT connected to the output of the second element AND, the outputs of each of the checked counters are connected to the corresponding group of information inputs of the display unit, aphid that in order to increase the accuracy These controls, an ISET element and n additional I elements are added to it, the outputs of which are connected to the corresponding control inputs of the display unit, the control outputs of which are connected to the first inputs of the corresponding AND additional elements, the second inputs of which are connected to the output of the AND NAND element , the inputs of which are connected respectively to the generator output and to the control bus, the information output of the display unit is connected to the installation input to the trigger unit. (O 2. The device according to A.1, O T It is due to the fact that the display unit contains n groups of elements AND-NOT decoder, display unit and switch bits, the outputs of which are connected to the control inputs of the display unit and control outputs of the display unit Each control input of which is connected to the first inputs of the AND-NOT elements of the corresponding group, -the second inputs of the AND-NOT elements of which are connected to the corresponding group of informational 30 inputs of the display unit, informational output of which is connected to one of the decryption outputs torus, informative, operational inputs of the display indicator are connected to the output of the decoder, each input of which is connected to the outputs of the same NAND elements from n groups of NAND elements.

Description

The invention relates to a technique for controlling digital measuring devices, and can be used in devices for digital measurement and conversion of analog parameters as an embedded self-monitoring system. A device for checking counters is known, which contains a generator, an OR element, an AND element, an OR-NOT element, a .P checked counters, n triggers, and a display unit 1. A disadvantage of the known device is that when checking counters with a dynamic display system, no failures of the control inputs of the polling keys of the states of the counters are detected, which leads to insufficient reliability of the check of the counters. A device for checking counters is known, comprising a generator, a control bus, a reset bus, two / AND elements, an OR-NOT element, a trigger, a display unit, the OR-NOT elements, and a checkable counter KOB whose clock inputs are connected to the corresponding outputs. OR NOT units, the first inputs of which are connected to the output of the first element AND, the first input of which is connected to the output of the generator and the first input of the second element AND, the second input of which is connected to the bus control and the second input of the first element AND, the third inputs of the first and second Elements I are connected respectively to the inverse and direct outputs of the trigger, the installation input to zero of which is connected to the installation inputs to zero of the checked counters and to the reset bus to the output Transfer of each checked counter, except the last, is connected to the second input of the corresponding element OR -NON, the second input of the first element OR is NOT connected to the output of the second element AND, the outputs of each of the checked counters are connected to the corresponding group of information inputs of the display unit, the outputs of the like states checked Mykh schetchi.kov connected to inputs of OR-NO element whose output is cos union of a setting input of a trigger unit 2. The disadvantages of the known device are that when they check the counters (decimal) with the dynamic indication system, no failures of the control inputs of the interrogation keys of the state of the counting decades (interrogation keys) of the dynamic display unit leading to a continuous output of the trigger of the decade ( one or several) for common bus information, i.e. to the inputs of the decoders of the ten-day dynamic display unit, if in the corresponding decade the second O command writes the number O Also the failures of the decimal counter with, the dynamic display system remaining undetected when the latter is checked by a known device, distort the measurement results, which reduces the reliability control The purpose of the invention is to increase the reliability of the control. To achieve this goal, a meter testing device, containing a generator, a control bus, a reset bus, two AND elements, a trigger, a display unit, n OR-NOT elements and n checked counters, the clock inputs of which are connected to the outputs of the corresponding OR-NOT elements, the first inputs of which are connected to the output of the first element And, the first input of which is connected to the output of the generator and to the first input of the second element And, the second input of which is connected to the control bus and to the second input of the first element And, the third inputs of the first first and second AND gates connected respectively to inverted and direct Colm trigger outputs input. the installation to zero of which is connected to the inputs of the installation to zero of the checked meters and with the reset bus, the transfer output of each checked meter, except the last one, is connected to the second input corresponding-. the second OR element, the second input of the first element OR NOT is connected to the output of the second element AND, the outputs of each of the checked counters are connected to the corresponding group of information inputs of the display unit, the AND-NOT element and the additional AND elements are entered, the outputs of which are connected to corresponding control inputs of the display unit, the control outputs of which are connected to the first inputs n of the corresponding additional elements AND, the second inputs of which are connected to the output of the AND-NES element whose inputs are connected respectively Twain yield of the generator and to the control bus, the display information output unit is connected to an input setting unit in the trigger. In addition, the display unit contains n groups of NAND elements, a decoder, an indication unit and a bit switch, the outputs of which are connected to the control inputs of the display unit and control outputs and the display unit, each control input of which is connected to the first inputs NAND of the corresponding group, the second inputs of the NAND elements of which are connected to the corresponding group of information inputs of the display unit, the information output of which is connected to one of the outputs of the decoder, information inputs. connected to the decoder output, each input coupled to outputs of similar AND-NO elements and n groups of elements. .

Figure 1 shows a diagram of the device for checking the counters (decimal with a dynamic display system; figure 2 shows the time, the diagram of the operation of the device.

In Fig. 1, the generator 1, the elements AND 2 and 3, the trigger 4, the checked counters 5-1-5-3, the elements OR NOT 6-1-6-3, the element AND NOT 7, the elements AND 8 -1-8-3, block 9, switch, 10 bits switchboard, groups 11-1-11-3 of the IS-NO pressure monitor unit 12, display node -13, input bus 14, control 15, bus 16 Reset, Vygod 17 decoder 12, the corresponding number §,

The output of the generator 1 is connected to the first inputs of the elements 2 and 3 and the element NE 7, the second input of which is connected to the control bus 15 and the second inputs of the elements 2 and 3, the third inputs of which are connected respectively to the inverse and direct output of the trigger 4 the installation input to zero of which is connected to the reset bus 16 and to the installation inputs to zero of counters 5-1-5-3, the clock inputs of which are connected respectively to the outputs of the elements OR NOT 6-1-6-3 whose first inputs are connected to the output of the element And 2, the second inputs of the elements OR NOT 6-1-6-3 are connected according to With the output of the element I 3 and with the outputs of the transfer of the counters 5-1 5-2, the outputs of the counter 5-1 are connected respectively to the first inputs of the group 11-1 of the elements NAND, the second inputs of which are connected to the output of the element And 8-1, the outputs the counter is connected respectively to the first inputs of a group of 11-2 elements of NAND, the second inputs of which are connected to the output of the element AND 2-2 outputs of CET 5-3 are connected respectively to the first inputs of group 11-3 of the elements AND NRE, the second inputs of which are connected with the output of the element I V-TZ, the switch outputs 10 bits with control the inputs of the node 13 of the indication and are connected respectively to the first inputs of the elements AND 8-1-8-3, the second inputs of which are connected to the output of the element AND-NE 7, the information inputs of the node 13 of the display are connected to the outputs of the decoder 12, the same outputs of the elements AND-NOT Groups 11-1-11-3 are connected to the corresponding input of the decoder 12,

The output 17 of which is connected to the input of the installation in the trigger unit 4, the output bus 14 is connected to the output of the IZ element.

In Fig.2 marked diagrams. 18-22 signals, respectively, on the output of the generator 1, on the 15 of the control line, at the output of the NAND 7 element, at one of the outputs of the switch 10, and at the output of the And 8-1 element (8-2 and 8-3 ).

The device works as follows

Prior to the test, the device is in the initial state, into which it is set by applying a pulse signal through the reset bar 16. At the same time, from the direct output of the 4 nA trigger, the third input of the And 3 element is prohibited, and the inverse output to the third input of the And 2 element is allowed to pass the pulses of the generator 1. There is no control authorization to check the counter, so the generator pulses 1 through elements 2 and 3 and. AND-NOT element 7 does not pass.

At the output of the element AND-NE 7, the level of the logical unit is maintained (see the time diagram of Diagram 20, Fig. 2), and the interrogation pulses of the switch 10 bits pass to the control inputs of the groups 11-1-11-3 of the NAND elements, polling keys (see timing diagrams 21, Fig. 2). The counters (counting decade) 5-1-5-3 are found in the initial zero state. At all inputs of the polling keys 11-1-11-3 and, therefore, the inputs of the Decoder 12 regardless of the polling pulses of the keys 11-1-11-3, the level of the logical unit is maintained, corresponding to the zero state of the counting decades 5-1 -5-3. Therefore, at the output 17, corresponding to the number 9 of the decoder 12, there is no signal, on the node 13 the figure O is displayed on all {indicators, O.

 Operation of the device for checking the counter begins after the supply of a constant permissive signal on the Bus 15 of control to the inputs of the AND 2 and 3 elements of the NAND 7 (see the Time Diagram 10, FIG. 2). At the same time, generator 1 pulses begin to flow through an AND 2 element, OR-NOT 6-1-6-3 elements in parallel to the clock inputs of the counting decades 5-1-5-3, and the latter begin to synchronously switch on the falling edge of the generator 1 pulses,, and the states of the counting decades 5-1 to 5-3 are displayed sequentially by the display unit 13. At the same time, the pulses of the generator 1 begin to pass also through the element AND-HE 7 (see the timing diagram 20, FIG. 2) to the first inputs

And 8-1-8-3 elements and gating the passage of interrogation pulses from the switch 10 outputs of the dynamic indication block 9 through AND elements 8-1-8-3 to the control inputs of the polling keys 11-1-11-3 and timing the process the serial output of the counting decade states 5-1-5-3 to the inputs of the decoder 12 (as shown in the time diagram 22 of FIG. 2). As can be seen from the time diagrams, the states of the counting Decades 5-1-5-3 to the inputs of the decoder 12 are output only in the interval between, the pulses of the generator 1, and during the duration of the pulses of the generator 1 (see time intervals 12.-1, (, -tn- FIG. 2) the output of the STATUS to the inputs of the decoder 12 is prohibited, which simulates the initial zero state of the decal 5-1-5-3 counter at the inputs of the decoder 12. Therefore, when the inputs of the counting decades are parallel to 5-1 -5-3 of the first impulse on the falling edge of this impulse, these counting decks of acceptance from The corresponding state, then before the arrival of the second pulse, this state of the decades is output (from the interval of FIG. 2) to the display unit 13 and the same digit 1 is displayed on the last. When the second pulse arrives, see the interval t4-t in FIG. 2) the output of the state of the lecade to the inputs of the decoder 12 is prohibited, i.e., the initial zero state of the decades is simulated at the inputs of the specified decoder to the falling front of this pulse, therefore, the digit O is displayed on all digital indicators of the node 13 The counting decades 5-1-5-3 simultaneously switch and receive the state corresponding to this pulse, until the third pulse of the generator 1 this new state of the counting decades 5-1-5-3 is output to the inputs of the decoder 12, and on all the digital indicators of the node 13, the same figure 2 is displayed. When the third pulse of the generator arrives, 1 output of the state of counting 5-1-5-3 counts to the inputs of the deflection module 12 is again prohibited, on all digital indicators of the node 13 the figure O is again displayed. N such alternation of highlighting on digit digital signals indicator A node of 13 digits, corresponding to the states of the decades and zero, is repeated for each successive impulse of the generator 1, arriving at the inputs of the decades of 5-1-5-3 counters.

After the counting decade 5-1-5-3 of the ninth pulse arrives at the inputs, a signal at the output 17 of the decoder 12 corresponds to the number 9, which arrives at the 5th input of the trigger 4 and switches its RF state. After this, from the inverse output of this trigger, the third input of the And 2 element is prohibited, and from the direct output to the third input of the And 2 element, the decision is once again, resulting in the passage of the pulses of the generator 1 through the And 2 element and the OR NOT elements. 6-1-6-3 parallel to inputs are counting decades. 5-1-5-3 Terminates.

The malfunction of the decade of the counter at the indicated verification stage is revealed by the following symptoms. During good decades, the digital indicators of the bridal 13 of all decades of the counter should consistently highlight the same digits from 1 to 9, and after each successive digit corresponding to the state of the decade, the digital O indicator of the meter 13 will highlight the digit O. Such an alternation of digits on the digital indicators the node 13 of the counter is a sign of the health of the Rights of the most recent inputs of the polling keys 11-1-11-3 of the block 9 of the dynamic indications of the counter, namely the absence of failure of these inputs of the type open, otherwise In this case, the nature of the switching of the digital indicators of the node 13 of the counter changes.

At the same time, after triggering the trigger 4 into a single state, the pulses of the generator 1 are allowed to pass through the AND 3 element and further along the gate 14, through the OR-B 6-1 element only to the clock input of the counting decade 5-I, to the counting input of the counter, and the next stage of verification of the latter.

From the next generator pulse 1 (tenth from the moment the counter test starts), decade 5-1 returns to the initial zero state, at its output yo is an overflow signal, which through the element OR-NOT 6-2 enters the input of decade 5-2 the second bit of the counter, which also returns to the initial zero state, an overflow signal appears at its output, etc. Thus, when the input bus 14 and inter-counter communications of the counter are in good condition, all the decades 5-1-5-3 of the counter being checked return to the initial zero state, and the digital O is displayed on all the digital indicators of the node 13. either there is no counter for two decades, then all subsequent decades of senior bits retain their previous state, corresponding to the number 9, on the digital indicators of these decades in node 13 the figure 9 will be highlighted, then the figure O.

t.,.,.

When a counting decade of 5-1 arrives at the input, the next pulse begins to switch only this decade, and the digital indicator of which alternates the digits, and the answer is p. The states of the decade, and the number .0. On the digital indicators for the remaining decades 5-2-5-3 of the node 13 of the counter, the figure O is constantly displayed. If there is no connection between some two decades of the counter and when the decades are overflowing, the next decade of the most significant bits of the counter has retained the previous state 9, then on the digital indicators of these decades the numbers 9 and O are alternately highlighted.

The check of the counter is completed after the input pulse of the counting decade 5-1 of the next pulse after the overflow of decades (the eleventh pulse of the generator 1 s (1 of the beginning of the counter test), i.e. when the digital indicator of this decade is fixed at node 13, the check is 1. Stop checking the counter is produced by resolving resolution from the control bus 15.

To repeat the counter test (if necessary), it is sufficient to reset the device by applying a pulse signal on reset bus 16 in the presence of an enable signal on the control bus 14.

Takdai test: 1, the introduction of new design features into the device increases the reliability of the monitored counters compared with the prototype.

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Claims (2)

1. METER CHECK DEVICE, comprising a generator, a control bus, a reset bus, two AND elements, a trigger, an indication unit, η OR-NOT elements and η checked meters, the clock inputs of which are connected to the outputs of the corresponding OR-NOT elements, the first inputs of which are connected with the output of the first element And, the first input of which is connected to the output of the generator and with the first input of the second element And, the second input of which is connected to the control bus and the second input of the first element And, the third inputs of the first and second elements And are connected respectively respectively, with the inverse and direct outputs of the trigger, the input of the installation to zero which is connected to. the installation inputs to Zero of the monitored meters and with the reset bus, the transfer output of each monitored meter, except the last, is connected to the second input of the corresponding OR-NOT element, the second input of the first. connected to the corresponding group of information inputs of the display unit, aphids. characterized in that, in order to increase the reliability of control, an AND-NOT element and η additional AND elements are inserted into it, the outputs of which are connected to the corresponding control inputs of the display unit, the control outputs of which are connected to the first inputs of the corresponding additional elements AND, the second inputs of which are connected to the output of the AND-NOT element, the inputs of which are connected respectively to the output of the generator and to the control bus, the information output of the display unit is connected to the installation input per trigger unit. 2. The device according to claim 1, characterized in that the display unit contains η groups of elements AND NOT a decoder, an indication unit and a switch switch, the outputs of which are connected to the control inputs of the display unit and to the control outputs of the display unit, each control the input of which is connected to the first inputs of the AND-NOT elements of the corresponding group, · the second inputs of the elements AND-NOT of which are connected to the corresponding group of information inputs of the display unit, the information output of which is connected to one of the outputs of the decoder, information The input inputs of the indication unit are: they are shared with the output of the decoder, each input of which is connected to the outputs of the AND-NOT elements of the same name from η groups of AND-NOT elements. > I