CN2672859Y - 一种大功率的微电子产品 - Google Patents

一种大功率的微电子产品 Download PDF

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CN2672859Y
CN2672859Y CNU2003201227698U CN200320122769U CN2672859Y CN 2672859 Y CN2672859 Y CN 2672859Y CN U2003201227698 U CNU2003201227698 U CN U2003201227698U CN 200320122769 U CN200320122769 U CN 200320122769U CN 2672859 Y CN2672859 Y CN 2672859Y
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chip
frame
microelectronic product
pins
utility
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谭小春
石景平
朱坤恒
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Shanghai KaiHong Technology Co Ltd
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Shanghai KaiHong Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

一种涉及微电子产品的装置,尤指一种放置芯片为平台结构框架的一种大功率的微电子产品。该装置由框架、引脚、芯片、焊料、桥架及本体等组成,去除原PowemiteIII器件框架两侧面的两个对称翼,通过让本体渗入框架底部台阶的新型结构,达到使引脚和本体连在一起的目的,框架内是放置芯片的平台结构,框架的另一侧面的两个引脚采用了平脚结构。本实用新型的优点:能消除塑封体内的内应力,从而达到消除芯片碎裂的缺陷,使引脚和本体连在一起,使得器件做好后,不需要引脚的成型工序,避免了在引脚成型过程中器件的损坏,本实用新型结构简单,易于实施,并降低了制造成本。

Description

一种大功率的微电子产品
技术领域
本实用新型涉及一种大功率的表面贴装器件,尤指一种安装芯片的平台能消除内部应力,加工简单的一种大功率的微电子产品。
背景技术
美国专利号:6,608,373揭示了一种功率器件,如图1、2所示,在功率器件的侧面有折弯的引脚1。它包括一个导电的平台,平台两侧有两个弯曲的翼,塑封时达到增强和本体连接的目的。封装后这两个翼象贝壳一样包围着芯片,同时,由于翼暴露在外面,增加了器件的散热功能。
请参阅附图3、4所示,在实际生产制造过程中,采用这种设计封装的产品,存在很多芯片裂痕的缺陷。经过很多试验分析,最后得出的结论是:芯片被损坏是发生在塑封的过程中。由于在常温下,在两翼的弯角处,存在着弯曲应力,即有弯角处的内应力位置2,如图3所示。在塑封的高温环境下,受热的框架会发生热胀冷缩的,而弯角处的应力是向外的,所以内翼的膨胀要大于外翼的膨胀,由于翼被型腔限制了,这样框架截面会变成如图4那样的形状,其形状为变形后放置芯片的平台4,等到冷却后,框架截面又会恢复为原来的形状。在这个过程中,框架平台和芯片之间的连接是硬性的连接,所以在受热的时候,框架平台有向上的力作用在芯片的底部,而冷却时,框架平台对芯片有向下拉的力,就在这样的过程中,芯片就产生了裂痕。
发明内容
为了克服上述不足之处,本实用新型的主要目的旨在提供一种能消除塑封体内的内应力,从而消除芯片碎裂缺陷的装置。
本实用新型要解决的技术问题是:要消除器件内部的应力,要使引脚和本体用新的方式连在一起,使得器件做好后,不需要引脚的成型工序,避免了在引脚成型过程中器件损坏的可能等问题。
本实用新型解决其技术问题所采用的技术方案是:该装置由框架、引脚、芯片、焊料、桥架及本体等组成,去除原PowemiteIII器件框架两侧面的两个对称翼,通过让本体渗入框架底部台阶的新型结构,达到使引脚和本体连在一起的目的。
所述的一种大功率的微电子产品的框架内是放置芯片的平台结构,框架的另一侧面的两个引脚为平的引脚结构,即采用了平脚结构。
本实用新型的有益效果是:能消除塑封体内的内应力,从而达到消除芯片碎裂的缺陷,使引脚和本体连在一起,使得器件做好后,不需要引脚的成型工序,避免了在引脚成型过程中器件的损坏,本实用新型结构简单,易于实施,降低了制造成本。
附图说明
下面结合附图和实施例对本实用新型进一步说明。
附图1是现有的PowemiteIII器件示意图;
附图2是现有的PowermiteIII框架立体示意图;
附图3是现有的PowemiteIII器件的截面示意图;
附图4是现有PowemiteIII在高温环境下截面的形状示意图;
附图5本实用新型的PowemiteIII框架立体示意图;
附图6是本实用新型的PowemiteIII框架底面示意图;
附图7是本实用新型结构器件封装步骤示意图;
附图8是本实用新型器件封装后的示意图。
附图中标号说明:
1-折弯的引脚;                  10-框架;
2-内应力位置;                  20-焊料;
3-对称翼;                      30-芯片;
4-变形后放置芯片的平台;        40-桥架;
5-平的引脚;                    50-桥架;
6-平台;
7-台阶;
具体实施方式
请参阅附图5、6、7、8所示,该装置由框架10、引脚、芯片30、焊料20、桥架40及本体50组成,本实用新型去除原PowemiteIII器件框架10两侧面的两个对称翼3,通过让本体50渗入框架10底部台阶7的新型结构,达到使引脚和本体50连在一起的目的。
所述的一种大功率的微电子产品的框架10内是放置芯片30的平台6结构,框架10的另一侧面的两个引脚为平的引脚5结构,即采用了平脚结构,这样使得器件做好后,不需要引脚的成型工序,避免了在引脚成型过程中器件的损坏。
请参阅附图7、8所示,实施步骤如图7,首先,在框架10平台6上点上焊料20,贴芯片30,然后再在芯片30上表面和框架10的另一端点上焊料20,最后就可以把桥架40贴上,进行塑封了。当塑封的时候,本体顺着框架10底面两旁,充满整个台阶7,从而达到把器件的脚和整体连接在一起的目的,封装后如图8所示。

Claims (2)

1、一种大功率的微电子产品,该装置有框架、引脚、芯片、焊料、桥架及本体,其特征在于:去除框架两侧面的两个对称翼,本体渗入框架底部台阶,引脚和本体连在一起。
2、根据权利要求1所述的一种大功率的微电子产品,其特征在于:所述框架内是放置芯片的平台结构,框架的另一侧面的两个引脚为平的引脚结构。
CNU2003201227698U 2003-12-23 2003-12-23 一种大功率的微电子产品 Expired - Lifetime CN2672859Y (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105609478A (zh) * 2014-11-14 2016-05-25 英飞凌科技股份有限公司 电连接组件、半导体模块和用于制造半导体模块的方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105609478A (zh) * 2014-11-14 2016-05-25 英飞凌科技股份有限公司 电连接组件、半导体模块和用于制造半导体模块的方法
US9991609B2 (en) 2014-11-14 2018-06-05 Infineon Technologies Ag Electrical connection module, semiconductor module and method for producing a semiconductor module
CN105609478B (zh) * 2014-11-14 2018-11-16 英飞凌科技股份有限公司 电连接组件、半导体模块和用于制造半导体模块的方法

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