CN1533605A - 免焊接印刷电路板组合 - Google Patents

免焊接印刷电路板组合 Download PDF

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CN1533605A
CN1533605A CNA028144317A CN02814431A CN1533605A CN 1533605 A CN1533605 A CN 1533605A CN A028144317 A CNA028144317 A CN A028144317A CN 02814431 A CN02814431 A CN 02814431A CN 1533605 A CN1533605 A CN 1533605A
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electronic building
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G·弗兰科维斯基
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Infineon Technologies AG
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Abstract

本案系揭露一种电子组件组合。该电子组件组合可包含一印刷电路板(24),一框架(12)固定至该印刷电路板(24)以及一或多电子组件(32)装设至该框架(12)中且配置电性连接于该印刷电路板(24)之导电轨迹,其中免焊接以连接该电子组件至该印刷电路板。本案亦揭露一种组合该电子组件组合之方法。

Description

免焊接印刷电路板组合
发明之领域
本发明系关于电子组件与印刷电路板(PCB)组合。更特别地,本发明系关于一电子组件组合,其不需要焊接,以固定一或多电子组件至一相连印刷电路板之导电轨迹。
发明之背景
传统的印刷板组合包含集成电路(ICs),且其它的电子组件被焊接至一相连印刷电路板之导电轨迹。虽然已经证实在某些方面,焊接可以有效地将电子组件连接至一印刷电路板,可自一相连的电力来源传送电流至此电子组件,但是还是有各种问题与使用焊接相关。
其中一重要问题,系在焊接的过程中,被焊接的电子组件系暴露于非常高的温度下。所以,该电子组件会受到许多温度压力,其会造成立即或未来表现的故障。为了将此故障最小化,被焊接的IC会进行不同的制造与品质保证过程,其系相当复杂且耗费金钱。
品质保证检验通常需要在制造一印刷电路板的过程中,多次检验每一焊接点。例如,需要此一检验,以确保连接一电子组件导电终端至一印输电路板的导电轨迹之焊接点,已被适当形成,且不包含任何空隙。在该相连的印刷电路板组合已完成后,可能需要另一检验步骤,以确保在预先的或最后的清理操作过程中,已经移除该焊接操作所使用之流量。
与该被焊接电子组件相关之另一问题,系在一故障中或是当需要将该组件升级时,必须移除该焊接(亦即该电子组件必须被解焊接)。该解焊接程序系将该相连于印刷电路板上的电子组件,暴露至另一温度压力与清理程序。在此范例中,一欣组件再次焊接,以置换该故障的组件,同样地与高温度相关的风险存在,且需要额外的品质控制检验与清理程序。
为了避免潜在的问题与使用焊接的相关成本,已有许多成果系发展无焊接连接电子余件之导电终端与印刷电路板之导电轨迹。此一成果牵涉将电子组件之导电终端固定至一相连印刷电路板的电镀穿孔。此程序需要特别的无焊接的栓,用作为该电子组件之导电终端。在固定过程中,由于机械压力,所以此固定程序存在几个问题,包含成本增加,制造步骤增加,材料之不兼容以及电子组件故障。
因此,现存的方法与组合包含焊接与无焊接连接,皆有不同的缺点。所以需要新的电子组件,用以克服现存的问题。
发明之概述
本发明提供一电子组件装置,其不需要使用焊接连接一或多相连的至一相连印刷电路板的导电轨迹,因而此电子组件克服了习知技艺的缺点。在一实施例中,该电子组件组合系包含一印刷电路板,其具有一导电轨迹于其上。具有至少一隔间之一框架可被固定至该印刷电路板。至少一具有导电终端于其上的电子组件,系被保持在该框架之至少一隔间中,因此排列其导电终端,且与该印刷电路板之导电轨迹接触。在此组合中,不需要焊接以保持该电子组件之导电终端与该印刷电路板的导电轨迹接触。
较佳系,该组合包含排列的一热槽(heatsink,散热器),以接触至少一电子组件。该热槽可被排列于该框架上,且可被用以保持至少一电子组件在该框架隔间中,因此可保持其导电终端与该印刷电路板对应的轨迹接触。在一实施例中,该热槽一般可为U型。在其它实施例中,该热槽可具有适用于保持与该框架中一或多电子组件接触之任何结构。
较佳系该至少一电子组件之该导电终端,铅直向外延伸至该印刷电路板之导电轨迹。该组合可包含黏着组成,用以固定该电子组件至该框架。该框架可藉由不同的方式,被固定至相连的印刷电路板,包含带不限于黏着剂、铆钉、螺丝、钳子与其它机械装置。
在一较佳实施例中,该至少一电子组件系包含复数个电子组件,且该至少一框架隔间,系包含复数个隔间,其中每一电子组件系被保持在个别的隔间中。
该框架可包含一肩状物于每一隔间中。该电子组件较佳系包含一模具(die)且该导电终端系自该模具向外延伸。当该电子组件是在所组合的位置中时,该模具可被排列紧邻该隔间中的该肩状物。在一实施例中,一肩状物是包含于一框架隔间中,当该电子组件系排列在所组合的位置中时,较佳系该肩状物包含相对立的肩状物,且该电子组件之模具系紧邻该相对立的肩状物。
由于本发明之电子组件组合不需要使用焊接,该电子组件之导电终端,较佳系在受到一足够力量后,自一第一延伸结构变形至一第二压缩结构,因而该导电终端系保持与该相连印刷电路板之导电轨迹接触。
在本发明之另一实施例中,该电子组件组合非特定包含一相连的印刷电路板,但是其是被装设在一印刷电路板上。较佳系,该电子组件组合包含一框架,其系用以被固定至印刷电路板。亦提供一或多电子组件,其各具有导电终端于其上。该框架定义一或多隔间,其中保持所对应的电子组件。
该电子组件组合亦可包含一热槽,其排列系与该电子组件连接。该热槽较佳系位于该框架上,其功能至少部分可自该电子组件进行散热,或是将该电子组件保持在对应的框架隔间中。在一实施例中,该热槽可具有一U型结构。
根据本发明之另一方面,系提供一种组合一电子组件组合之方法。在一实施例中,该方法包含将一框架连接至一印刷电路板。而后,至少一电子组件被插入该框架中对应的隔间位置,因此其导电终端系被放置与印刷电路板之导电轨迹接触。而后,放置一热槽装置在该框架上,以与该至少一电子组件连接,以固定该电子组件于一组合位置中。
根据本发明所提供之另一方法,首先可将一或多电子组件插入至一框架的对应隔间。而后,连接一热槽至该框架,且固定其中的电子组件,以形成一组合。而后,连接该组合至一对应的印刷电路板,因而被固定在该框架中的该电子组件之该导电终端,系与该印刷电路板之导电轨迹接触。
上述本发明之特征与优点,可藉由参考下列图标与详细说明,得以更详细之解释。
图标之简单说明
第1图系一概示图,说明本发明之组合的横切面。
第2图A系一横切面概示图,系说明第1图之更进一步的组合状态。
第2图B系第2图A的部分放大图。
第3图A系一横切面概示图,说明第1图与第2图A组合后之的组合。
第3图B系第3图A的部分放大图。
第4图系一俯视概示图,说明第1图组合后之组合。
第5图系说明本发明第二实施例之部分横切面概示图。
第6图系一横切面概示图,系说明第5图之更进一步的组合。
第7图系一横切面概示图,说明第5图与第6图之组合状态。
第8图系一部分放大图,说明本发明之第三实施例。
第9图系说明第8图之组合后状态。
第10图系一横切面概示图,说明本发明所提供之组合方法的一实施例。
第11图系一横切面概示图,说明第10图之更进一步组合状态。
第12图系一横切面概示图,说明第10图与第11图之组合状态。
第13图系一横切面概示图,说明本发明组合与方法之另一实施例。
第14图系一横切面概示图,说明第13图之更进一步组合状态。
第15图系一横切面概示图,说明第13图与第14图之组合状态。
发明之详细说明
根据本发明之一较佳实施例,一电子组件组合10系如第1图至第4图中所示。该组合10系包含一框架12,一印刷电路板24系装设至该框架12上,以及一或多电子组件30,例如动态随机存取内存(DRAM)装设在该框架12上之集成电路(ICs)。
第1图是沿着第4图A-A线,所示之部分横切面概示图。其说明该框架12系包含由内壁16所定义之复数个隔间14。在第1图至第4图所说明的实施例中,一肩状物18系在该隔间14之内壁16附近,向周边延伸。当该IC30系于一组合位置时,该肩状物18系作为一压缩停止,供一对应IC30之模具32静止于其上。该框架12具有一底部表面20,如第1图至第3图中所示,其系座落于该对应印刷电路板24之一上表面26之上。该框架12亦包含一顶部表面22,其较佳系环绕每一隔间14。
该框架12较佳系由聚合物材质所制,但可由足以保持ICs 30于组合位置之任何材质所制。较佳系,该框架12系由相对高电阻率之材质所制,因此可以避免由该电子组件组合10之操作干扰所造成的任何短路状况。
该印刷电路板24可以是任何的习用印刷电路板,且本发明之目的并不限于任何特定形式的印刷电路板。关于这方面,印刷电路板24可为坚硬的或是具弹性的,且可包含任何具有导电轨迹图案于其上之基质。第1图至第4图所示之印刷电路板24,系包含一表面26,其上具有一导电轨迹28(如第4图中所示)。此处所指「导电轨迹」系包含印刷电路板上任何的导电流径,例如导电垫,导电终端或其相似物。
根据本发明之较佳实施例,包含第1图至第4图所示之实施例,电子组件如IC30系包含一模具32,且该导电终端34系自该模具32铅直向外延伸。虽然本发明之较佳实施例的电子组件系IC,但是可以理解的是根据本发明,可使用任何具有导电终端于其上的电子组件。所以可理解「IC」一词,系包含集成电路与其它电子组件。在一较佳实施例中,IC30可包含具有铅直排列导电终端34之一DRAM。然而,在本发明之范围内,可使用具有其它不同形式导电终端的电子组件。
该组合10亦包含一热槽36。如该技艺之人士所知,热槽系用以自电子电路装置散热。关于本发明,热槽36亦可作为将IC30保持在框架12之对应隔间14中的组合位置中。如第1图至第4图中所示,热槽36通常具有平面的与延伸的结构。当IC30置于框架12之隔间14中时,热槽36系被置于其上,因此其系与模具32接触。
在组合该电子组件组合10之过程中,可能需要施予一外力铅直于该热槽36之表面,以压缩IC30之导电终端34,直到该导电终端34与印刷电路板24表面上所形成的对应导电轨迹28之间,形成一所欲之接触。
如第2图B所示之实施例,当热槽36先被置于模具32之上时,模具32之内表面肩状物18之间,存在着以「dy」表示的间隔。同样的间隔dy亦存在于热槽36之内表面与框架12之顶部表面之间。当铅直施加(亦即向印刷电路板24)一足够外力至热槽36之表面时,当导电终端34变形至某一程度时,第2图B中所示两个位置的间隔dy系被排除。此变形是如第3图B中所示。该变形系以终端34之导电材质之性质为基础。在其未压缩状态时,此时的导电终端系为一第一延伸结构。在其最终组合位置中,其中已发生变形,此时的导电终端34系为压缩结构。
第1图至第15图中ICs 30、130、230与330可被压缩,所以当其被施力而接触一相连印刷电路板之导电轨迹时,其至少某些导电终端是变形的,原因是该印刷电路板通常不具有完美的平面性,且因为其铅直延伸导电终端,自相连的模具所延伸之长度通常不一致。所以,往该对应印刷电路板压缩该ICs,会造成某些铅直接触组件之变形,如第2图B与第3图B中所示,以及如下列第8图与第9图中所述。
黏着组成(未显示)可被置于该热槽36与该框架12之该顶部表面22之间,以固定热槽36于其最终的组合位置。此外,亦可使用不同的机械装置,例如螺丝、铆钉、钳子或其它相似物,以故定热槽36于框架12上之组合位置中。再者,在本发明之另一实施例中,热槽36可整合于框架12,如第13图至第15图中所示。虽然,热槽36与框架12系指不同的组件,但是具有整合热槽之框架组合或是任何其它可保持IC 30于对应隔间14中组合位置中的设计结构,皆不脱本发明之范围。
可藉由黏着剂组成、螺丝、铆钉钳子与其相似物,将框架12固定至印刷电路板24。
第1图至第3图中所示本发明之实施例,系为单一侧模块。亦即,IC 30仅装设至印刷电路板24之一侧上。根据本发明之另一较佳实施例,系揭露一双侧模块。亦即,IC可被装设在一相连印刷电路板之双侧上。特别地,第5图至第7图系说明具有另一形状热槽之一双侧模块实施例。为方便起见,本发明之所有实施例中,相同的符号是代表相同的组件。其它实施例如第5图至第7图所示,相似的符号则带有「1」、「2」或「3」。
关于第5图至第7图,该双侧模块系包含一双侧组合110。一双侧框架112系装设在组合110之上。隔间114系配置于该双侧框架223之双侧。该框架112之结构系与第1图至第4图所述之框架112相同,除了该框架112包含两侧,而IC 130系装设在其中。
组合110中之一结构差异,系其包含具有U型结构之一修饰的热槽136。热槽136系包含一第一接触臂138,延伸平行于该第一接触臂138之一第二接触臂140,以及一连接件142,其系连接接触臂138与140。
在操作该印刷电路板组合110之过程中,热槽136,如热槽36,可自IC 130进行散热。用于散热之不同材质,系如此技艺之人士所知者。所以,本发明实施例中的热槽可由现存之材料所制,或者是由未来可获得供以散热之材料所制。在一些实施例中,本发明之热槽不需要实际具有散热的功能。在这些实施例中,该热槽系单纯地将相连的IC保持在该框架中的组合位置中。
如第7图所示,当该热槽136被置于一组合位置中,对应于框架112与IC 130时,该第一接触臂138系相邻于上模具132之外表面,而该第二接触臂140系相邻于下模具132之外表面,因此上与下IC系被保持在框架112之对应隔间的114中的组合位置中。如同第1图至第3图之实施例所示,建构与配置第5图至第7图之双侧模块,因而对应IC 130之导电终端134,系保持与印刷电路板110上对应的导电轨迹相接触,不需要焊接。此无焊接之结构具有许多优点,包含排除了高温压力与许多昂贵制程,以及省略了需要焊接的系统所需之检验连接电子组件至一相连印刷电路板之步骤。
本发明之系对于需要置换的缺陷部分,提供了一特别简单的重作方法。关于含有DRAM组件的高密度内存系统,当在使用高容量内存模块时,其通常需要保证具有超过90%的高模块产量。关于高组件产量的需求,特别重要的是具有一简单的重作方法,以置换有缺陷的IC。本发明即是可达到此一目的。
如第1图至第15图之实施例所示,由于该导电终端之本质,施加在该IC之导电终端上的力是可被承受的,其造成如第3图B与第9图所示之变形。因此,本发明系利用本发明较佳实施例中,所使用的IC包装之该导电终端的铅直配置之优点。
第8图与第9图系说明一印刷电路板组合210之另一实施例。第8图与第9图之实施例和第1图至第3图B之实施例之间,最主要的差别是第8图与第9图之框架212不包含一肩状物供相连的IC 230于组合位置中时静置于其上。在第8图与第9图的设计中,IC 230之模具232并非由框架212之任何部分提供铅直支撑。取而代之的是,框架212仅用以表示IC 230之该导电终端234系与印刷电路板224之导电轨迹相连。该印刷电路板组合210之所有其它方面,皆是与印刷电路板组合10相同。
亦如第8图与第9图所示,当IC 230初始时被置于框架212之对应的隔间214中时,该模具232之外表面与框架212之顶部表面之间,存在一铅直间隔dy。然而,当热槽236被施力至其座落位置相邻于框架212之顶部表面222时,此铅直间隔dy消失,而仍与模具232之外表面保持连接。如上所述,由于导电终端与其铅直位向之可变性的本质,所以可以承受施加在IC 230上的压缩力。第9图系说明导电终端234,如何自第8图中的延伸结构变形至相对的压缩结构。
第10图至第12图系为本案之另一较佳实施例,其所具有之结构系与第1图至第3图B中之结构相同。然而,第10图至第12图系提供另一种组合一电子组件组合10之方法。其本质为在放置该IC 30与框架12于相连印刷电路板24之上前,包含框架12、IC 30与热槽36之包装以被完全组合。预先组合框架12、IC 30与热槽36之优点是最后装设在一相连印刷电路板时,所需处理的零件数量是被降低。
本发明之另一实施例系如第13图至第15图中所示。在此实施例中,在放置一或多IC 330之前,一热槽336可被整合或固定至一框架312。在紧邻热槽336之内表面之前,IC 330系被单纯地被置于框架312之对应隔间中。而后可将框架312装设在一相连印刷电路板324的一表面326上,因此铅直配置的IC 330之导电终端334,系与印刷电路板324之表面326之导电轨迹(未显示)连接。由于在组合操作过程中,所要处理的印刷电路板组合零件数量减少,可获得如第13图至第15图中所示实施例的优点。如同其它实施例中所述,不同零件包含该印刷电路板、框架、IC与热槽之组合,较佳系藉由使用黏着剂组成或机械装置如螺丝、铆钉或其它相似物而完成。
虽然本发明已藉由特定之较佳实施例进行说明,但是可理解的是这些实施例仅是用于说明本发明之结构与特征。所以,对于本发明之结构与组件配置,以及方法步骤的诸多修饰,仍不脱离本发明申请专利范围之精神与范围。

Claims (22)

1.一种电子组件组合,其包含:
(a)一印刷电路板,其具有导电轨迹于其上;
(b)一框架,其被固定至该印刷电路板,该框架定义至少一隔间;以及
(c)至少一电子组件,其具有导电终端于其上,该至少一电子组件系被保持在该至少一隔间中,因此该至少一电子组件之该导电终端系被排列,且与该印刷电路板之该导电轨迹接触,其中免使用焊接而保持该至少一电子组件之该导电终端与该导电轨迹接触。
2.如权利要求1之电子组件组合,更包含一热槽,其系被配置接触于该至少一电子组件。
3.如权利要求2之电子组件组合,其中该热槽系被配置在该框架上,且被用以保持该至少一电子组件于该至少一隔间中。
4.如权利要求3之电子组件组合,其中该热槽具有一U型结构。
5.如权利要求1之电子组件组合,其中该至少一电子组件之该导电终端系铅直向外延伸至该印刷电路板之该导电轨迹。
6.如权利要求1之电子组件组合,更包含黏着组成于该至少一电子组件与该框架之间,以固定该至少一电子组件至该框架。
7.如权利要求1之电子组件组合,其中该框架系包含一肩状物于一隔间中;包含一模具之该至少一电子组件;以及自该模具向外延伸之该导电终端,当该至少一电子组件系被配置于一组合位置时,该模具系紧邻该肩状物。
8.如权利要求7之电子组件组合,其中该肩状物系包含对立的肩状物,当该至少一电子组件系被配置于一组合位置时,该模具系紧邻该对立的肩状物。
9.如权利要求1之电子组件组合,其中使得当施加一足够力量后,该至少一电子组件之该导电终端系被建构,自一第一延伸构造变形至一第二压缩构造,因而该导电终端系被保持与该印刷电路板之该导电轨迹接触。
10.一种电子组件组合,其包含:
(a)一印刷电路板,其具有导电轨迹于其上;
(b)一框架,其被固定至该印刷电路板,该框架定义复数个隔间;以及
(c)复数个电子组件,其具有导电终端于其上,该复数个电子组件系被保持在个别的该复数个隔间中,因此其导电终端系被排列,且与该印刷电路板之该导电轨迹接触,其中免使用焊接而保持该至少一电子组件之该导电终端与该导电轨迹接触。
11.如权利要求10之电子组件组合,更包含至少一热槽,其系被配置接触于该复数个电子组件。
12.如权利要求11之电子组件组合,其中该至少一热槽系被固定至该框架。
13.如权利要求11之电子组件组合,其中该至少一热槽系具有一U型结构。
14.如权利要求10之电子组件组合,更包含黏着组成于该复数个电子组件与该框架之间,以固定该电子组件至该框架。
15.如权利要求10之电子组件组合,其中该框架系包含一肩状物于每一该隔间中;包含一模具之每一该复数个电子组件;以及自该模具向外延伸之该导电终端,当配置于对应一该隔间之一组合位置中时,该每一电子组件之该模具系紧邻该肩状物。
16.如权利要求15之电子组件组合,其中该肩状物系包含对立的肩状物,当该至少一电子组件系被配置于对应一该隔间中的一组合位置中时,每一电子组件之该模具系紧邻个别之该对立的肩状物。
17.如权利要求10之电子组件组合,其中使得当施加一足够力量后,该复数个电子组件之该导电终端系被建构,自一第一延伸构造变形至一第二压缩构造,因而该导电终端系被保持与该印刷电路板之该导电轨迹接触。
18.一种电子组件组合,其包含:
(a)一框架,其被固定至一印刷电路板,该框架定义至少一隔间;以及
(b)至少一电子组件,其具有导电终端于其上,该至少一电子组件系被保持在该至少一隔间中,因此该至少一电子组件之该导电终端系被排列,且与该印刷电路板之该导电轨迹接触,其上之该框架可被固定,因此免使用焊接而保持该至少一电子组件之该导电终端与一相连印刷电路板之该导电轨迹之间的接触。
19.如权利要求18之电子组件组合,更包含一热槽,其系被配置接触于该至少一电子组件。
20.如权利要求18之电子组件组合,其中该热槽系被配置在该框架上,且被用以保持该至少一电子组件于该隔间中。
21.如权利要求20之电子组件组合,其中该热槽具有一U型结构。
22.如权利要求18之电子组件组合,其中该框架系包含一肩状物于该隔间中;包含一模具之该至少一电子组件;以及自该模具向外延伸之该导电终端,当该至少一电子组件系被配置于一组合位置时,该模具系紧邻该肩状物。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102340934A (zh) * 2010-07-20 2012-02-01 深圳市堃琦鑫华科技有限公司 一种无金属钎料pcb电子装配工艺

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7716823B2 (en) * 2004-04-08 2010-05-18 Hewlett-Packard Development Company, L.P. Bonding an interconnect to a circuit device and related devices
DE102004037656B4 (de) * 2004-08-03 2009-06-18 Infineon Technologies Ag Elektronikmodul mit optimierter Montagefähigkeit und Bauteilanordnung mit einem Elektronikmodul
US20090129012A1 (en) * 2007-11-21 2009-05-21 Anton Legen Method and apparatus for heat transfer
DE102011005890A1 (de) 2011-03-22 2012-09-27 Robert Bosch Gmbh Elektronikgerät mit Schaltungsträger in einem Einschubgehäuse
US10631409B2 (en) 2016-08-08 2020-04-21 Baker Hughes, A Ge Company, Llc Electrical assemblies for downhole use

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6230367U (zh) * 1985-08-07 1987-02-24
US5155661A (en) * 1991-05-15 1992-10-13 Hewlett-Packard Company Aluminum nitride multi-chip module
JPH05121487A (ja) * 1991-10-26 1993-05-18 Rohm Co Ltd 半導体装置の実装構造および実装方法
JPH05175280A (ja) * 1991-12-20 1993-07-13 Rohm Co Ltd 半導体装置の実装構造および実装方法
US5473510A (en) * 1994-03-25 1995-12-05 Convex Computer Corporation Land grid array package/circuit board assemblies and methods for constructing the same
US5959840A (en) * 1994-05-17 1999-09-28 Tandem Computers Incorporated Apparatus for cooling multiple printed circuit board mounted electrical components
DE29620595U1 (de) * 1996-11-26 1998-01-02 Siemens AG, 80333 München Sockel für eine integrierte Schaltung
EP1145612B1 (en) * 1998-12-04 2005-03-09 Formfactor, Inc. Method for mounting an electronic component
US6325552B1 (en) * 2000-02-14 2001-12-04 Cisco Technology, Inc. Solderless optical transceiver interconnect

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102340934A (zh) * 2010-07-20 2012-02-01 深圳市堃琦鑫华科技有限公司 一种无金属钎料pcb电子装配工艺

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US20030016503A1 (en) 2003-01-23
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TW550985B (en) 2003-09-01
CN100470772C (zh) 2009-03-18

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