CN2299423Y

CN2299423Y - VHF frequency synthesizer

Info

Publication number: CN2299423Y
Application number: CN 97239606
Authority: CN
Inventors: 王丹妮; 陈淑芳; 边玉敏
Original assignee: SHAANXI OBSERVATORY CHINESE ACADEMY OF SCIENCES
Current assignee: SHAANXI OBSERVATORY CHINESE ACADEMY OF SCIENCES
Priority date: 1997-05-12
Filing date: 1997-05-12
Publication date: 1998-12-02
Anticipated expiration: 2007-05-12

Abstract

The utility model relates to a VHF frequency synthesizer which is used in application fields, such as accurate signal source generation, scientific experiments, metering tests, communication, etc. and is composed of two phase locked loop circuits. A low noise field effect transistor LC oscillator and a programmable frequency divider are adopted, the module varying frequency dividing technique is adopted to solve the limit of the working speeds of variable frequency dividers, and the automatic locking of the up-regulation and the down-regulation of frequencies and the control of two stage step sizes. The utility model with the characteristics of high resolving rate of collective frequencies and favorable stability of information frequencies can be used for the field of the application technique of VHF.

Description

A kind of VHF Frequency Synthesizer

The utility model belongs to the improvement of VHF Frequency Synthesizer structure, relates to the generation and the scientific experimentation that are used for accurate signal source, respective application fields such as metrology and measurement and communication.

Adopt basic monocycle phase lock circuitry in the existing frequency synthesizer mostly, its principle is, behind the loop-locking, output frequency f=Nfr, fr is a reference frequency, when fr one timing, the frequency dividing ratio that changes variable frequency divider just can change output frequency f, here should select lower signal as phase discrimination signal for the resolution that improves the synthesizer output frequency, this will inevitably cause the reduction of output signal short-term stability, cause the irregular working of loop, so that actual phase discrimination signal be difficult for to be selected is low excessively, so this frequency synthesizer to exist resolution lower, shortcomings such as the frequency stability of signal is relatively poor.

The purpose of this utility model is to provide a kind of output signal resolution to be subjected to loop affects little, comprehensive definition is higher, the VHF Frequency Synthesizer that frequency stability is good, this synthesizer can solve the restriction of variable frequency divider operating rate, realizes the control of two grades of step pitches.

The utility model is realized with following technical scheme for achieving the above object, it is made up of two phase-locked loop circuits, first phase-locked loop circuit is connected by frequency mixer, phase discriminator and integrated voltage controlled oscillator and forms, and second phase-locked loop circuit is formed by phase discriminator, frequency divider, programmable frequency divider and the connection of low noise field-effect transistor LC oscillator.Crystal is with reference to the local oscillation signal that produces input as its phase discriminator behind the frequency divider frequency division in second phase-locked loop circuit, the output signal of low noise field-effect transistor LC oscillator behind frequency divider and programmable frequency divider frequency division as another input of phase discriminator, the frequency of oscillation of identified result control low noise field-effect transistor LC oscillator, the signal of finishing its control range is synthetic; In first phase-locked loop circuit, crystal reference local oscillator signal and integrated voltage controlled oscillator output signal are in frequency mixer after the mixing, again with second phase-locked loop in the output signal of frequency divider in its phase discriminator, compare phase demodulation, identified result is used for controlling the frequency of oscillation of integrated voltage controlled oscillator, thereby finish the addition with crystal reference local oscillator signal, export final composite signal.

In second phase lock circuitry, the little and electric accent rate of low noise field effect transistor D ' and junction capacitance that is connected with in the low noise field-effect transistor LC oscillator changes variable capacitance diode D1 ' greatly and the feedback capacity C3 ' with Positive and Negative Coefficient Temperature.

In second phase-locked loop circuit, programmable frequency divider adopts and becomes the mould frequency splitting technology, and its circuit is mixed by ECL circuit and TTL circuit and forms, and the slower relatively TTL programmable counter of its medium velocity is controlled the double modulus prescalar in the ECL circuit.

The utility model has compared with prior art adopted low noise field-effect transistor LC oscillator, and noise is low, frequency of oscillation is high, scope is big, variations in temperature is little to Circuit Parameter's Influence characteristics that it has have improved the stability of synthesizer; Because total output signal resolution of the present utility model equals the resolution of first phase-locked loop circuit, its output signal is subjected to loop affects little, and second phase-locked loop circuit dwindles the output frequency step pitch, thereby has improved the definition of synthesizer; Again because the utility model has also adopted change mould frequency splitting technology, solved the restriction of variable frequency divider operating rate, realize automatically locking the control of mediation downward modulation frequency and two grades of step pitches, therefore had frequency synthesis definition height, the characteristics that the signal frequency stability is excellent.

Below in conjunction with accompanying drawing the utility model is described in further detail:

Fig. 1 is the utility model operation principle block diagram;

Fig. 2 is the utility model first phase-locked loop circuit figure;

Fig. 3 is the circuit diagram of low noise field-effect transistor LC oscillator in the utility model second phase-locked loop circuit;

Fig. 4 is programmable divider circuit figure in the utility model second phase-locked loop circuit.

Referring to Fig. 1, the utility model is made up of two phase-locked loop circuits, first phase-locked loop circuit is formed by frequency mixer 2,

phase discriminator

3 and 1 connection of integrated voltage controlled oscillator VCO, second phase-locked loop circuit is by

frequency divider

5,6, and programmable frequency divider 7, phase discriminator 4 and low noise field-effect transistor LC oscillator VCO2 connection form.Crystal is with reference to the local oscillation signal of 1 generation 96MHZ in second phase-locked loop circuit, behind the 960K of frequency divider 6 frequency division as an input of phase discriminator 4, the frequency of oscillation of low noise field-effect transistor LC oscillator VCO2 is 33～47MHZ, its output signal is carried out 10 frequency divisions through frequency divider 5, programmable frequency divider 7 carries out behind 33000～47000 frequency divisions another input as phase discriminator 4, the frequency of oscillation of its identified result control VCO2, finishing its control range is 3.3～4.7, and the branch frequency is that the signal of 100MHZ is synthetic; The output signal of crystal reference local oscillator signal 96MHZ and integrated voltage controlled oscillator VCO 1 is in frequency mixer 2 after the mixing in first phase-locked loop circuit, in phase discriminator 3, compare phase demodulation through the output signal behind 10 frequency divisions with frequency divider 5 again, identified result is used for controlling the frequency of oscillation of integrated voltage controlled oscillator VCO 1, its frequency is 99.3～100.7MHZ, thereby finish with reference to the addition of crystal oscillator signal, export final composite signal fo.

Here, fo=96MHZ+fL

＝96MHZ+(3.3～4.7)MHZ

=(99.3～100.7) MHZ, fL is the output frequency of second phase-locked loop in the formula.

Draw from above, the resolution of the always synthetic output signal of the utility model equals the resolution of first phase-locked loop, the stability of total output frequency equals the frequency stability fL/fo of first phase-locked loop, by fL/fo=(3.32～4.67) %, this can improve the influence of a pair of total output frequency stability of loop greatly; The specification requirement of working as system's output frequency stability conversely speaking, can reduce the first phase-locked loop subsystem specification requirement to regularly, thereby has improved the design limit to it, makes its realization ratio be easier to.

Referring to Fig. 2, in first phase-locked loop circuit, its output frequency is 99.3～100.7MHZ, and frequency mixer 2 adopts two balance simulation multiplier MC1496, suppresses to strengthen unnecessary parasitism output.Phase discriminator 3 adopts the T4044 integrated package, integrated voltage controlled oscillator VCO 1 adopts E1648, its frequency of oscillation is 99.3～100.7MHZ, be provided with before the frequency mixer 2 that promising its provides the drive level of best mixed frequency characteristic and for two input port between the isolated amplifier 8 of certain isolation is provided, isolated amplifier 8 is made up of common sending out-common-base circuit, sort circuit has the characteristic of unidirectional device, and the reverse transfer coefficient is zero, is very faint so its output signal feeds back to input.

Referring to Fig. 3, the frequency of oscillation of low noise field-effect transistor LC oscillator VCO2 is 33～47MHZ in second phase-locked loop circuit, little and the electric accent rate of low noise field effect transistor D ' and junction capacitance that is connected with in its circuit changes variable capacitance diode D1 ' greatly and the feedback capacity C3 ' with Positive and Negative Coefficient Temperature, the frequency of oscillation height of this oscillator VCO2, surge frequency range is big, have good load correlation and good temperature characterisitic and lower noise, and can reduce variation by the caused circuit parameter of variations in temperature, also have independently power supply power supply in addition, can improve the stability of oscillator.

Referring to Fig. 4, the programmable frequency divider 7 in second phase-locked loop circuit adopts and becomes the mould frequency splitting technology, and its circuit is mixed by ECL circuit U 18～U20 and TTL circuit U 13～U17 and forms.U1 adopts 74LS132 among the figure, U2 and U3 and U4 adopt 74LS74, U5SU6 adopts 74LS00, U7 adopts 74LS20, U8 to U12 adopts 74LS190, U18 and U20 adopt E12012, U19 adopts E12014, U13 to U17 adopts T4016, E12012 uses variable mould to preset the part of frequency division system in the digital phase-locked loop, it only is to connect a programmable counter in the back coupling way of loop with general loop dissimilarity, thereby the output frequency that can make voltage controlled oscillator VCO 2 is behind frequency division, is added to phase discriminator 4 again and compares with reference frequency.

Owing to adopted programmable counter, thereby made frequency dividing ratio variable, can change the output signal frequency of this synthesizer, and then reach the purpose that channel is selected.Speed general programmable frequency divider can not be competent at because the frequency of oscillator is higher, certainly will add in its front one fixedly frequency division give and putting, but will produce thereupon because of phase demodulation frequency press very low occurs increase the weight of low pass filter burden, make phase demodulation frequency and its harmonic wave be difficult to filtering and loop bandwidth decline, pull-in range is narrow, it is big to be difficult to the decay of locking and difference frequency, easy losing lock, making shortcomings such as oscillator internal noise increase, is that double modulus prescalar E12012 is controlled by the slower relatively TTL programmable counter T4016 of speed so adopt change mould frequency splitting technology.It can directly carry out pre-frequency division to high frequency, and its speed has determined the speed of frequency divider, and does not have any loss aspect resolution.

The periphery of programmable frequency divider 7 is connected with control circuit 9, making forward-backward counter is 1 or 200 increment change with per step on the plus-minus both direction, this is the variation of 100HZ with the increment corresponding to this synthesizer output frequency up or down, thereby has realized the control of two grades of step pitches; The outer two

ends

33000 and 47000 places that are trapped among the forward-backward counter count range of regulation of programmable frequency divider 7, be provided with automatic locking circuit 11, circuit produces and stops signal when forward-backward counter reaches 33000 and 47000, block forward-backward counter simultaneously, when forward-backward counter downwards and when adjusting upward inoperative, thereby guaranteed the operate as normal of synthesizer in this scope.In order to reduce the interference of outer bound pair circuit, except that adopting strict electromagnetic shielding measure, also two oscillator VCO1 and VCO2 are powered separately, reduce the phase mutual interference between the power supply, to guarantee the quality of output signal.The test result of present embodiment is: reference frequency output: 99.3～100.7MHZ, frequency stability is better than 1 * 10 ^-10/ 3, frequency adjustment: thick sync interval 20KHZ, thin sync interval 100HZ.

Claims

1. VHF Frequency Synthesizer, form by two phase-locked loop circuits, it is characterized in that, first phase-locked loop circuit is formed by frequency mixer (2), phase discriminator (3) and 1 connection of integrated voltage controlled oscillator VCO, and second phase-locked loop circuit is formed by phase discriminator (4), frequency divider (5,6), programmable frequency divider (7) and low noise field-effect transistor LC oscillator VCO2 connection; The local oscillation signal that crystal produces with reference to (1) in second phase-locked loop circuit behind frequency divider (6) frequency division as an input of phase discriminator (4), low noise field-effect transistor LC shake the output signal of device VCO2 behind frequency divider (5), programmable frequency divider (7) frequency division as another input of phase discriminator (4), the frequency of oscillation of its identified result control low noise field-effect transistor LC oscillator VCO2, the signal of finishing its control range is synthetic; In first phase-locked loop circuit, crystal with reference to (1) local oscillation signal and integrated voltage controlled oscillator VCO 1 output signal in frequency mixer (2) after the mixing, output signal with frequency divider (5) compares phase demodulation in phase discriminator (3) again, identified result is used for controlling the frequency of oscillation of integrated voltage controlled oscillator VCO 1, thereby finish the addition with crystal reference local oscillator signal, export final composite signal fo.

2. synthesizer according to claim 1, it is characterized in that, in second phase-locked loop circuit, the little and electric accent rate of low noise field effect transistor D ' and junction capacitance that is connected with among the low noise field-effect transistor LC oscillator VCO2 changes variable capacitance diode D1 ' greatly and the feedback capacity C3 ' with Positive and Negative Coefficient Temperature.

3. synthesizer according to claim 1, it is characterized in that, frequency mixer in first phase-locked loop circuit (2) adopts two balance simulation multipliers, be provided with before that promising its provides the drive level of best mixed frequency characteristic and for the isolated amplifier (8) of certain isolation is provided between (2) two input ports of frequency mixer at frequency mixer (2), isolated amplifier (8) by send out altogether-common-base circuit forms.

4. synthesizer according to claim 1, it is characterized in that, programmable frequency divider (7) adopts and becomes the mould frequency splitting technology, ((U13～U17) mixes and forms its circuit, and (U13～U17) controls the double modulus prescalar (U18, U20) in the ECL circuit to the slower relatively TTL programmable counter of its medium velocity for U18～U20) and TTL circuit by the ECL circuit.

5. according to claim 1 or 4 described synthesizers, it is characterized in that, in the described programmable frequency divider (7), forward-backward counter control is adopted in the selection of channel, simultaneously the periphery of programmable frequency divider (7) be connected with control circuit (9) make forward-backward counter on the plus-minus both direction by per step increment change, and be provided with automatic locking circuit (11) at the two ends of the forward-backward counter count range of regulation.