CN221227822U - Substrate structure for reducing layering - Google Patents
Substrate structure for reducing layering Download PDFInfo
- Publication number
- CN221227822U CN221227822U CN202322807492.2U CN202322807492U CN221227822U CN 221227822 U CN221227822 U CN 221227822U CN 202322807492 U CN202322807492 U CN 202322807492U CN 221227822 U CN221227822 U CN 221227822U
- Authority
- CN
- China
- Prior art keywords
- copper foil
- bonding pad
- foil bonding
- substrate layer
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000000758 substrate Substances 0.000 title claims abstract description 54
- 239000011889 copper foil Substances 0.000 claims abstract description 37
- 229910000679 solder Inorganic materials 0.000 claims abstract description 24
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052802 copper Inorganic materials 0.000 claims abstract description 5
- 239000010949 copper Substances 0.000 claims abstract description 5
- 239000011347 resin Substances 0.000 claims abstract description 4
- 229920005989 resin Polymers 0.000 claims abstract description 4
- 230000032798 delamination Effects 0.000 claims description 12
- 238000012938 design process Methods 0.000 abstract 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000016 photochemical curing Methods 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The utility model discloses a substrate structure for reducing layering, which belongs to the technical field of circuit board accessories, and particularly relates to a substrate structure for reducing layering, comprising a substrate layer, wherein the substrate layer is made of copper, a plurality of meshes are formed in the substrate layer, the meshes are square, the aperture is 200 multiplied by 200, the circuit board comprises a substrate layer, a copper foil bonding pad and a solder mask layer, the copper foil bonding pad is arranged on the upper surface of the substrate layer, the width of the copper foil bonding pad is smaller than that of the substrate layer, the thickness of the solder mask layer is larger than that of the copper foil bonding pad, the solder mask layer is light-cured resin, an opening is formed above the copper foil bonding pad, the width of the opening is smaller than that of the copper foil bonding pad, the difference between the width of the copper foil bonding pad and the width of the opening is smaller than 300um, the shape of the opening is square, and the shape of the copper foil bonding pad is also square. According to the utility model, 200 multiplied by 200 meshes are added to the area where the substrate layer is located in the substrate design process, and the added meshes can improve the combination of the substrate layer and the solder mask layer, so that layering is reduced.
Description
Technical Field
The utility model relates to the technical field of circuit board accessories, in particular to a substrate structure for reducing layering.
Background
The circuit principle of the circuit board is realized by means of a copper foil layer of the product, and the copper foil layer directly plays a role of a connecting bridge between components. In general, all circuit board products are covered with a solder mask layer on the surface of the copper foil layer, and only the area where the components need to be soldered is exposed. The solder mask refers to the part to be coated with green oil on the printed circuit board. In practice, the solder mask uses a negative output, so that after the shape of the solder mask is mapped onto the board, the green oil solder mask is not applied, but the copper sheet is exposed. The solder mask layer has insulation property, and is generally directly combined with the substrate layer, so that the poor combination property can cause abnormal layering of the solder mask layer and the substrate layer, and therefore, a substrate structure with reduced layering needs to be developed.
Disclosure of utility model
This section is intended to outline some aspects of embodiments of the utility model and to briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section as well as in the description of the utility model and in the title of the utility model, which may not be used to limit the scope of the utility model.
In order to solve the technical problems, according to one aspect of the present utility model, the following technical solutions are provided:
The utility model provides a reduce substrate structure of layering, its includes the substrate layer, the substrate layer adopts copper to make, offer a plurality of meshes on the substrate layer, the mesh is square and aperture is 200 x 200.
As a preferred embodiment of the substrate structure for reducing delamination according to the present utility model, wherein: the circuit board comprises a substrate layer, a copper foil bonding pad and a solder mask layer, wherein the copper foil bonding pad is arranged on the upper surface of the substrate layer, and the width of the copper foil bonding pad is smaller than that of the substrate layer.
As a preferred embodiment of the substrate structure for reducing delamination according to the present utility model, wherein: the thickness of the solder mask is larger than that of the copper foil bonding pad, and the solder mask is photo-curing resin.
As a preferred embodiment of the substrate structure for reducing delamination according to the present utility model, wherein: the solder mask layer is provided with the opening above the copper foil bonding pad, the width of the opening is smaller than that of the copper foil bonding pad, and the difference between the width of the copper foil bonding pad and the width of the opening is smaller than 300um.
As a preferred embodiment of the substrate structure for reducing delamination according to the present utility model, wherein: the shape of the opening is square, and the shape of the copper foil bonding pad is also square.
As a preferred embodiment of the substrate structure for reducing delamination according to the present utility model, wherein: the shape of the opening is circular, and the shape of the copper foil bonding pad is also circular.
Compared with the prior art, the utility model has the beneficial effects that: in the process of designing the substrate, 200 multiplied by 200 meshes are added to the area where the substrate layer is located, and the added meshes can improve the combination of the substrate layer and the solder mask layer and reduce layering.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the following detailed description of the embodiments of the present utility model will be given with reference to the accompanying drawings, which are to be understood as merely some embodiments of the present utility model, and from which other drawings can be obtained by those skilled in the art without inventive faculty. Wherein:
FIG. 1 is a schematic view of a circuit board of the present utility model;
Fig. 2 is a schematic perspective view of a substrate layer according to the present utility model.
Detailed Description
In order that the above objects, features and advantages of the utility model will be readily understood, a more particular description of the utility model will be rendered by reference to the appended drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present utility model, but the present utility model may be practiced in other ways other than those described herein, and persons skilled in the art will readily appreciate that the present utility model is not limited to the specific embodiments disclosed below.
Next, the present utility model will be described in detail with reference to the drawings, wherein the sectional view of the device structure is not partially enlarged to general scale for the convenience of description, and the drawings are only examples, which should not limit the scope of the present utility model. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
For the purpose of making the objects, technical solutions and advantages of the present utility model more apparent, embodiments of the present utility model will be described in further detail below with reference to the accompanying drawings.
Referring to fig. 1-2, a schematic structure diagram of an embodiment of a substrate structure for reducing delamination is shown, and referring to fig. 1-2, a detailed description of a substrate structure for reducing delamination is provided.
The substrate structure for reducing layering comprises a substrate layer 3, wherein the substrate layer 3 is made of copper, a plurality of meshes 5 are formed in the substrate layer 3, and the meshes 5 are square and have the aperture of 200×200.
The circuit board comprises a substrate layer 3, a copper foil bonding pad 2 and a solder mask layer 1, wherein the copper foil bonding pad 2 is arranged on the upper surface of the substrate layer 3, and the width of the copper foil bonding pad 2 is smaller than that of the substrate layer 3.
The thickness of the solder mask layer 1 is larger than that of the copper foil bonding pad 2, and the solder mask layer 1 is light-cured resin.
The solder mask layer 1 is provided with an opening 4 above the copper foil pad 2, the width of the opening 4 is smaller than the width of the copper foil pad 2, and the difference between the width of the copper foil pad 2 and the width of the opening 4 is smaller than 300um.
The shape of the opening 4 is square or circular, and the shape of the copper foil pad 2 is consistent with the shape of the opening 4.
Although the utility model has been described hereinabove with reference to embodiments, various modifications thereof may be made and equivalents may be substituted for elements thereof without departing from the scope of the utility model. In particular, the features of the disclosed embodiments may be combined with each other in any manner as long as there is no structural conflict, and the exhaustive description of these combinations is not given in this specification merely for the sake of omitting the descriptions and saving resources. Therefore, it is intended that the utility model not be limited to the particular embodiment disclosed, but that the utility model will include all embodiments falling within the scope of the appended claims.
Claims (6)
1. The substrate structure for reducing layering is characterized by comprising a substrate layer (3), wherein the substrate layer (3) is made of copper, a plurality of meshes (5) are formed in the substrate layer (3), and the meshes (5) are square and have the aperture of 200 multiplied by 200.
2. A reduced delamination substrate structure as defined in claim 1, wherein: the circuit board comprises a substrate layer (3), a copper foil bonding pad (2) and a solder mask layer (1), wherein the copper foil bonding pad (2) is arranged on the upper surface of the substrate layer (3), and the width of the copper foil bonding pad (2) is smaller than that of the substrate layer (3).
3. A reduced delamination substrate structure as defined in claim 2, wherein: the thickness of the solder mask layer (1) is larger than that of the copper foil bonding pad (2), and the solder mask layer (1) is light-cured resin.
4. A reduced delamination substrate structure as defined in claim 3, wherein: the solder mask layer (1) is provided with an opening (4) above the copper foil bonding pad (2), the width of the opening (4) is smaller than that of the copper foil bonding pad (2), and the difference between the width of the copper foil bonding pad (2) and the width of the opening (4) is smaller than 300um.
5. A reduced delamination substrate structure as defined in claim 4, wherein: the shape of the opening (4) is square, and the shape of the copper foil bonding pad (2) is also square.
6. A reduced delamination substrate structure as defined in claim 4, wherein: the opening (4) is circular in shape, and the copper foil pad (2) is also circular in shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322807492.2U CN221227822U (en) | 2023-10-19 | 2023-10-19 | Substrate structure for reducing layering |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322807492.2U CN221227822U (en) | 2023-10-19 | 2023-10-19 | Substrate structure for reducing layering |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN221227822U true CN221227822U (en) | 2024-06-25 |
Family
ID=91541293
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322807492.2U Active CN221227822U (en) | 2023-10-19 | 2023-10-19 | Substrate structure for reducing layering |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN221227822U (en) |
-
2023
- 2023-10-19 CN CN202322807492.2U patent/CN221227822U/en active Active
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| GR01 | Patent grant |