CN220934091U - Solar cell and photovoltaic module - Google Patents
Solar cell and photovoltaic module Download PDFInfo
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- CN220934091U CN220934091U CN202322433858.4U CN202322433858U CN220934091U CN 220934091 U CN220934091 U CN 220934091U CN 202322433858 U CN202322433858 U CN 202322433858U CN 220934091 U CN220934091 U CN 220934091U
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- 239000010703 silicon Substances 0.000 claims abstract description 65
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Abstract
The utility model discloses a solar cell and a photovoltaic module, wherein the solar cell comprises a silicon substrate; a first tunneling oxide layer positioned on one side of the silicon substrate; the first doped polysilicon layer is positioned on one side of the first tunneling oxide layer away from the silicon substrate; the second tunneling oxide layer is positioned on one side of the first doped polysilicon layer away from the silicon substrate; the second doped polysilicon layer is positioned on one side of the second tunneling oxide layer far away from the silicon substrate, and comprises a first part and a second part, and the thickness of the first part is larger than that of the second part in the direction perpendicular to the plane of the silicon substrate; the semiconductor device further comprises an electrode, one end of the electrode is in contact with the first doped polysilicon layer, and the other end of the electrode sequentially penetrates through the second tunneling oxide layer and the first part of the second doped polysilicon layer.
Description
Technical Field
The utility model relates to the technical field of photovoltaics, in particular to a solar cell and a photovoltaic module.
Background
At present, photovoltaic modules are greatly developed in China. TOPCon (Tunnel Oxide Passivating Contacts) cells are solar cells based on the selective carrier principle where the tunneling oxide layer passivates contacts. The back surface of the semiconductor device is generally in a structure of combining ultrathin tunneling silicon oxide and doped polysilicon films, so that a passivation contact effect is realized.
In the related art, in order to ensure the matching and passivation effects of the metallization paste, the thickness of the doped polysilicon film needs to be controlled to be more than 90nm, otherwise, the thin tunneling silicon oxide layer is broken down. However, the excessively thick doped polysilicon film can cause parasitic absorption of the back infrared band, thereby causing the problems of poor long-wave response, low double-sided rate and the like of the battery.
Accordingly, it is desirable to provide a solar cell and photovoltaic module that can prevent breakdown of the tunnel oxide layer and reduce parasitic absorption in the backside infrared band.
Disclosure of utility model
In view of this, the utility model provides a solar cell and a photovoltaic module, which can prevent the tunneling silicon oxide layer from being broken down, reduce the parasitic absorption of the back infrared band of the solar cell, improve the long-wave response of the cell and increase the double-sided rate.
In one aspect, the present utility model provides a solar cell comprising:
a silicon substrate;
a first tunneling oxide layer positioned on one side of the silicon substrate;
the first doped polysilicon layer is positioned on one side of the first tunneling oxide layer away from the silicon substrate;
The second tunneling oxide layer is positioned on one side of the first doped polysilicon layer away from the silicon substrate;
the second doped polysilicon layer is positioned on one side of the second tunneling oxide layer far away from the silicon substrate, and comprises a first part and a second part, and the thickness of the first part is larger than that of the second part in the direction perpendicular to the plane of the silicon substrate;
The semiconductor device further comprises an electrode, one end of the electrode is in contact with the first doped polysilicon layer, and the other end of the electrode sequentially penetrates through the second tunneling oxide layer and the first part of the second doped polysilicon layer.
Alternatively, the thickness of the first portion is a,30 nm.ltoreq.a.ltoreq.110 nm, and the thickness of the second portion is b,10 nm.ltoreq.b.ltoreq.80 nm in a direction perpendicular to the plane of the silicon substrate.
Optionally, the doping concentration of the first portion is greater than the doping concentration of the second portion.
Optionally, the doping concentration of the first portion is c1, 2.0x10 19cm-3≤c1≤2.0×1022cm-3, and the doping concentration of the second portion is c2, 2.0x10 18cm-3≤c2≤2.0×1021cm-3.
Optionally, the width of the first portion is m, and m is 20 μm and less than or equal to 100 μm in a direction from the first portion to the second portion.
Alternatively, the width of the electrode is d,15 μm.ltoreq.d.ltoreq.30 μm in the direction from the first portion toward the second portion.
Optionally, the thickness of the first tunneling oxide layer in a direction perpendicular to the plane of the silicon substrate is k, and k is more than or equal to 0.2nm and less than or equal to 2nm.
Optionally, the thickness of the first doped polysilicon layer in a direction perpendicular to the plane of the silicon substrate is n, where n is 10 nm.ltoreq.n.ltoreq.100 nm.
Optionally, the thickness of the second tunneling oxide layer in the direction perpendicular to the plane of the silicon substrate is h, and h is more than or equal to 0.2nm and less than or equal to 2nm.
On the other hand, the utility model also provides a photovoltaic module, which comprises the solar cell.
Compared with the prior art, the solar cell and the photovoltaic module provided by the utility model have the beneficial effects that at least the following are realized:
According to the utility model, the first tunneling oxide layer and the first doped polysilicon layer can form a tunneling effect, the second tunneling oxide layer and the second doped polysilicon layer can form an excellent barrier effect, and the arrangement of the second tunneling oxide layer and the second doped polysilicon layer can reduce the risk of breakdown during phosphorus expansion. In the direction perpendicular to the plane of the silicon substrate, the thickness of the first part is larger than that of the second part, namely, the thickness of the second part is reduced, and the parasitic absorption of infrared wave bands caused by doping phosphorus elements in the second doped polysilicon layer can be improved. In the utility model, one end of the electrode is contacted with the first doped polysilicon layer, and the other end of the electrode sequentially penetrates through the second tunneling oxide layer and the first part of the second doped polysilicon layer, and the thickness of the first part is larger than that of the second part, so that good ohmic contact between the first part and the metal slurry, namely good ohmic contact between the electrode and the first part, can be ensured in the metallization process.
Of course, it is not necessary for any one product embodying the utility model to achieve all of the technical effects described above at the same time.
Other features of the present utility model and its advantages will become apparent from the following detailed description of exemplary embodiments of the utility model, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description, serve to explain the principles of the utility model.
Fig. 1 is a schematic plan view of a solar cell according to the present utility model;
FIG. 2 is a cross-sectional view taken along the direction A-A' in FIG. 1;
fig. 3 is a schematic structural diagram of a photovoltaic module provided by the present utility model;
The solar cell comprises a 100-solar cell, a 1-silicon substrate, a 2-first tunneling oxide layer, a 3-first doped polysilicon layer, a 4-second tunneling oxide layer, a 5-second doped polysilicon layer, a 51-first part, a 52-second part, a 6-electrode, a 7-thin grid line, an 8-main grid line, an X-first direction, a Y-second direction, a 200-photovoltaic module, a 21-first encapsulation adhesive layer, a 22-first cover plate, a 23-second encapsulation adhesive layer and a 24-second cover plate.
Detailed Description
Various exemplary embodiments of the present utility model will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present utility model unless it is specifically stated otherwise.
The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the utility model, its application, or uses.
Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of exemplary embodiments may have different values.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.
Referring to fig. 1 and 2, fig. 1 is a schematic plan view of a solar cell according to the present utility model; FIG. 2 is a cross-sectional view taken along the direction A-A' in FIG. 1; the present embodiment provides a solar cell 100, including: a silicon substrate 1; a first tunneling oxide layer 2 located on one side of the silicon substrate 1; the first doped polysilicon layer 3 is positioned on one side of the first tunneling oxide layer 2 away from the silicon substrate 1; the second tunneling oxide layer 4 is positioned on one side of the first doped polysilicon layer 3 away from the silicon substrate 1; the second doped polysilicon layer 5 is positioned on one side of the second tunneling oxide layer 4 away from the silicon substrate 1, the second doped polysilicon layer 5 comprises a first part 51 and a second part 52, and the thickness of the first part 51 is larger than that of the second part 52 in the direction perpendicular to the plane of the silicon substrate 1; the semiconductor device further comprises an electrode 6, one end of the electrode 6 is in contact with the first doped polysilicon layer 3, and the other end of the electrode 6 sequentially penetrates through the second tunneling oxide layer 4 and the first part 51 of the second doped polysilicon layer 5.
It is understood that the silicon substrate 1 may be a single crystal silicon substrate, the silicon substrate 1 being an N-type silicon substrate, the N-type silicon substrate being electronically conductive. The N-type solar cell 100 may be TOPCon (Tunnel Oxide Passivated Contact tunnel oxide passivation contact) cell. It can be appreciated that the N-type solar cell 100 has a longer service life and higher efficiency.
Optionally, referring to fig. 1, the solar cell 100 includes a thin grid line 7 arranged along a second direction Y extending along the first direction X, and further includes a main grid line 8 arranged along the first direction X extending along the second direction Y, where an end portion of the main grid line 8 may have a harpoon structure, and of course, the thin grid line 7 is the electrode 6.
Referring to fig. 2, an entire layer of the first tunneling oxide layer 2 is disposed on the back surface of the silicon substrate 1, where the back surface is a direct plane of sunlight with respect to the front surface of the silicon substrate 1, the front surface of the silicon substrate 1 may be understood as a direct plane of sunlight, the entire layer of the first doped polysilicon layer 3 is disposed on a side of the first tunneling oxide layer 2 away from the silicon substrate 1, the entire layer of the second tunneling oxide layer 4 is disposed on a side of the first doped polysilicon layer 3 away from the silicon substrate 1, the entire layer of the second doped polysilicon layer 5 is disposed on a side of the second tunneling oxide layer 4 away from the silicon substrate 1, the second doped polysilicon layer 5 includes a first portion 51 and a second portion 52, the thickness of the first portion 51 is greater than the thickness of the second portion 52 in a direction perpendicular to the plane of the silicon substrate 1, the first portion 51 corresponds to the electrode 6, the second portion 52 does not overlap with the electrode 6 in a direction perpendicular to the plane of the silicon substrate 1, one end of the electrode 6 contacts the first doped polysilicon layer 3, and the other end of the electrode 6 sequentially penetrates the second doped polysilicon layer 4 and the second portion 51.
During manufacturing, a first tunneling oxide layer 2 of the whole layer is formed on the back surface of a silicon substrate 1, for example, the first tunneling oxide layer 2 can be prepared by a thermal oxidation method, then a first undoped polysilicon layer is formed on one side of the first tunneling oxide layer 2 far away from the silicon substrate 1, for example, a first undoped polysilicon layer can be formed by a low-pressure chemical vapor deposition method or a plasma enhanced chemical vapor deposition method, then a second tunneling oxide layer 4 is formed on one side of the first undoped polysilicon layer far away from the silicon substrate 1, for example, a second tunneling oxide layer 4 can be prepared by a thermal oxidation method, then a second undoped polysilicon layer is formed on one side of the second tunneling oxide layer 4 far away from the silicon substrate 1, phosphorus diffusion is performed on the second undoped polysilicon layer and the first undoped polysilicon layer, the doped elements are phosphorus, a first doped polysilicon layer 3 and a second doped polysilicon layer 5 are formed respectively, and a phosphorus glass layer (PSG, phosphorus SILICATE GLASS) is formed on the surface of the second doped polysilicon layer 5. Next, a mask is formed at a position corresponding to the first portion 51, the mask is used for shielding the first portion 51, the mask may be an acid-resistant resin, the phosphosilicate glass layer and the second doped polysilicon layer 5 are immersed in an acid solution, for example, a hydrofluoric acid solution, the phosphosilicate glass is removed by reaction with the acid, a part of the second doped polysilicon layer 5 uncovered by the mask is used for removing a part of the thin layer, which remains as the second portion 52, and then the mask and the phosphosilicate glass layer covered by the mask are cleaned by an alkaline solution, and the first portion 51 is exposed. The electrode 6 is prepared corresponding to the position of the first portion 51, and the electrode 6 may be formed by screen printing.
It can be understood that the related art has only one tunneling oxide layer and one doped polysilicon layer, if the thickness of the doped polysilicon layer is too small, the doped polysilicon layer is easy to break down when phosphorus expansion is performed, and if the thickness of the doped polysilicon layer is too large, the doped element phosphorus can cause parasitic absorption of infrared band.
In this embodiment, the first tunneling oxide layer 2 and the first doped polysilicon layer 3 can form a tunneling effect, the second tunneling oxide layer 4 and the second doped polysilicon layer 5 can form an excellent barrier effect, and the second tunneling oxide layer 4 and the second doped polysilicon layer 5 can reduce the risk of breakdown during phosphorus expansion. The thickness of the first portion 51 is larger than that of the second portion 52 in the direction perpendicular to the plane of the silicon substrate 1, i.e., the thickness of the second portion 52 is reduced, so that the parasitic absorption of the infrared band caused by the doping of the phosphorus element in the second doped polysilicon layer 5 can be improved. In the application, one end of the electrode 6 is contacted with the first doped polysilicon layer 3, and the other end of the electrode 6 sequentially penetrates through the second tunneling oxide layer 4 and the first part 51 of the second doped polysilicon layer 5, and as the thickness of the first part 51 is larger than that of the second part 52, good ohmic contact between the first part 51 and the metal slurry, namely good ohmic contact between the electrode 6 and the first part 51, can be ensured in the metallization process.
In some alternative embodiments, with continued reference to FIG. 2, the first portion 51 has a thickness a,30 nm.ltoreq.a.ltoreq.110 nm, and the second portion 52 has a thickness b,10 nm.ltoreq.b.ltoreq.80 nm in a direction perpendicular to the plane of the silicon substrate 1.
Alternatively, a may be 30nm, 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm, 100nm, 105nm, 110nm, or other values, which are not particularly limited herein. b may be 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, or other values, and is not particularly limited herein. Of course, when a is greater than b, e.g., a=40 nm, b may be 10nm, 15nm, 20nm, 25nm, 30nm, 35nm.
It will be appreciated that a may be any value between 30nm and 110nm, and b may be any value between 10nm and 80nm, as long as a is ensured to be greater than b, and of course, the smaller b is, the greater a is, the better the effect of ohmic contact between the electrode 6 and the first portion 51 is, the more parasitic absorption in the infrared band caused by doping phosphorus element in the second doped polysilicon layer 5 can be improved.
In some alternative embodiments, with continued reference to fig. 2, the doping concentration of the first portion 51 is greater than the doping concentration of the second portion 52.
It can be understood that, the electrode 6 is to penetrate the first portion 51 to contact the first doped polysilicon layer 3, the greater the doping concentration of the phosphorus element in the first portion 51, the more the carrier amount can be increased, the more the conversion efficiency of the solar cell 100 can be improved, in this embodiment, the doping concentration of the first portion 51 is greater than the doping concentration of the second portion 52, the doping concentration of the first portion 51 can ensure the carrier amount when the electrode 6 contacts the first portion 51, the conversion efficiency of the cell is improved, meanwhile, the doping concentration in the second portion 52 is small, since the second portion 52 is not used to contact the electrode 6, the parasitic absorption is caused by the phosphorus element doped in the second portion 52, and the parasitic absorption of the infrared band caused by the phosphorus element doped can be reduced due to the doping concentration in the second portion 52.
In some alternative embodiments, with continued reference to fig. 2, the doping concentration of the first portion 51 is c1,2.0×10 19cm-3≤c1≤2.0×1022cm-3 and the doping concentration of the second portion 52 is c2,2.0×10 18cm-3≤c2≤2.0×1021cm-3.
Alternatively, c1 may be 2.0×1019cm-3、3×1019cm-3、4×1019cm-3、5×1019cm-3、6×1019cm-3、7×1019cm-3、8×1019cm-3、9×1019cm-3、1×1020cm-3、2×1020cm-3、3×1020cm-3、4×1020cm-3、5×1020cm-3、6×1020cm-3、7×1020cm-3、8×1020cm-3、9×1020cm-3、1×1021cm-3、2×1021cm-3、3×1021cm-3、4×1021cm-3、5×1021cm-3、6×1021cm-3、7×1021cm-3、8×1021cm-3、9×1021cm-3、1×1022cm-3、2×1022cm-3, or other values, which are not specifically limited herein. c1 may be 2.0×1018cm-3、3×1018cm-3、4×1018cm-3、5×1018cm-3、6×1018cm-3、7×1018cm-3、8×1018cm-3、9×1018cm-3、1×1019cm-3、2×1019cm-3、3×1019cm-3、4×1019cm-3、5×1019cm-3、6×1019cm-3、7×1019cm-3、8×1019cm-3、9×1019cm-3、1×1020cm-3、2×1020cm-3、3×1020cm-3、4×1020cm-3、5×1020cm-3、6×1020cm-3、7×1020cm-3、8×1020cm-3、9×1020cm-3、1×1021cm-3、2×1021cm-3, or other values, and is not particularly limited herein. Of course, the doping concentration of the first portion 51 is greater than the doping concentration of the second portion 52, for example, c2=5×10 18cm-3 when c1=5×10 20cm-3.
The doping concentration of the first portion 51 is greater than that of the second portion 52, the doping concentration of the first portion 51 can ensure the carrier quantity when the electrode 6 is in contact with the first portion 51, the battery conversion efficiency is improved, meanwhile, the doping concentration of the second portion 52 is small, the second portion 52 is not used for being in contact with the electrode 6, the doping element phosphorus in the second portion 52 can cause parasitic absorption, the doping concentration of the second portion 52 is small, and infrared band parasitic absorption caused by the doping phosphorus element can be reduced.
In some alternative embodiments, with continued reference to FIG. 2, the width of the first portion 51 is m,20 μm.ltoreq.m.ltoreq.100 μm in the direction from the first portion 51 toward the second portion 52.
Alternatively, m may be any number between 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, 65 μm, 70 μm, 75 μm, 80 μm, 85 μm, 90 μm, 95 μm, 100 μm, of course m may be any number between 20 μm and 100 μm, and is not particularly limited herein.
It will be appreciated that the first portion 51 contacts the electrode 6, and the width of the electrode 6 is typically 30 μm or less, so that the width of the first portion 51 should not be too large, and if the width of the first portion 51 is too large, the space is wasted in the direction from the first portion 51 to the second portion 52, and of course, the larger the width of the first portion 51 is, the larger the parasitic absorption is; of course, the width of the first portion 51 cannot be too small, for example smaller than the width of the electrode 6, which is disadvantageous for forming a good ohmic contact with the electrode 6. In this embodiment, in the direction from the first portion 51 to the second portion 52, m is 20 μm or less and 100 μm or less, and the direction from the first portion 51 to the second portion 52 does not cause space waste, and parasitic absorption can be reduced as much as possible, and good ohmic contact between the first portion 51 and the electrode 6 is facilitated.
In some alternative embodiments, with continued reference to FIG. 2, the width of the electrode 6 is d,15 μm less than or equal to d less than or equal to 30 μm in a direction from the first portion 51 toward the second portion 52.
It will be appreciated that the cross-sectional pattern of the electrode 6 may be circular, oval, rectangular, triangular, etc., where the width refers to the maximum width of the electrode 6 in the direction from the first portion 51 to the second portion 52.
Alternatively, d may be 15 μm, 16 μm, 17 μm, 18 μm, 19 μm, 20 μm, 21 μm, 22 μm, 23 μm, 24 μm, 25 μm, 26 μm, 27 μm, 28 μm, 29 μm, 30 μm, although d may be any value between 15 μm and 30 μm.
It can be understood that the electrode 6 is a thin gate line 7, if the width of the electrode 6 is too large, the more light blocked by the electrode 6 is, the more solar cell efficiency is impaired, and if the width of the electrode 6 is too small, the contact area between the electrode 6 and the first doped polysilicon layer 3 and the second doped polysilicon layer 5 is too small, so that ohmic contact between the electrode 6 and the first doped polysilicon layer 3 and the ohmic contact between the electrode 6 and the second doped polysilicon layer 5 are reduced, in this embodiment, d is 15 μm or less and 30 μm, and the more light is not blocked, so that the solar cell efficiency is improved, and the ohmic contact between the electrode 6 and the first doped polysilicon layer 3 and the second doped polysilicon layer 5 is not reduced.
In some alternative embodiments, with continued reference to FIG. 2, the thickness of the first tunneling oxide layer 2 in a direction perpendicular to the plane of the silicon substrate 1 is k,0.2 nm.ltoreq.k.ltoreq.2 nm.
Alternatively, the first tunneling oxide layer 2 may be one of phosphorus-containing silicon oxide, silicon oxynitride, and silicon oxycarbide. The thickness k of the first tunnel oxide layer 2 may be 0.2nm, 0.5nm, 1nm, 1.5nm, 2nm, or any value between 0.2nm and 2nm in a direction perpendicular to the plane of the silicon substrate 1, which is not particularly limited herein.
The thickness of the first tunneling oxide layer 2 cannot be too large or too small, and the first tunneling oxide layer 2 is easy to break down, if the transition of the first tunneling oxide layer 2 is too small, carriers are not beneficial to moving on two sides of the first tunneling oxide layer 2 to form current, in the embodiment, k is not less than 0.2nm and not more than 2nm, breakdown is not caused, carriers are beneficial to moving on two sides of the first tunneling oxide layer 2 to form current, and solar energy efficiency is improved.
In some alternative embodiments, with continued reference to FIG. 2, the first doped polysilicon layer 3 has a thickness n in a direction perpendicular to the plane of the silicon substrate 1 of 10 nm.ltoreq.n.ltoreq.100 nm.
Alternatively, n may be 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm and 100nm, and of course n may be any number between 10nm and 100nm, without being particularly limited thereto.
It will be appreciated that the thickness n of the first doped polysilicon layer 3 in the direction perpendicular to the plane of the silicon substrate 1 cannot be too large or too small, and that when n is too large, the doped element phosphorus in the first doped polysilicon layer 3 will cause parasitic absorption, and if n is too small, it is easy to break down when phosphorus diffuses, in this embodiment, 10nm n is less than or equal to 100nm, which reduces the risk of breakdown when phosphorus diffuses, and reduces parasitic absorption.
In some alternative embodiments, with continued reference to FIG. 2, the second tunneling oxide layer 4 has a thickness h in a direction perpendicular to the plane of the silicon substrate 1 of 0.2 nm.ltoreq.h.ltoreq.2 nm.
Alternatively, the second tunneling oxide layer 4 may be one of phosphorus-containing silicon oxide, silicon oxynitride, and silicon oxycarbide, and the thickness h of the second tunneling oxide layer 4 in the direction perpendicular to the plane of the silicon substrate 1 is equal to the thickness k of the first tunneling oxide layer 2 in the direction perpendicular to the plane of the silicon substrate 1. The thickness h of the second tunnel oxide layer 4 may be 0.2nm, 0.5nm, 1nm, 1.5nm, 2nm, or any value between 0.2nm and 2nm in a direction perpendicular to the plane of the silicon substrate 1, which is not particularly limited.
The thickness of the second tunneling oxide layer 4 cannot be too large or too small, and the second tunneling oxide layer 4 is easy to break down, if the transition of the second tunneling oxide layer 4 is too small, carriers are not beneficial to moving on two sides of the second tunneling oxide layer to form current, in the embodiment, h is not less than 0.2nm and not more than 2nm, breakdown is not caused, carriers are beneficial to moving on two sides of the second tunneling oxide layer 4 to form current, and solar energy efficiency is improved.
Based on the same conception, the utility model also provides a photovoltaic module, which comprises the solar cell of any embodiment, and referring to fig. 3, fig. 3 is a schematic structural diagram of the photovoltaic module provided by the utility model, the photovoltaic module of the embodiment further comprises a first encapsulation adhesive layer positioned on the front surface of the solar cell, a first cover plate positioned on one side of the first encapsulation adhesive layer far away from the solar cell, a second encapsulation adhesive layer positioned on the back surface of the solar cell, and a second cover plate positioned on one side of the second encapsulation adhesive layer far away from the solar cell, wherein the front surface and the back surface are opposite, and it can be understood that the front surface is a direct sunlight surface and the back surface is a non-direct sunlight surface. In the utility model, a first encapsulation adhesive layer 21 and a second encapsulation adhesive layer 23 are respectively arranged on one side of the solar cell 100 close to the first cover plate 22 and the second cover plate 24, so as to encapsulate the solar cell 100. Alternatively, the first cover 22 may be glass, but may be made of other transparent materials, and the second cover 22 may be made of PET (polyethylene terephthalate) material, but may be made of glass, which is not limited herein. Of course, the number of solar cells 100 in the cell layer 3 in fig. 1 and 2 is only schematically illustrated, and is not used as the number of solar cells 100 in an actual product. Alternatively, the materials of the first encapsulation adhesive layer 21 and the second encapsulation adhesive layer 23 may be EVA (ethylene-vinyl acetate copolymer), POE (ethylene-octene copolymer), a co-extruded material of EVA and POE, and the like, which is not particularly limited herein. The photovoltaic module of this embodiment has the beneficial effects of the solar cell of any one of the above embodiments, and will not be described here again.
According to the embodiment, the solar cell and the photovoltaic module provided by the utility model have the following beneficial effects:
According to the utility model, the first tunneling oxide layer and the first doped polysilicon layer can form a tunneling effect, the second tunneling oxide layer and the second doped polysilicon layer can form an excellent barrier effect, and the arrangement of the second tunneling oxide layer and the second doped polysilicon layer can reduce the risk of breakdown during phosphorus expansion. In the direction perpendicular to the plane of the silicon substrate, the thickness of the first part is larger than that of the second part, namely, the thickness of the second part is reduced, and the parasitic absorption of infrared wave bands caused by doping phosphorus elements in the second doped polysilicon layer can be improved. In the utility model, one end of the electrode is contacted with the first doped polysilicon layer, and the other end of the electrode sequentially penetrates through the second tunneling oxide layer and the first part of the second doped polysilicon layer, and the thickness of the first part is larger than that of the second part, so that good ohmic contact between the first part and the metal slurry, namely good ohmic contact between the electrode and the first part, can be ensured in the metallization process.
While certain specific embodiments of the utility model have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the utility model. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the utility model. The scope of the utility model is defined by the appended claims.
Claims (8)
1. A solar cell, comprising:
a silicon substrate;
The first tunneling oxide layer is positioned on one side of the silicon substrate;
the first doped polysilicon layer is positioned on one side of the first tunneling oxide layer away from the silicon substrate;
The second tunneling oxide layer is positioned on one side of the first doped polycrystalline silicon layer away from the silicon substrate;
the second doped polysilicon layer is positioned on one side of the second tunneling oxide layer away from the silicon substrate, and comprises a first part and a second part, wherein the thickness of the first part is larger than that of the second part in the direction perpendicular to the plane of the silicon substrate;
The semiconductor device further comprises an electrode, one end of the electrode is in contact with the first doped polysilicon layer, and the other end of the electrode sequentially penetrates through the second tunneling oxide layer and the first part of the second doped polysilicon layer.
2. The solar cell according to claim 1, wherein the thickness of the first portion is a,30 nm.ltoreq.a.ltoreq.110 nm, and the thickness of the second portion is b,10 nm.ltoreq.b.ltoreq.80 nm in a direction perpendicular to the plane of the silicon substrate.
3. The solar cell according to claim 1, wherein the width of the first portion is m,20 μm and m and 100 μm in a direction from the first portion to the second portion.
4. The solar cell according to claim 1, wherein the width of the electrode is d,15 μm and d.ltoreq.30 μm in a direction from the first portion to the second portion.
5. The solar cell according to claim 1, wherein the thickness of the first tunneling oxide layer in a direction perpendicular to the plane of the silicon substrate is k, and k is 0.2 nm.ltoreq.k.ltoreq.2 nm.
6. The solar cell according to claim 1, wherein the thickness of the first doped polysilicon layer in a direction perpendicular to the plane of the silicon substrate is n,10 nm.ltoreq.n.ltoreq.100 nm.
7. The solar cell according to claim 1, wherein the thickness of the second tunneling oxide layer in a direction perpendicular to the plane of the silicon substrate is h, and h is 0.2 nm.ltoreq.h.ltoreq.2 nm.
8. A photovoltaic module comprising the solar cell sheet of any one of claims 1 to 7.
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| CN202322433858.4U CN220934091U (en) | 2023-09-07 | 2023-09-07 | Solar cell and photovoltaic module |
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| CN202322433858.4U CN220934091U (en) | 2023-09-07 | 2023-09-07 | Solar cell and photovoltaic module |
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