CN220934057U

CN220934057U - Packaging structure

Info

Publication number: CN220934057U
Application number: CN202322597067.5U
Authority: CN
Inventors: 刘景宽; 冯泽勇
Original assignee: Liding Semiconductor Technology Qinhuangdao Co ltd; Liding Semiconductor Technology Shenzhen Co ltd
Current assignee: Liding Semiconductor Technology Qinhuangdao Co ltd; Liding Semiconductor Technology Shenzhen Co ltd
Priority date: 2023-09-22
Filing date: 2023-09-22
Publication date: 2024-05-10
Anticipated expiration: 2033-09-22

Abstract

A packaging structure comprises a motherboard, a carrier plate, a heating element, a low heat resistance element and a heat dissipation element. The motherboard has an extension direction, along which the motherboard is divided into a first portion and a second portion. The carrier plate is arranged on the motherboard, a third part and a fourth part connected with the third part are divided along the extending direction, the third part corresponds to the first part, the second part corresponds to the fourth part, the third part is provided with a first slot, and the fourth part is provided with a second slot. The heating element is arranged in the first slot, and the first heating element is connected with the third part. The low heat-resistant element is arranged in the second slot and connected with the fourth part, so that the heating element and the low heat-resistant element are arranged in a staggered manner in the extending direction. The heat dissipation piece is arranged on one side of the heating piece, which is away from the bottom of the first slot, so that heat generated by the heating piece is conducted to the heat dissipation piece. The packaging mechanism provided by the application realizes effective isolation of the heating element and the low heat-resistant element, and simultaneously realizes the compactness of the structure.

Description

Packaging structure

Technical Field

The application belongs to the field of circuit board manufacturing, and particularly relates to a packaging structure.

Background

Smart phones are an integral part of modern life and include a variety of major electronic components therein, such as integrated circuit chips (IC chips), dynamic Random Access Memories (DRAMs), integrated circuit carriers (IC-substrates), and motherboards (Mother Board). Wherein the IC chip is a control center system and a main heat generating source of the smart phone.

With the continuous development of smart phones, particularly the rise of 5G smart phones, the running power of the smart phones is continuously improved, and the internal memory and the functions are gradually expanded, so that the heat output is rapidly increased. Meanwhile, smartphones tend to be light, thin and small, resulting in limited space and limited heat dissipation efficiency. This can lead to a series of problems such as unstable signals, reduced battery endurance, damaged components, etc.

The IC chip is a main heat generating source, so it is urgent to solve or improve the heat dissipation problem of the smart phone IC chip. Currently, the industry needs more efficient heat dissipation techniques and thermal management methods to ensure the performance and reliability of smartphones.

Disclosure of utility model

In order to solve the above defects in the prior art, the application provides a packaging structure.

A packaging structure comprises a motherboard, a carrier plate, a heating element, a low heat resistance element and a heat dissipation element. The motherboard has an extension direction along which the motherboard is divided into a first portion and a second portion. The carrier plate set up in the motherboard, along the extending direction, the carrier plate divide into third part and connection the fourth part of third part, the third part corresponds the first part, the second part corresponds the fourth part, the third part is provided with first fluting, the fourth part is provided with the second fluting. The heating piece is arranged in the first groove, and is connected with the third part. The low heat-resistant element is arranged in the second groove, and the low heat-resistant element is connected to the fourth part, so that the heating element and the low heat-resistant element are arranged in a staggered manner in the extending direction. The heat dissipation piece is arranged on one side of the heat generation piece, which is away from the bottom of the first slot, so that heat generated by the heat generation piece is conducted to the heat dissipation piece.

In some possible embodiments, the carrier includes a first substrate, a second substrate, and an adhesive layer disposed between the first substrate and the second substrate, a portion of the second substrate and a portion of the adhesive layer are penetrated to form the first slot, the heat generating element is connected to the first substrate, along the extending direction, the second substrate protrudes out of an end surface of the adhesive layer and an end surface of the first substrate to form the second slot, and the low heat resistance element is connected to the second substrate.

In some possible embodiments, the second substrate is a flexible board, the second substrate is recessed toward the motherboard such that an opening direction of the second slot faces away from the motherboard, and the low heat resistance element is connected to a side of the second substrate facing away from the motherboard.

In some possible embodiments, the second substrate is a flexible board, and the second substrate protrudes away from the motherboard such that an opening direction of the second slot faces the motherboard, and the low heat resistance element is connected to a side of the second substrate facing the motherboard.

In some possible embodiments, the carrier further includes a plurality of conductive bodies, where the conductive bodies are disposed on the adhesive layer, and one end of each conductive body is connected to the first substrate, and the other end of each conductive body is connected to the second substrate.

In some possible embodiments, the heat dissipation element includes a plurality of i-shaped heat conduction elements connected side by side, one end of each of the plurality of i-shaped heat conduction elements is connected to the heat generating element, and the other end of each of the plurality of i-shaped heat conduction elements is exposed from the second substrate.

In some possible embodiments, the heat dissipation member includes a base and a plurality of heat dissipation fins disposed at intervals on one side of the base, the other side of the base is connected to the heat generation member, and the plurality of heat dissipation fins are exposed from the second substrate.

In some possible embodiments, a plurality of ball grid array solder balls are disposed between the motherboard and the carrier, the ball grid array solder balls connecting the motherboard and the carrier.

In some possible embodiments, the heat generating component is a chip.

In some possible embodiments, the low heat resistance element is a dynamic random access memory.

Compared with the prior art, the packaging structure provided by the application can greatly reduce the thermal influence of the heating element on the low heat-resistant element by arranging the heating element and the low heat-resistant element in a staggered manner on the plane layout. Specifically, the chip with large heating value is arranged in the first slot, the temperature sensitive memory is arranged in the second slot opposite to the first slot, the chip and the memory are not overlapped in the horizontal direction, heat cannot be directly conducted, heat emitted by the chip is gathered in the first slot area and cannot be excessively transferred to the second slot, and therefore the low heat-resistant element is protected from being influenced by overheat. The layout mode not only fully utilizes plane space resources, but also realizes effective heat insulation without increasing the area of the packaging structure.

Drawings

Fig. 1 is a schematic cross-sectional view of a package structure according to a first embodiment of the present application.

Fig. 2 is a schematic cross-sectional view of a package structure according to a second embodiment of the present application.

Description of the main reference signs

Packaging structure 100, 200

Motherboard 10

First portion 11

Second portion 12

Carrier plate 20

Third portion 21

First slot 211

Fourth part 22

Second slot 221

First substrate 23

Second substrate 24

Adhesive layer 25

First conductive body 26

First insulating pad 27

Second insulating pad 28

Second conductive body 29

Heating element 30

Low heat resistant element 40

Radiator 50

I-shaped heat conductor 51

First end 511

Second end 512

Connection portion 513

Base 52

Radiating fin 53

Thermally conductive layer 54

Direction of extension A

Thickness direction B

The application will be further described in the following detailed description in conjunction with the above-described figures.

Detailed Description

The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments.

Referring to fig. 1, a first embodiment of the present application provides a package structure 100, wherein the package structure 100 includes a motherboard 10, a carrier 20, a heat generating component 30, a low heat resistance component 40, and a heat sink 50. The carrier plate 20 is stacked on the motherboard 10, the heat-generating component 30 is embedded in the carrier plate 20, the heat-dissipating component 50 is disposed on the heat-generating component 30, the low heat-resistant element 40 is disposed between the carrier plate 20 and the motherboard 10, and the low heat-resistant element 40 and the heat-dissipating component 50 or the heat-generating component 30 are disposed in a staggered manner.

The motherboard 10 has an extension direction a and a thickness direction B perpendicular to the extension direction a. Along the extension direction a, the motherboard 10 is divided into a first portion 11 and a second portion 12. The carrier plate 20 is divided into a third portion 21 and a fourth portion 22. Along the thickness direction B, the first portion 11 is disposed corresponding to the third portion 21, and the second portion 12 is disposed corresponding to the fourth portion 22.

The third portion 21 is provided with a first slot 211 and the fourth portion 22 is provided with a second slot 221. The heat generating element 30 is disposed in the first slot 211 and electrically connected to the carrier 20, and the heat dissipating element 50 is disposed on the heat generating element 30 and exposed on the carrier 20. The low heat resistance element 40 is disposed in the second slot 221 and electrically connected to the carrier 20. In this way, the heat generating member 30 and the low heat resistant element 40 are disposed offset in the extending direction a, thereby facilitating reduction of the influence of the heat generating member 30 on the low heat resistant element 40, while also facilitating reduction of the size of the package structure 100 in the thickness direction B. Furthermore, the heat dissipation element 50 dissipates heat from the heat generating element 30, so as to improve the overall heat dissipation efficiency of the package structure 100.

In this embodiment, the heat generating component 30 is a chip, and the low heat resistance component 40 is a dynamic random access memory (Dynamic Random Access Memory, DRAM). It will be appreciated that in other embodiments of the present application, the heat generating element 30 may be a heat generating element such as a light emitting diode, a heating wire, an electrothermal film, etc., and the low heat resistant element 40 may be a temperature sensitive electronic element such as a photodiode, an operational amplifier, a capacitor, an inductance, etc.

In this embodiment, the motherboard 10 is a hard circuit board, and the carrier 20 is an integrated circuit carrier (IC-substrate). The package structure 100 further includes a plurality of first conductive bodies 26, where the plurality of first conductive bodies 26 are disposed between the motherboard 10 and the carrier 20 to electrically connect the motherboard 10 and the carrier 20. Wherein, the first vias 26 are ball grid array solder balls.

In the present embodiment, the carrier 20 includes a first substrate 23, a second substrate 24, and an adhesive layer 25 disposed between the first substrate 23 and the second substrate 24 along the thickness direction B. The first slot 211 penetrates the second substrate 24 and the adhesive layer 25. One side of the heat generating element 30 is electrically connected to the first substrate 23. In the extending direction a, the second substrate 24 extends from one end of the adhesive layer 25, and in the thickness direction B, the second substrate 24 protrudes from the adhesive layer 25 and the first substrate 23, thereby forming the second groove 221. The low heat resistance element 40 is connected to the second substrate 24.

In the present embodiment, the portion of the second substrate 24 protruding from the first substrate 23 protrudes outward away from the motherboard 10 to form the second slot 221, so that the opening direction of the second slot 221 faces the motherboard 10. The low heat resistance element 40 is attached to the side of the second substrate 24 facing the motherboard 10.

In this embodiment, the package structure 100 further includes a plurality of first insulating pads 27, the plurality of first insulating pads 27 are disposed between the second portion 12 of the motherboard 10 and the low heat resistance element 40, and the plurality of first insulating pads 27 are used for supporting the low heat resistance element 40.

In this embodiment, the carrier 20 further includes a plurality of second conductive bodies 29. The plurality of second conductors 29 are provided in the adhesive layer 25. One end of the second conductive body 29 is exposed out of one side of the adhesive layer 25 and is electrically connected to the first substrate 23, and the other end of the second conductive body 29 is exposed out of the other side of the adhesive layer 25 and is electrically connected to the second substrate 24. The second conductive bodies 29 are used to electrically connect the first substrate 23 and the second substrate 24. Wherein the second conductive body 29 is a land grid array solder ball.

In this embodiment, the heat dissipation element 50 includes a plurality of i-shaped heat conductors 51, and the plurality of i-shaped heat conductors 51 are arranged side by side along the extending direction a. One end of the i-shaped heat conductors 51 is connected to the heat generating element 30, and the other end is exposed from the second substrate 24. The plurality of i-shaped heat conductors 51 are used for rapidly conducting the heat generated by the heat generating element 30 to the external environment substantially along the thickness direction B, thereby reducing the heating effect caused by the accumulation of heat near the heat generating element 30. Specifically, the i-shaped heat conductor 51 has a cross-sectional shape that is substantially "i" shaped, and the i-shaped heat conductor 51 includes a first end 511, a second end 512, and a connection portion 513. The cross-sectional width of the first end 511 and the cross-sectional width of the second end 512 are both greater than the cross-sectional width of the connecting portion 513. The connection portion 513 is substantially disposed along the thickness direction B, and the first end 511 and the second end 512 are connected to opposite end portions of the connection portion 513, respectively. The first end 511 is exposed outside the second substrate 24, and the second end 512 is connected to the heat generating component 30. The first slot 211 is filled with a glue (not shown), and the glue is used for fixing the plurality of i-shaped heat conductors 51 in the first slot 211. The i-shaped heat conductor 51 is made of metal and nonmetallic heat conductors. Wherein the metal comprises copper, aluminum, silver, etc., and the nonmetal comprises graphite, silicon carbide, etc. The heat dissipation element 50 further enhances the thermal management effect, and rapidly conducts the heat generated by the heat generation element 30 out of the carrier plate 20, thereby reducing the heat load of the heat generation element 30 itself and reducing the heat radiation to surrounding elements (for example, the low heat resistance element 40) from the side.

Referring to fig. 2, in a second embodiment of the present application, a package structure 200 is provided, which is different from the first embodiment in that a portion of the second substrate 24 extending from one end of the first substrate 23 along the extending direction a is recessed toward the motherboard 10 to form the second slot 221. The opening direction of the second slot 221 faces away from the motherboard 10. The low heat resistance element 40 is attached to the side of the second substrate 24 facing away from the motherboard 10.

In this embodiment, the package structure 200 further includes a plurality of second insulating pads 28, where the plurality of second insulating pads 28 are disposed between the second portion 12 of the motherboard 10 and the fourth portion 22 of the carrier 20, and the plurality of second insulating pads 28 are used to support the second substrate 24.

In this embodiment, the heat sink 50 includes a heat conductive layer 54, a base 52, and a plurality of heat dissipating fins 53 disposed at intervals on one side of the base 52. One side of the base 52 facing away from the plurality of heat dissipation fins 53 is connected to the heat generating element 30 through the heat conduction layer 54. That is, the heat conductive layer 54 is provided between the base 52 and the heat generating member 30. The heat dissipation fin 53 has the advantages of small thermal resistance, large heat dissipation area, and fast heat conduction. The heat conducting layer 54 is a heat conducting silica gel layer, and the heat conducting layer 54 is used for improving heat conducting efficiency.

In summary, the package structure (100, 200) provided by the present application can greatly reduce the thermal influence of the heat generating element 30 on the low heat resistant element 40 by staggering the heat generating element 30 and the low heat resistant element 40 in the planar layout. Specifically, a chip with large heat generation is disposed in the first slot 211, a temperature sensitive memory is disposed in the second slot 221 opposite thereto, the two are not overlapped in the vertical direction, heat cannot be directly conducted, and heat emitted from the chip is collected in the area of the first slot 211 and cannot be excessively transferred to the second slot 221, thereby protecting the low heat resistance element 40 from overheat. The layout not only fully utilizes planar space resources, but also achieves effective heat insulation without increasing the area of the packaging structures (100, 200).

The above description is only one preferred embodiment of the present application, but is not limited to this embodiment during actual application. Other modifications and variations to the present application will be apparent to those of ordinary skill in the art in light of the present teachings.

Claims

1. A package structure, comprising:

A motherboard having an extension direction along which the motherboard is divided into a first portion and a second portion;

the carrier plate is arranged on the motherboard, a third part and a fourth part connected with the third part are divided along the extending direction, the third part corresponds to the first part, the second part corresponds to the fourth part, the third part is provided with a first slot, and the fourth part is provided with a second slot;

the heating piece is arranged in the first groove and is connected to the third part;

The low heat-resistant element is arranged in the second groove and connected with the fourth part, so that the heating element and the low heat-resistant element are arranged in a staggered manner in the extending direction;

the heat dissipation piece is arranged on one side of the heat generation piece, which is away from the bottom of the first slot, so that heat generated by the heat generation piece is conducted to the heat dissipation piece.

2. The package structure of claim 1, wherein the carrier comprises a first substrate, a second substrate, and an adhesive layer disposed between the first substrate and the second substrate along the extending direction, a portion of the second substrate and a portion of the adhesive layer are penetrated to form the first slot, the heat generating element is connected to the first substrate, and the second substrate protrudes beyond an end surface of the adhesive layer and an end surface of the first substrate along the extending direction to form the second slot, and the low heat resistant element is connected to the second substrate.

3. The package structure of claim 2, wherein the second substrate is a flexible board, the second substrate is recessed toward the motherboard such that an opening direction of the second slot is away from the motherboard, and the low heat resistance element is connected to a side of the second substrate away from the motherboard.

4. The package structure of claim 2, wherein the second substrate is a flexible board, the second substrate protrudes away from the motherboard such that an opening direction of the second slot faces the motherboard, and the low heat resistance element is connected to a side of the second substrate facing the motherboard.

5. The package structure of claim 2, wherein the carrier further comprises a plurality of conductive bodies, the conductive bodies are disposed on the adhesive layer, one ends of the conductive bodies are connected to the first substrate, and the other ends of the conductive bodies are connected to the second substrate.

6. The package structure of claim 2, wherein the heat dissipation member comprises a plurality of i-shaped heat conductive members connected side by side, one end of each of the plurality of i-shaped heat conductive members is connected to the heat generating member, and the other end of each of the plurality of i-shaped heat conductive members is exposed from the second substrate.

7. The package structure of claim 2, wherein the heat sink comprises a base and a plurality of heat sink fins arranged at intervals on one side of the base, the other side of the base is connected with the heat generating element, and the plurality of heat sink fins are exposed from the second substrate.

8. The package structure of claim 1, wherein a plurality of ball grid array solder balls are disposed between the motherboard and the carrier, the ball grid array solder balls connecting the motherboard and the carrier.

9. The package structure of claim 1, wherein the heat generating component is a chip.

10. The package structure of claim 1, wherein the low heat resistance element is a dynamic random access memory.