CN220208947U - MOS chip packaging structure capable of avoiding pin deformation - Google Patents
MOS chip packaging structure capable of avoiding pin deformation Download PDFInfo
- Publication number
- CN220208947U CN220208947U CN202321783057.4U CN202321783057U CN220208947U CN 220208947 U CN220208947 U CN 220208947U CN 202321783057 U CN202321783057 U CN 202321783057U CN 220208947 U CN220208947 U CN 220208947U
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- CN
- China
- Prior art keywords
- mos chip
- substrate
- positioning seat
- pin
- packaging
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 230000017525 heat dissipation Effects 0.000 claims abstract description 10
- 230000000149 penetrating effect Effects 0.000 claims abstract description 4
- 239000004033 plastic Substances 0.000 claims description 5
- 229920003023 plastic Polymers 0.000 claims description 5
- 238000001746 injection moulding Methods 0.000 abstract description 12
- 230000000694 effects Effects 0.000 abstract description 7
- 239000011159 matrix material Substances 0.000 abstract description 4
- 238000009423 ventilation Methods 0.000 abstract description 4
- 238000005538 encapsulation Methods 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Abstract
The utility model discloses a MOS chip packaging structure for avoiding pin deformation, which comprises: the MOS chip is arranged on the front face of the substrate and located in the packaging substrate, the positioning seat is arranged in the packaging substrate and located below the substrate, the drain electrode pins extending downwards to the lower portion of the packaging substrate and penetrating through the positioning seat are arranged at the bottom of the substrate, the source electrode pins are arranged on the source electrode of the MOS chip and penetrate through the positioning seat downwards, the gate electrode pins are arranged on the gate electrode of the MOS chip and penetrate through the positioning seat downwards, and positioning holes are formed in the positioning seat. The MOS chip packaging structure for avoiding pin deformation improves the stability of the source electrode pin, the grid electrode pin and the drain electrode pin in the packaging matrix injection molding process, reduces the deformation problem and has good ventilation and heat dissipation effects.
Description
Technical Field
The utility model relates to the field of MOS chip packaging, in particular to a MOS chip packaging structure capable of avoiding pin deformation.
Background
Before packaging the MOS chip, the MOS chip needs to be connected with the pins, and then the MOS chip and the pins are placed into a die together for injection molding of a packaging matrix.
The length of the pin is larger, but the section is small, the strength is low, and in the injection molding process, the pin is easy to deform or incline under the impact action of the injection molding material, so that the qualification rate of the package is reduced. The patent application with the application number of 202310312806.3 discloses a MOS chip packaging structure and a packaging method thereof, wherein pins are connected through connecting ribs before injection molding, stability during injection molding is improved, the connecting ribs are cut off after injection molding, but limiting strength of the connecting ribs to the pins is limited, the process of cutting off after injection molding is added, and heat dissipation effect is not enhanced and needs to be improved.
Disclosure of Invention
The utility model aims to provide a MOS chip packaging structure capable of avoiding deformation of pins, avoiding deformation of pins during packaging injection molding and improving heat dissipation effect.
To achieve the purpose, the utility model adopts the following technical scheme:
a MOS chip package structure that avoids pin deformation, comprising: the MOS chip is arranged on the front face of the substrate and located in the packaging substrate, the positioning seat is arranged in the packaging substrate and located below the substrate, the drain electrode pins extending downwards to the lower portion of the packaging substrate and penetrating through the positioning seat are arranged at the bottom of the substrate, the source electrode pins are arranged on the source electrode of the MOS chip and penetrate through the positioning seat downwards, the gate electrode pins are arranged on the gate electrode of the MOS chip and penetrate through the positioning seat downwards, and positioning holes are formed in the positioning seat.
Wherein, the packaging matrix adopts an insulating plastic packaging matrix.
Wherein, the locating hole is provided with a heat dissipation sleeve.
The thickness of the positioning seat is the same as that of the packaging substrate.
Wherein, be provided with the first slot that corresponds with drain electrode pin in the positioning seat.
The positioning seat is provided with a second slot corresponding to the source pin and a third slot corresponding to the gate pin.
The utility model has the beneficial effects that: the utility model provides a avoid MOS chip packaging structure that pin warp, the locating seat cooperates with the locating pin in the encapsulation base member injection mold through the locating hole, carries out the location of locating seat to realize the support and the location to source electrode pin, grid pin and drain electrode pin through the locating seat, promoted the stability of encapsulation base member in-process source electrode pin, grid pin and drain electrode pin of moulding plastics, reduced the deformation problem, after the die sinking takes out the encapsulation base member, can be through the effect of locating hole reinforcing ventilation heat dissipation, obtain two ends.
Drawings
FIG. 1 is a schematic diagram of the structure of the present utility model;
fig. 2 is a bottom view of the positioning socket of fig. 1.
Detailed Description
The technical solution of the present utility model will be further described with reference to fig. 1 to 2 by means of specific embodiments.
The MOS chip packaging structure for avoiding pin deformation shown in FIG. 1 comprises: the MOS chip 3 is arranged on the front surface of the substrate 2 and is positioned in the packaging substrate 1, and heat dissipation is performed through the packaging substrate 1. In this embodiment, the packaging substrate 1 is an insulating plastic packaging substrate, so that the insulation protection effect on the MOS chip 3 is good, and the packaging substrate is waterproof and moistureproof, and is convenient to produce by injection molding.
The positioning seat 6 is disposed in the package base 1 and located below the substrate 2, in this embodiment, the positioning seat 6 is provided with a positioning hole 5, and the positioning of the positioning seat is performed by matching the positioning hole 5 with a positioning pin in the package base injection mold.
In this embodiment, the thickness of the positioning seat 6 is the same as the thickness of the package substrate 1, so that the positioning hole 5 becomes a through hole. After injection molding, the packaging substrate 1 is taken out after die opening, and the ventilation and heat dissipation effects can be enhanced through the positioning holes 5, so that two purposes are achieved. In addition, be provided with the heat dissipation cover 4 in the locating hole 5, heat dissipation cover 4 can adopt copper sheathing or aluminum alloy cover, further promotes the radiating effect when ventilation.
The bottom of the substrate 2 is provided with a drain pin 8 extending downward below the package substrate 1 and penetrating through the positioning seat 6, in this embodiment, as shown in fig. 2, the positioning seat 6 is provided with a first slot 11 corresponding to the drain pin 8, so as to position and support the drain pin 8, thereby avoiding the problem of deformation of the drain pin 8 when the package substrate 1 is injection molded.
The source pins 7 are disposed on the source of the MOS chip 3 and penetrate downward through the positioning seat 6, and in this embodiment, the positioning seat 6 is provided with second slots 12 corresponding to the source pins 7, so as to position and support the source pins 7.
As shown in fig. 1, the gate pin 9 is disposed on the gate of the MOS chip 3 and penetrates the positioning seat 6 downward, and a third slot 10 corresponding to the gate pin is disposed in the positioning seat 6, so as to position and support the gate pin 9, thereby improving structural stability. As shown in fig. 2, the first slot 11 is located below the second slot 12 and the third slot 10, and positions the drain electrode pin 8, the source electrode pin 7 and the gate electrode pin 9 respectively, so as to resist the impact force of injection molding of the package substrate 1, and the positioning seat 6 is made of insulating plastic, so that disassembly or cutting is not required, and the production efficiency is improved.
The foregoing is merely exemplary of the present utility model, and those skilled in the art should not be considered as limiting the utility model, since modifications may be made in the specific embodiments and application scope of the utility model in light of the teachings of the present utility model.
Claims (6)
1. A MOS chip package structure for avoiding deformation of pins, comprising: the MOS chip is arranged on the front face of the substrate and located in the packaging substrate, the positioning seat is arranged in the packaging substrate and located below the substrate, the drain electrode pins extending downwards to the lower portion of the packaging substrate and penetrating through the positioning seat are arranged at the bottom of the substrate, the source electrode pins are arranged on the source electrode of the MOS chip and penetrate through the positioning seat downwards, the gate electrode pins are arranged on the gate electrode of the MOS chip and penetrate through the positioning seat downwards, and positioning holes are formed in the positioning seat.
2. The MOS chip package structure of claim 1, wherein the package substrate is an insulating plastic package substrate.
3. The MOS chip packaging structure for avoiding pin deformation according to claim 1, wherein a heat dissipation sleeve is disposed in the positioning hole.
4. The MOS chip package structure of claim 1, wherein the thickness of the positioning seat is the same as the thickness of the package substrate.
5. The MOS chip package structure of claim 1, wherein the positioning base is provided with a first slot corresponding to the drain pin.
6. The MOS chip package structure of claim 1, wherein the positioning base is provided with a second slot corresponding to the source pin and a third slot corresponding to the gate pin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202321783057.4U CN220208947U (en) | 2023-07-08 | 2023-07-08 | MOS chip packaging structure capable of avoiding pin deformation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202321783057.4U CN220208947U (en) | 2023-07-08 | 2023-07-08 | MOS chip packaging structure capable of avoiding pin deformation |
Publications (1)
Publication Number | Publication Date |
---|---|
CN220208947U true CN220208947U (en) | 2023-12-19 |
Family
ID=89140101
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202321783057.4U Active CN220208947U (en) | 2023-07-08 | 2023-07-08 | MOS chip packaging structure capable of avoiding pin deformation |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN220208947U (en) |
-
2023
- 2023-07-08 CN CN202321783057.4U patent/CN220208947U/en active Active
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