CN219514304U - Circuit board structure convenient for differential line wiring - Google Patents

Abstract

The utility model discloses a circuit board structure convenient for differential line wiring, which comprises a plurality of layers of conducting layers, wherein an insulating layer is arranged between the plurality of layers of conducting layers, a chip bonding pad and a capacitor bonding pad are arranged on the top layer of conducting layer, two capacitor bonding pads form a group, each chip bonding pad comprises a plurality of groups of differential signal pins, each differential signal pin is connected with one pin of the capacitor bonding pad, a group of signal through holes are arranged between one group of capacitor bonding pads on the conducting layer, each signal through hole is connected with the other pin of one group of capacitor bonding pads on the top layer of conducting layer, and each signal through hole is connected with a differential signal line on the lower layer of conducting layer. According to the utility model, the signal via holes are arranged between the capacitor pads, the signal via holes can be arbitrarily selected in the top conductive layer to be connected with one capacitor pad of the capacitor pads, and the connecting lines between the two signal via holes and the capacitor pads are not crossed, so that the wiring of the differential signal lines is convenient, the equal length in the differential signal line pair is easy to ensure, the bulge is reduced, and the signal quality is ensured.

Description

Circuit board structure convenient for differential line wiring

Technical Field

The utility model relates to the technical field of circuit board structures, in particular to a circuit board structure convenient for wiring differential lines.

Background

Differential signals (DifferenTIal Signal) are increasingly used in high-speed circuit designs, and most critical signals in the circuits are often designed by adopting differential structures. In colloquial terms, the driving end sends two equivalent and opposite signals, and the receiving end judges whether the logic state is 0 or 1 by comparing the difference value of the two voltages. And the pair of traces carrying the differential signals is referred to as a differential trace.

In order to ensure the quality of the differential signals, the differential wires are required to be ensured to be parallel and equal in length, sometimes, the differential signals are crossed due to the position limitation of hardware pins, such as two groups of differential wires on the right side in fig. 1, which can enable the two signal wires to normally transmit signals, or the two groups of differential wires on the right side in fig. 2 are wound, the difference between the lengths of the two signals is relatively large, the inner equal length is required to be manually bulged, the impedance is changed in the bulged area, and the signal quality is reduced.

The above disadvantages are to be improved.

Disclosure of Invention

In order to solve the problems that the existing differential wiring sometimes causes the intersection of differential signals due to the position limitation of hardware pins, so that two signal wires cannot normally transmit signals or the wiring is wound, the difference of the lengths of the two signals is relatively large, the inner length of the two signals needs to be manually bulged, the impedance of the bulged part is changed, and the signal quality is reduced, the utility model provides a circuit board structure convenient for differential wiring.

The technical scheme of the utility model is as follows:

the utility model provides a circuit board structure convenient to differential line wiring, includes multilayer conducting layer, the multilayer be provided with the insulating layer between the conducting layer, the top layer the conducting layer is provided with chip pad and electric capacity pad, two electric capacity pad constitutes a set of, the chip pad includes multiunit differential signal pin, every group differential signal pin corresponds and sets up a set of electric capacity pad, differential signal pin with close one pin in the electric capacity pad is connected, the conducting layer is provided with a set of signal via hole between a set of electric capacity pad, a set of signal via hole includes two signal via hole, two signal via hole is at the top layer the conducting layer respectively with a set of another pin of electric capacity pad is connected, two signal via hole is at the lower floor the conducting layer is connected with differential signal line respectively.

In the circuit board structure convenient for differential line wiring, each group of capacitor pads is provided with a group of ground-companion via holes corresponding to the signal via holes.

Further, each group of the ground vias is arranged at the same edge of one group of the capacitor pads, and the central connecting line of the two ground vias is parallel to the central connecting line of the two pins of the capacitor pads.

Further, the satellite vias have a diameter of 8mil to 16mil.

Further, the distance between the companion ground via and the corresponding signal via is 1mm.

According to the circuit board structure convenient for differential line wiring, one of the signal through holes is positioned at the center of the capacitor pad, the other signal through hole is positioned at the edge of the capacitor pad, and the central connecting line of the two signal through holes is parallel to the central connecting line of the two pins of the capacitor pad.

The circuit board structure is convenient for differential line wiring, and the diameter of the signal via hole is 8mil to 16mil.

The circuit board structure is convenient for differential line wiring, and the distance between a group of signal through holes is 1mm.

According to the circuit board structure convenient for differential line wiring, the distance between centers of two corresponding pins in two capacitor pads in one group of capacitor pads is 1mm.

The circuit board structure is convenient for differential line wiring, and the capacitance bonding pad is 0402 packaging size.

According to the scheme, the signal via holes are arranged between the capacitor pads, the signal via holes can be arbitrarily selected to be connected with one capacitor pad of the capacitor pads in the top conductive layer, the other signal via hole in the signal via holes is connected with the other capacitor pad in the capacitor pads, and the connecting lines between the two signal via holes and the capacitor pads are not crossed, so that the wiring of differential signal lines is facilitated, the inner equal length of the differential signal line pairs is easily ensured, the bulge is reduced, and the signal quality is ensured.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments or the description of the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a first prior art case;

FIG. 2 is a schematic diagram of a second prior art case;

FIG. 3 is a schematic diagram of the structure of the present utility model;

fig. 4 is a partial structural dimension of the present utility model.

Wherein, each reference sign in the figure: 1. a conductive layer; 2. a chip bonding pad; 201. differential signal pins; 3. a capacitor pad; 4. a signal via; 5. differential signal lines; 6. and a via hole.

Detailed Description

In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the utility model is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.

It will be understood that when an element is referred to as being "mounted" or "disposed" or "connected" to another element, it can be directly or indirectly on the other element. The directions or positions indicated by the terms "upper", "lower", "left", "right", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are directions or positions based on the drawings, and are merely for convenience of description and are not to be construed as limiting the present technical solution. The terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features. The meaning of "multiple" is two or more, unless explicitly defined otherwise. The meaning of "a number" is one or more than one, unless specifically defined otherwise.

As shown in fig. 3, in one embodiment of the present utility model, a circuit board structure for facilitating differential line routing includes a plurality of conductive layers 1, an insulating layer is disposed between the plurality of conductive layers 1, a top conductive layer 1 is provided with a chip pad 2 and a capacitor pad 3, two capacitor pads 3 form a group, the chip pad 2 includes a plurality of differential signal pins 201, each differential signal pin 201 is correspondingly provided with a group of capacitor pads 3, the differential signal pins 201 are connected with a similar pin in the capacitor pads 3, a group of signal vias 4 is disposed between the plurality of capacitor pads 3 in the conductive layer 1, a group of signal vias 4 includes two signal vias 4, the two signal vias 4 are respectively connected with another pin of the group of capacitor pads 3 in the top conductive layer 1, and the two signal vias 4 are respectively connected with differential signal lines 5 in the lower conductive layer 1.

When the differential signal transmission device is used, a chip is welded to the chip bonding pad 2, a capacitor is welded to the capacitor bonding pad 3, so that a circuit between the differential signal pin 201 of the chip and the differential signal wire 5 is conducted, a differential signal reaches the top conductive layer 1 from the differential wire in the lower conductive layer 1 through the signal through hole 4 and then reaches one pin of the capacitor bonding pad 3 from the top conductive layer 1, and then enters the capacitor, the differential signal is filtered by the capacitor, direct current noise in the signal is isolated, the quality of the differential signal is improved, then reaches one differential signal pin 201 of the chip bonding pad 2 from the other pin of the capacitor bonding pad 3, and then enters the chip, so that signal transmission is realized, and the signal can be transmitted from the chip to the differential signal wire 5.

In the utility model, the signal via holes 4 are arranged between one group of capacitor pads 3, the signal via holes 4 can be arbitrarily selected to be connected with one capacitor pad 3 of one group of capacitor pads 3 in the top conductive layer 1, as shown in fig. 3, the connection modes of the left three groups of capacitor pads 3 and the right two groups of capacitor pads 3 and the signal via holes 4 are different, wherein the differential signal wires 5 are arranged in the lower conductive layer 1, the other signal via holes 4 in one group of signal via holes 4 are connected with the other capacitor pad 3 in one group of capacitor pads 3 for the convenience of observation, and the connection lines between the two signal via holes 4 and the capacitor pads 3 are not crossed, so that the differential signal wires 5 can be designed according to pins at one end of a chip for transmitting signals, and one end of the chip for transmitting signals is always the other chip or a connector, thereby facilitating the wiring of the differential signal wires 5, ensuring the equal length in pairs of the differential signal wires 5 and ensuring the signal quality.

As shown in fig. 3, in a preferred example, each set of capacitor pads 3 is provided with a set of ground vias 6 corresponding to the signal vias 4. The satellite via 6 is used to provide the shortest return path, ensuring signal quality.

As shown in fig. 3 and 4, in a preferred embodiment, each set of ground vias 6 is disposed at the same edge of a set of capacitor pads 3, and the center line of two ground vias 6 is parallel to the center line of two pins of capacitor pad 3. One of the signal vias 4 is located at the center of the capacitor pad 3 and the other is located at the edge of the capacitor pad 3, and the center line of the two signal vias 4 is parallel to the center line of the two pins of the capacitor pad 3. The signal via holes 4 are arranged in the center of the group of capacitor pads 3, so that a larger distance exists between the signal via holes 4 and the capacitor pads 3, the arrangement between the signal via holes and the capacitor pads is not affected, and the interference between the signal via holes and the capacitor pads is reduced. The ground-tracing via holes 6 are arranged at the edges of the group of capacitor pads 3, so that a certain distance is reserved between the ground-tracing via holes 6 and the capacitor pads 3, the ground-tracing via holes 6 and the capacitor pads 3 are convenient to set, the proper distance between the ground-tracing via holes 6 and the signal via holes 4 is ensured, signal reflux is ensured, and signal quality is further ensured.

In a preferred embodiment, the diameter of the satellite vias 6 and the diameter of the signal vias 4 are 8mil to 16mil, as shown in fig. 4, to facilitate design as desired, with a suitable aperture being selected.

As shown in fig. 4, in a preferred embodiment, the capacitor pad 3 is 0402 package size, the 0402 package size pad can be used for soldering a capacitor with a size of 1.0mm×0.5mm, the 0402 package size is smaller, the discontinuity of impedance can be reduced, the signal quality is ensured, and the size of the circuit board is conveniently reduced, and in addition, the 0402 package size manufacturing process is mature, and the production is convenient. The distance between the satellite via 6 and the corresponding signal via 4 is 1mm. The distance between a set of signal vias 4 is 1mm. The distance between the centers of the corresponding two pins in the two capacitor pads 3 in the group of capacitor pads 3 is 1mm. The proper distance is kept between each through hole and the pins of the capacitor pad 3 by controlling the distance between each through hole and the pins of the capacitor pad 3, so that the signal quality is ensured.

The foregoing description of the preferred embodiments of the utility model is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the utility model.

Claims (10)

1. The utility model provides a circuit board structure convenient to differential line wiring, includes multilayer conducting layer, and the multilayer be provided with the insulating layer between the conducting layer, the top layer the conducting layer is provided with chip pad and electric capacity pad, two electric capacity pad constitutes a set of, the chip pad includes multiunit differential signal pin, every group differential signal pin corresponds to set up a set of electric capacity pad, differential signal pin with close one pin in the electric capacity pad is connected, its characterized in that, the conducting layer is provided with a set of signal via hole between a set of electric capacity pad, a set of signal via hole includes two signal via hole, two signal via hole is at the top layer the conducting layer respectively with a set of electric capacity pad's another pin is connected, two signal via hole is at the lower floor the conducting layer is connected with differential signal line respectively.

2. A circuit board structure for facilitating differential line routing as recited in claim 1, wherein each set of said capacitor pads is provided with a set of ground vias corresponding to said signal vias.

3. A circuit board structure for facilitating differential line routing as recited in claim 2, wherein each set of said ground vias is disposed on the same edge of a set of said capacitor pads, and the center line of two ground vias is parallel to the center line of two pins of said capacitor pads.

4. A circuit board structure for facilitating differential line routing as recited in claim 2, wherein said satellite vias have a diameter of 8mil to 16mil.

5. A circuit board structure facilitating differential line routing as recited in claim 2, wherein a distance between said satellite via and a corresponding said signal via is 1mm.

6. A circuit board structure for facilitating differential line routing as recited in claim 1, wherein one of said signal vias is located in the center of one of said capacitor pads and the other is located at the edge of said capacitor pad, and the center line of two signal vias is parallel to the center line of two pins of said capacitor pad.

7. A circuit board structure for facilitating differential line routing as recited in claim 1, wherein said signal vias have a diameter of 8mil to 16mil.

8. A circuit board structure for facilitating differential line routing as recited in claim 1, wherein a distance between a set of said signal vias is 1mm.

9. A circuit board structure facilitating differential line routing as recited in claim 1, wherein the distance between centers of corresponding two pins in two of said capacitor pads in a set of said capacitor pads is 1mm.

10. A circuit board structure for facilitating differential line routing as recited in claim 1, wherein said capacitive pads are 0402 package size.