CN219302901U - Controller awakening circuit based on multiple keys and electronic equipment - Google Patents

Controller awakening circuit based on multiple keys and electronic equipment Download PDF

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CN219302901U
CN219302901U CN202320171804.2U CN202320171804U CN219302901U CN 219302901 U CN219302901 U CN 219302901U CN 202320171804 U CN202320171804 U CN 202320171804U CN 219302901 U CN219302901 U CN 219302901U
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module
wake
resistor
key
main control
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陈智红
凌健鸿
刘贵林
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Guangzhou Ligong Science And Technology Co ltd
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Guangzhou Ligong Science And Technology Co ltd
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Abstract

The embodiment of the application discloses a controller wake-up circuit based on multiple keys and electronic equipment, wherein the controller wake-up circuit comprises a main control chip, a wake-up module, a power supply module and at least one key module; the detection pin of the main control chip is connected with the first end of each key module, the second end of each key module is grounded, and each key module corresponds to one key; the wake-up pin of the main control chip is connected with the first end of the wake-up module, the second end of the wake-up module is connected with the first end of each key module, the third end of the wake-up module is connected with the power module, and the wake-up pin is used for outputting a high level according to the conduction of each key module so as to wake up the main control chip. The embodiment of the application can solve the problem of higher cost of the multi-key controller wake-up circuit, reduce the cost of the multi-key controller wake-up circuit and improve the wake-up flexibility.

Description

Controller awakening circuit based on multiple keys and electronic equipment
Technical Field
The embodiment of the application relates to the technical field of electronic circuits, in particular to a controller wake-up circuit based on multiple keys and electronic equipment.
Background
With the development of technology, electronic equipment is more and more intelligent, and a controller is one of important devices for realizing the intellectualization of the electronic equipment.
Currently, electronic devices connect a main control chip and keys through GPIO (General purpose input/output) pins. The main control chip identifies whether the corresponding key state is opened or closed by judging the GPIO level state. When the key state is judged to be closed, the controller is awakened.
In the wake-up circuit of the existing controller, generally, 1 GPIO pin is connected with one key, and when a plurality of keys are needed, a plurality of GPIO pins are needed, so that the cost is high. In addition, the controller wake-up circuit of the multi-key can be adapted by adding the key matrix chip, but the cost is also higher.
Disclosure of Invention
The embodiment of the application provides a controller wake-up circuit and electronic equipment based on multiple keys, which can solve the problem that the cost of the controller wake-up circuit of the multiple keys is higher, reduce the cost of the controller wake-up circuit of the multiple keys and improve the wake-up flexibility.
In a first aspect, an embodiment of the present application provides a controller wake-up circuit based on multiple keys, including a controller wake-up circuit based on multiple keys, which is characterized by including a main control chip, a wake-up module, a power module, and at least one key module;
the detection pin of the main control chip is connected with the first end of each key module, the second end of each key module is grounded, and each key module corresponds to one key;
the wake-up pin of the main control chip is connected with the first end of the wake-up module, the second end of the wake-up module is connected with the first end of each key module, the third end of the wake-up module is connected with the power module, and the wake-up pin is used for outputting a high level according to the conduction of each key module so as to wake up the main control chip.
Further, the key module comprises a switch and a switch resistor;
the first end of the switch resistor is connected with the detection pin of the main control chip;
the second end of the switch resistor is connected with the first end of the switch, and the second end of the switch is grounded.
Further, the resistance of the switch resistor in each key module is different.
Further, the wake-up module comprises a resistor sub-module and a field effect tube module;
the first end of the resistor sub-module is connected with the power supply module;
the second end of the resistor sub-module is connected with the grid end of the field effect tube module and the first end of each key module;
the third end of the resistor sub-module is connected with the source electrode end of the field effect tube module;
and the drain electrode end of the field effect tube module is connected with the wake-up pin of the main control chip.
Further, the resistor sub-module comprises a first resistor and a second resistor;
the first end of the first resistor is connected with the power supply module and the first end of the second resistor;
the second end of the first resistor is connected with the grid end of the field effect tube module and the first end of each key module;
the second end of the second resistor is connected with the source electrode end of the field effect tube module.
Further, the field effect tube module comprises a PMOS tube;
the grid end of the PMOS tube is connected with the second end of the resistor sub-module and the first end of each key module;
the source end of the PMOS tube is connected with the third end of the resistor sub-module;
and the drain electrode end of the PMOS tube is connected with the wake-up pin of the main control chip.
Further, the output voltage of the power supply module is 3.3V.
Further, the resistance value of the first resistor is 10kΩ, and the resistance value of the second resistor is 10kΩ.
Further, the detection pin of the main control chip is an ADC pin.
The embodiment of the application also provides electronic equipment, which comprises the controller wake-up circuit based on the multiple keys.
According to the embodiment of the application, the detection pin of the main control chip is connected with the first end of the key module corresponding to each key, so that the pin number of the main control chip is reduced, the problem that the cost of the controller awakening circuit of the multiple keys is high is solved, and the cost of the controller awakening circuit of the multiple keys is reduced. In addition, the wake-up pin of the main control chip is connected with the first end of the wake-up module, and the wake-up module is used for outputting a high level according to the conduction of each key module so as to wake up the main control chip, so that the wake-up flexibility is improved.
Drawings
Fig. 1 is a schematic diagram of a first multi-key-based controller wake-up circuit according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments.
Fig. 1 is a schematic diagram of a first multi-key-based controller wake-up circuit according to an embodiment of the present application, and referring to fig. 1, the multi-key-based controller wake-up circuit includes a main control chip (not shown in the figure), a wake-up module 10, a power module 11, and at least one key module 12. The detection pin of the main control chip is connected with the first end of each key module 12, and the second end of each key module 12 is grounded, wherein each key module 12 corresponds to one key. The wake-up pin (wake-up pin) of the main control chip is connected with the first end of the wake-up module 10, the second end of the wake-up module 10 is connected with the first end of each key module 12, the third end of the wake-up module 10 is connected with the power module 11, and the wake-up pin (wake-up pin) is used for outputting a high level according to the conduction of each key module 12 so as to wake up the main control chip. The detection pin of the main control chip is an ADC pin. The output voltage of the power supply module 11 is 3.3V. When the key module 12 is turned on, the corresponding detection pin determines that the key module 12 is turned on correspondingly according to the detected voltage value, so as to realize detection and confirmation of key press. When one of the keys is turned on, the corresponding wake-up module 10 is turned on, and the wake-up pin (wake-up pin) of the corresponding main control chip receives the voltage of the power module 11, so as to wake up itself (main control chip). The multi-key input device can be connected with the multi-key module 12 through one detection pin, so that the input of multiple keys is realized, the pin number of a main control chip is reduced, and the cost investment is reduced. By matching the wake-up module 10 and the key module 12, the main control chip can be waken up by conducting each key model, and the wake-up flexibility is improved.
The key module 12 includes a switch and a switch resistor. The first end of the switch resistor is connected with the detection pin of the main control chip. The second end of the switch resistor is connected with the first end of the switch, and the second end of the switch is grounded. As shown in fig. 1, assuming that 3 keys are provided, the key modules 12 corresponding to the 3 keys are a first key module, a second key module and a third key module, where the first key module includes a first switch S1 and a first switch resistor R1, the second key module includes a second switch S2 and a second switch resistor R2, and the third key module includes a S3 and a third switch resistor R3. The resistances of the first switching resistor R1, the second switching resistor R2 and the third switching resistor R3 are different. For example, the resistance of the first switching resistor R1 is 1kΩ, the resistance of the second switching resistor R2 is 2kΩ, the resistance of the third switching resistor R3 is 3kΩ, and so on, when N switching resistors are present, the corresponding resistance of the nth switching resistor is NK Ω.
It should be noted that the actual values of the set keys may be set according to the actual situation, and the above 3 keys are only used for illustration.
The wake-up module 10 includes a resistor sub-module 101 and a field effect transistor sub-module 102. The first end of the resistor sub-module 101 is connected to the power module 11, the second end of the resistor sub-module 101 is connected to the gate end G of the field effect tube module 102 and the first end of each key module 12, the third end of the resistor sub-module 101 is connected to the source end S of the field effect tube module 102, and the drain end D of the field effect tube module 102 is connected to the wake-up pin (wake-up pin) of the main control chip.
The resistor sub-module 101 includes a first resistor R10 and a second resistor R11. The first end of the first resistor R10 is connected to the power module 11 and the first end of the second resistor R11, the second end of the first resistor R10 is connected to the gate end G of the field effect tube module 102 and the first end of each key module 12, and the second end of the second resistor R11 is connected to the source end S of the field effect tube module 102. The resistance of the first resistor R10 is 10kΩ, and the resistance of the second resistor R11 is 10kΩ.
Wherein the field effect tube module 102 comprises a PMOS tube. The grid end G of the PMOS tube is connected with the second end of the resistor sub-module 101 and the first end of each key module 12, the source end S of the PMOS tube is connected with the third end of the resistor sub-module 101, and the drain end D of the PMOS tube is connected with a wake-up pin (wake pin) of the main control chip.
In an embodiment, assuming that 3 keys are provided, the key modules 12 corresponding to the 3 keys are a first key module, a second key module and a third key module, where the first key module includes a first switch S1 and a first switch resistor R1, the second key module includes a second switch S2 and a second switch resistor R2, and the third key module includes a S3 and a third switch resistor R3. The resistances of the first switching resistor R1, the second switching resistor R2 and the third switching resistor R3 are different. For example, the resistance of the first switching resistor R1 is 1kΩ, the resistance of the second switching resistor R2 is 2kΩ, and the resistance of the third switching resistor R3 is 3kΩ. When the first switch S1 is turned on, the first switch resistor R1 is shorted to ground and connected in series with the first resistor R10, wherein the first resistor R10 is assumed to be 10kΩ. The ADC pin is connected between the first switch resistor R1 and the first resistor R10, where the first resistor R10 is connected to 3.3V of the power module 11, and the voltage acquired by the ADC pin is 300mV (assuming r1=1kΩ, r10=10kΩ) at this time, so when 300mV is detected by the ADC pin of the software setting main control chip, the first switch S1 identified as the first key module is turned on, that is, the first key is pressed.
Similarly, when the second switch S2 is turned on, the second switch resistor R2 and the first resistor R10 are divided, and the resistances of the second switch resistor R2 and the first switch resistor R1 are different, so the voltage collected by the ADC pin is 550mV (assuming r2=2kΩ, r10=10kΩ). Therefore, when the ADC pin of the main control chip detects a voltage of 550mV, it can be identified that the second switch S2 corresponding to the second key module is turned on, i.e. the second key is pressed.
Other switches are conducted in the same way, and as long as the resistance values of the corresponding switch resistors of the key module 12 are different, voltages acquired by the ADC pins are different, so that the functions of a plurality of keys can be identified by one ADC pin.
In one embodiment, a method for conducting identification of the combination key module 12 is provided. It is assumed that the first switch S1 and the second switch S2 are turned on simultaneously, that is, the first key and the second key are pressed simultaneously, and the first switch resistor R1 and the second switch resistor R2 are connected in parallel, and then connected in series with the first resistor R10 to divide voltage. At this time, the voltage collected by the ADC pin is 206mV (assuming r1=1kΩ, r2=2kΩ, r10=10kΩ). Therefore, when the voltage of 206mV is detected by the ADC pin of the main control chip, it is identified that the first switch S1 and the second switch S2 are turned on at the same time, i.e. the first key and the second key are pressed at the same time. The same applies to other keys being pressed simultaneously.
In an embodiment, an implementation of waking up a main control chip is provided. When the device is in a low power consumption state, if the device needs to wake up through a key, the ADC pin is required to have a wake-up function, however, a general ADC pin does not have a wake-up function, and the embodiment sets the second resistor R11 and the PMOS transistor. The gate end G of the PMOS tube is connected with the ADC pin, the source end S is connected to 3.3V of the power module 11 through the second resistor R11, and the drain end D is connected to a wake-up pin (wake-up pin) with a wake-up function of the main control chip. When the keyless module 12 is turned on, that is, no key is pressed, the voltage of the gate terminal G is connected to 3.3V of the power module 11 through the first resistor R10, the PMOS transistor is turned off, and the wake-up pin (wake-up pin) has no voltage. When the key module 12 is turned on, that is, when a key is pressed, the voltage of the gate end G of the PMOS tube (the voltage at the ADC) is only several hundred mV due to the voltage division effect of the resistor, and at this time, the PMOS tube is turned on, and the wake-up pin (wake-up pin) is pulled up to 3.3V through the first resistor R10, so as to output a high level wake-up main control chip.
Above-mentioned, when the circuit need discern a plurality of buttons, only need an ADC pin can to save a large amount of GPIO pins, thereby realize saving the cost.
The detection pin of the main control chip is connected with the first end of the key module 12 corresponding to each key, so that the pin number of the main control chip is reduced, and the cost of the wake-up circuit of the controller with multiple keys is reduced. In addition, the wake-up pin (wake-up pin) of the main control chip is connected to the first end of the wake-up module 10, and the wake-up module 10 is configured to output a high level according to the conduction of each key module 12, so as to wake up the main control chip, thereby improving the wake-up flexibility.
The embodiment of the application also provides electronic equipment, which comprises the controller wake-up circuit based on the multiple keys.
In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present utility model.
In the present utility model, unless explicitly specified and limited otherwise, the terms "disposed," "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; the connection may be mechanical connection, direct connection or indirect connection through an intermediate medium, and may be internal connection of two elements or interaction relationship of two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
It should be noted that, in the present utility model, unless explicitly specified and limited otherwise, a first feature may be "on" or "off" a second feature, either by direct contact of the first and second features or by indirect contact of the first and second features via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
The foregoing is only a preferred embodiment of the present utility model, but the scope of the present utility model is not limited thereto, and any person skilled in the art, who is within the scope of the present utility model, should make equivalent substitutions or modifications according to the technical scheme of the present utility model and the inventive concept thereof, and should be covered by the scope of the present utility model.

Claims (10)

1. The controller wake-up circuit based on the multiple keys is characterized by comprising a main control chip, a wake-up module, a power supply module and at least one key module;
the detection pin of the main control chip is connected with the first end of each key module, the second end of each key module is grounded, and each key module corresponds to one key;
the wake-up pin of the main control chip is connected with the first end of the wake-up module, the second end of the wake-up module is connected with the first end of each key module, the third end of the wake-up module is connected with the power module, and the wake-up pin is used for outputting a high level according to the conduction of each key module so as to wake up the main control chip.
2. The multi-key based controller wake-up circuit of claim 1 wherein the key module comprises a switch and a switch resistor;
the first end of the switch resistor is connected with the detection pin of the main control chip;
the second end of the switch resistor is connected with the first end of the switch, and the second end of the switch is grounded.
3. The wake-up circuit of claim 2, wherein the resistance of the switching resistor in each key module is different.
4. The multi-key based controller wake-up circuit of claim 1 wherein the wake-up module comprises a resistor sub-module and a field effect tube module;
the first end of the resistor sub-module is connected with the power supply module;
the second end of the resistor sub-module is connected with the grid end of the field effect tube module and the first end of each key module;
the third end of the resistor sub-module is connected with the source electrode end of the field effect tube module;
and the drain electrode end of the field effect tube module is connected with the wake-up pin of the main control chip.
5. The multi-key based controller wake-up circuit of claim 4 wherein the resistor sub-module comprises a first resistor and a second resistor;
the first end of the first resistor is connected with the power supply module and the first end of the second resistor;
the second end of the first resistor is connected with the grid end of the field effect tube module and the first end of each key module;
the second end of the second resistor is connected with the source electrode end of the field effect tube module.
6. The multi-key based controller wake-up circuit of claim 4 wherein the field effect tube module comprises a PMOS tube;
the grid end of the PMOS tube is connected with the second end of the resistor sub-module and the first end of each key module;
the source end of the PMOS tube is connected with the third end of the resistor sub-module;
and the drain electrode end of the PMOS tube is connected with the wake-up pin of the main control chip.
7. The multi-key based controller wake-up circuit of claim 1, wherein the output voltage of the power module is 3.3V.
8. The multi-key based controller wake-up circuit of claim 5, wherein the first resistor has a resistance of 10kΩ and the second resistor has a resistance of 10kΩ.
9. The multi-key based controller wake-up circuit of claim 1, wherein the detection pin of the master chip is an ADC pin.
10. An electronic device comprising a multi-key based controller wake-up circuit as claimed in any one of claims 1-9.
CN202320171804.2U 2023-01-13 2023-01-13 Controller awakening circuit based on multiple keys and electronic equipment Active CN219302901U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202320171804.2U CN219302901U (en) 2023-01-13 2023-01-13 Controller awakening circuit based on multiple keys and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202320171804.2U CN219302901U (en) 2023-01-13 2023-01-13 Controller awakening circuit based on multiple keys and electronic equipment

Publications (1)

Publication Number Publication Date
CN219302901U true CN219302901U (en) 2023-07-04

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202320171804.2U Active CN219302901U (en) 2023-01-13 2023-01-13 Controller awakening circuit based on multiple keys and electronic equipment

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CN (1) CN219302901U (en)

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