CN218006532U - Circuit for determining master-slave device connection - Google Patents

Abstract

The circuit is applied to slave equipment, the slave equipment is used for being connected with master equipment, the slave equipment is provided with a first VBUS pin, the master equipment is provided with a second VBUS pin, and the slave equipment is connected with the master equipment through the first pin and the second pin; the circuit comprises a power supply unit; the power supply unit is connected with the first pin and used for keeping the level of the first pin at a high level, when the first pin is not connected with the second pin, the second pin is kept at a low level, the level of the first pin is the same as that of the second pin after the first pin and the second pin are connected, and the master device determines whether the slave device is connected or not by detecting whether the level of the second pin is increased or not. Therefore, the data communication pin does not need to be subjected to compatibility design, the circuit complexity of the data communication pin is reduced, the communication stability of the data communication pin is improved, and whether the slave equipment is connected into the master equipment or not can be accurately identified.

Description

Circuit for determining master-slave device connection

Technical Field

The present disclosure relates to the field of electronic devices, and more particularly, to a circuit for determining connection of a master device and a slave device.

Background

The existing mobile devices are increasingly multifunctional, and some mobile devices also need to be independently accessed from the mobile devices to complete auxiliary functions, such as a keyboard, a mouse and the like of a notebook computer. In order to improve the endurance of the mobile device, a battery is configured on part of the slave devices, and the mobile device can be charged reversely.

Since the slave devices have a charging capability, it is necessary to determine the access status between the mobile device and the slave devices, that is, between the master device and the slave devices, in addition to data communication, and a common method for determining the access status between the master device and the slave devices is to design a compatible circuit at a data communication pin for determining the access status between the master device and the slave devices. However, such a compatible circuit makes the circuit of the data communication pin more complicated, which is not favorable for the communication stability of the data communication pin.

SUMMERY OF THE UTILITY MODEL

To address the above technical problems or at least some of the problems, the present disclosure provides a circuit for determining connection of a master device and a slave device.

The present disclosure provides a circuit for determining connection of a master device and a slave device, wherein the circuit is applied to a slave device, the slave device is used for connecting the master device, the slave device is provided with a VBUS first pin, the master device is provided with a VBUS second pin, and the slave device is connected with the master device through the first pin and the second pin; the circuit comprises:

a power supply unit;

the power supply unit is connected with the first pin, the power supply unit is used for keeping the level of the first pin at a high level, when the first pin is not connected with the second pin, the second pin is kept at a low level, the level of the first pin is the same as that of the second pin after the first pin and the second pin are connected, and the master device determines whether the slave device is connected or not by detecting whether the level of the second pin is increased or not.

Optionally, the circuit further comprises:

a control unit and a switch unit;

the switch unit is arranged between the power supply unit and the first pin, the input end of the switch unit is connected with the power supply unit, the output end of the switch unit is connected with the first pin, the control end of the switch unit is connected with the control unit, the power supply unit keeps the level of the first pin at a high level through the switch unit, and the control unit is used for controlling the switch of the switch unit.

Optionally, the switching unit comprises:

a PMOS tube;

the control end of the PMOS tube is connected with the control unit, the input end of the PMOS tube is connected with the power supply unit, and the output end of the PMOS tube is connected with the first pin.

Optionally, the control unit comprises:

the power supply unit and the NMOS tube;

the power supply electronic unit is connected with the control end of the NMOS tube, the input end of the NMOS tube is connected with the control end of the PMOS tube, the output end of the NMOS tube is grounded, and the power supply electronic unit is used for controlling the on-off of the NMOS tube.

Optionally, the control unit further comprises:

a first resistor;

one end of the first resistor is connected with the power supply unit, and the other end of the first resistor is connected with the input end of the NMOS tube.

Optionally, the control unit further comprises:

a second resistor;

the second resistor is arranged between the power supply electronic unit and the control end of the NMOS tube, one end of the second resistor is connected with the power supply electronic unit, and the other end of the second resistor is connected with the control end of the NMOS tube.

Optionally, the control unit further comprises:

a third resistor;

one end of the third resistor is connected with the control end of the NMOS tube, and the other end of the third resistor is grounded.

Optionally, the circuit further comprises:

a one-way conduction unit;

the unidirectional conduction unit is arranged between the output end of the PMOS tube and the first pin, and is used for outputting a signal to the first pin through the output end of the PMOS tube and blocking the first pin from outputting the signal to the output end of the PMOS tube.

Optionally, the unidirectional conducting unit includes:

a diode;

the positive pole of the diode is connected with the output end of the PMOS tube, and the negative pole of the diode is connected with the first pin.

Optionally, the circuit further comprises:

a master control unit;

the master control unit is connected with the control unit;

the master control unit is used for controlling the control unit after the slave equipment is connected to the master equipment, so that the switch unit is switched off.

The circuit for determining connection of the master device and the slave device provided by the disclosure has the following advantages compared with the prior art:

the circuit provided by the disclosure is applied to a slave device, wherein the slave device is used for connecting a master device, the slave device is provided with a first VBUS pin, the master device is provided with a second VBUS pin, and the slave device is connected with the master device through the first pin and the second pin; the circuit comprises a power supply unit; the power supply unit is connected with the first pin, the power supply unit is used for keeping the level of the first pin at a high level, when the first pin is not connected with the second pin, the second pin is kept at a low level, the level of the first pin is the same as that of the second pin after the first pin and the second pin are connected, and the master device determines whether the slave device is connected or not by detecting whether the level of the second pin is increased or not. That is, the present disclosure actually determines whether the slave device is connected to the master device through the VBUS pin, and compared with the prior art, the data communication pin is no longer needed to determine whether the slave device is connected to the master device, and therefore, a compatibility design for the data communication pin is not needed, the circuit complexity of the data communication pin is reduced, the communication stability of the data communication pin is improved, and whether the slave device is connected to the master device can be accurately identified.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.

In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present disclosure, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic structural diagram of a circuit for determining connection of a master device and a slave device according to an embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of another circuit for determining connection between a master device and a slave device according to an embodiment of the present disclosure;

fig. 3 is a schematic structural diagram of another circuit for determining connection of a master device and a slave device according to an embodiment of the present disclosure.

Detailed Description

In order that the above objects, features and advantages of the present disclosure may be more clearly understood, aspects of the present disclosure will be further described below. It should be noted that the embodiments and features of the embodiments of the present disclosure may be combined with each other without conflict.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced in other ways than those described herein; it is to be understood that the embodiments disclosed in the specification are only a few embodiments of the present disclosure, and not all embodiments.

The following provides an exemplary description of a circuit for determining connection of a master device and a slave device according to an embodiment of the present disclosure with reference to the drawings.

Fig. 1 is a schematic structural diagram of a circuit for determining connection of a master device and a slave device according to an embodiment of the present disclosure. The present disclosure provides a circuit for determining connection of a master device and a slave device, the circuit is applied to a slave device 10, the slave device 10 is used for connecting a master device 20, the slave device 10 is provided with a first pin 11 of VBUS, the master device 20 is provided with a second pin 21 of VBUS, and the slave device 10 and the master device 20 are connected through the first pin 11 and the second pin 21. The circuit comprises:

a power supply unit 12. The power supply unit 12 is connected to the first pin 11, the power supply unit 12 is configured to keep a level of the first pin 11 at a high level, when the first pin 11 is not connected to the second pin 21, the second pin 21 is kept at a low level, the level of the first pin 11 is the same as that of the second pin 21 after the first pin 11 is connected to the second pin 21, and the master device 20 determines whether the slave device 10 is connected by detecting whether the level of the second pin 21 is increased.

The connection interfaces of the master device and the slave device generally comprise three types, namely a power supply interface, namely a VBUS interface, a data communication interface and a ground wire, and the traditional circuit for determining the connection of the master device and the slave device is generally designed with a compatible circuit in the data communication interface, but the design can cause the circuit of the data communication interface to be too complex, so that the stability of the data communication interface is not facilitated. The disclosed embodiments determine the master-slave device connection through the VBUS interface. As shown in fig. 1, the circuit is applied to the slave device 10, and the VBUS first pin 11 of the slave device 10 is maintained at a high level, for example, 3.3V, and the VBUS second pin 21 of the master device is maintained at a low level, for example, 0V, when the slave device 10 is not connected, by providing a power supply unit 12. After the slave device 10 is connected to the master device 20, the level of the second pin 21 of the master device 20 may be raised to 3.3V by the first pin 11, and a detection unit (not shown) may be disposed in the master device, where the detection unit of the master device 20 determines whether the slave device is connected by detecting whether the level of the second pin 21 is raised, and determines that the slave device 10 is connected when it is determined that the level of the second pin 21 is raised.

Based on the circuit, the embodiment of the disclosure actually determines whether the slave device is connected to the master device through the VBUS pin, and compared with the prior art, the embodiment of the disclosure does not need the data communication pin to determine whether the slave device is connected to the master device, so that the data communication pin does not need to be compatibly designed, the circuit complexity of the data communication pin is reduced, the communication stability of the data communication pin is improved, and whether the slave device is connected to the master device can be accurately identified.

Fig. 2 is a schematic structural diagram of another circuit for determining connection between a master device and a slave device according to an embodiment of the present disclosure. In some embodiments, the circuit further comprises:

a control unit 13 and a switching unit 14. The switch unit 14 is disposed between the power supply unit 12 and the first pin 11, an input end of the switch unit 14 is connected to the power supply unit 12, an output end of the switch unit 14 is connected to the first pin 11, a control end of the switch unit 14 is connected to the control unit 13, the power supply unit 12 maintains the level of the first pin 11 at a high level through the switch unit 14, and the control unit 13 is configured to control switching of the switch unit 14.

With continued reference to fig. 2, in some embodiments, the circuit further includes:

a general control unit 15. The general control unit 15 is connected to the control unit 13. The master control unit 15 is used to control the control unit 13 to switch off the switching unit 14 after the slave device 10 has been switched in to the master device 20.

Specifically, in order to control the level of the first pin 11, the control unit 13 and the switch unit 14 may be provided, for example, when the first pin 11 and the second pin 21 are not connected, the general control unit 15 controls the control unit 13, the control unit 13 controls the switch unit 14 to be turned on, that is, in a state of being in a pass state, after the first pin 11 and the second pin 21 are connected, the general control unit 15 controls the control unit 13, and the control unit 13 controls the switch unit 14 to be turned off, so that the power supply unit 12 does not provide a high level to the first pin 11 any more, and power consumption is reduced. In the above embodiment, the master control unit 15 may determine whether the slave device is plugged into the master device by acquiring the data communication signal between the master device 20 and the slave device 10, that is, determine whether the first pin 11 and the second pin 21 are connected by acquiring the data communication signal between the master device 20 and the slave device 10.

With the above arrangement, it is possible to realize more intelligent control of the power supply unit 12 and the first pin 11.

Fig. 3 is a schematic structural diagram of another circuit for determining connection of a master device and a slave device according to an embodiment of the present disclosure. In some embodiments, the switching unit 14 includes:

a PMOS transistor 141. The control end of the PMOS tube 141 is connected with the control unit 13, the input end of the PMOS tube 141 is connected with the power supply unit 12, and the output end of the PMOS tube 141 is connected with the first pin 11.

Specifically, the control terminal of the PMOS transistor 141 is a gate of the PMOS transistor 141, the input terminal of the PMOS transistor 141 is a source of the PMOS transistor 141, and the output terminal of the PMOS transistor 141 is a drain of the PMOS transistor 141.

With continued reference to fig. 3, in some embodiments, the control unit 13 includes:

a power supply unit 131 and an NMOS transistor 132. The power supply unit 131 is connected to the control end of the NMOS tube 132, the input end of the NMOS tube 132 is connected to the control end of the PMOS tube 141, the output end of the NMOS tube 132 is grounded, and the power supply unit 131 is used for controlling the on/off of the NMOS tube 132.

Specifically, the control terminal of the NMOS tube 132 is the gate of the NMOS tube 132, the input terminal of the NMOS tube 132 is the drain of the NMOS tube 132, and the output terminal of the NMOS tube 132 is the source of the NMOS tube 132. When the first pin 11 and the second pin 21 are not connected, the general control unit 15 controls the power supply unit 131 to output a high level to the control end of the NMOS tube 132, the NMOS tube 132 is in a conducting state, the control end of the PMOS tube 141 is actually grounded, the control end and the input end of the NMOS tube 132 are divided, the PMOS tube 141 is conducting, the power supply unit 12 is communicated with the first pin 11 at this time, the first pin 11 of the slave device may be in a high level state of 3.3V at this time, and when the slave device is not connected with the slave device 10, the second pin of the master device 20 defaults to be in a low level state, for example, 0V.

After the slave device 10 accesses the master device 20, that is, the first pin 11 is connected to the second pin 21, the level of the second pin 21 is pulled high by the first pin 11, the master device 20 detects that the level of the second pin is increased, determines that the slave device 10 accesses, and the master device 20 supplies power to the slave device 10 through VBUS. It should be noted that the master device 20 described in the above embodiments supplies power to the slave device 10 through the VBUS means that the slave device 10 is supplied with power through other existing compatible circuits of the VBUS, and the slave device 10 is not supplied with power through the circuit for determining connection of the master device and the slave device in the present embodiment, and for the sake of brevity of description, detailed descriptions of other compatible circuits are omitted here.

After the slave device 10 is connected to the master device 20 and normally works, in order to reduce power consumption, the master control unit 15 may control the power supply unit 131 to no longer output a high level to the control end of the NMOS tube 132, the NMOS tube 132 is in a disconnected state, the control end and the input end of the PMOS tube 141 are no longer divided in voltage, the PMOS tube 141 is in a disconnected state, the power supply unit 12 cannot output a high level to the first pin 11, and power consumption in a working state is reduced.

With continued reference to fig. 3, in some embodiments, the circuit further comprises:

and a unidirectional conducting unit 16. The unidirectional conducting unit 16 is disposed between the output terminal of the PMOS transistor 141 and the first pin 11, and the unidirectional conducting unit 16 is configured to output a signal to the first pin 11 through the output terminal of the PMOS transistor 141, and block the first pin 11 from outputting a signal to the output terminal of the PMOS transistor 141.

In some embodiments, the unidirectional conducting unit 16 includes:

and a diode. The anode of the diode is connected to the output terminal of the PMOS transistor 141, and the cathode of the diode is connected to the first pin 11.

Specifically, when the master device 20 supplies power to the slave device 10, the one-way conduction unit 16, i.e., the diode, in the slave device 10 may block the signal transmitted to the output terminal of the PMOS transistor 141, so as to prevent the circuit in this embodiment from being affected by the supply voltage of the master device 20.

With continued reference to fig. 3, in some embodiments, the control unit 13 further comprises:

a first resistor 133. One end of the first resistor 133 is connected to the power supply unit 12, and the other end of the first resistor 133 is connected to the input end of the NMOS transistor 132.

The first resistor 133 is arranged to perform a voltage dividing and current limiting function on the NMOS tube 132.

With continued reference to fig. 3, in some embodiments, the control unit 13 further includes:

a second resistor 134. The second resistor 134 is disposed between the power supply unit 131 and the control end of the NMOS tube 132, one end of the second resistor 134 is connected to the power supply unit 131, and the other end of the second resistor 134 is connected to the control end of the NMOS tube 132.

Specifically, the second resistor 134 is arranged to improve the integrity of the signal, so that the control terminal of the NMOS transistor 132 can control the switch of the NMOS transistor 132 more accurately.

With continued reference to fig. 3, in some embodiments, the control unit 13 further includes:

and a third resistor 135. One end of the third resistor 135 is connected to the control end of the NMOS transistor 132, and the other end of the third resistor 135 is grounded.

By arranging the third resistor 135, the input end of the NMOS tube 132 can be kept in a low-level state, so that signal stability is ensured, and the level of the NMOS tube 132 is prevented from being suspended.

In some other embodiments of the embodiment of the present disclosure, adjustment may also be made on individual devices, for example, the PMOS transistor 141 and the NMOS transistor 132 are replaced by other types of MOS transistors respectively according to characteristics of the MOS transistors, and when adjustment is made on the types of the MOS transistors, fine adjustment may or may be necessary to the control logic of the units such as the power supply unit 131 and the total control unit 15 in this embodiment. For another example, for the purpose of more stable circuit, such as preventing short circuit, voltage division, etc., a resistor 136 as shown in fig. 3 may be further provided, and such similar adjustments are all within the protection scope of the present invention.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

The foregoing are merely exemplary embodiments of the present disclosure, which enable those skilled in the art to understand or practice the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure.

Claims (10)

1. A circuit for determining connection of a master device and a slave device, wherein the circuit is applied to a slave device, the slave device is used for connecting the master device, the slave device is provided with a VBUS first pin, the master device is provided with a VBUS second pin, and the slave device and the master device are connected through the first pin and the second pin; the circuit comprises:

a power supply unit;

the power supply unit is connected with the first pin, the power supply unit is used for keeping the level of the first pin at a high level, when the first pin is not connected with the second pin, the second pin is kept at a low level, the level of the first pin is the same as that of the second pin after the first pin and the second pin are connected, and the master device determines whether the slave device is connected or not by detecting whether the level of the second pin is increased or not.

2. The circuit of claim 1, further comprising:

a control unit and a switch unit;

the switch unit is arranged between the power supply unit and the first pin, the input end of the switch unit is connected with the power supply unit, the output end of the switch unit is connected with the first pin, the control end of the switch unit is connected with the control unit, the power supply unit keeps the level of the first pin to be high level through the switch unit, and the control unit is used for controlling the switch of the switch unit.

3. The circuit of claim 2, wherein the switching unit comprises:

a PMOS tube;

the control end of the PMOS tube is connected with the control unit, the input end of the PMOS tube is connected with the power supply unit, and the output end of the PMOS tube is connected with the first pin.

4. The circuit of claim 3, wherein the control unit comprises:

the power supply unit and the NMOS tube;

the power supply electronic unit is connected with the control end of the NMOS tube, the input end of the NMOS tube is connected with the control end of the PMOS tube, the output end of the NMOS tube is grounded, and the power supply electronic unit is used for controlling the on-off of the NMOS tube.

5. The circuit of claim 4, wherein the control unit further comprises:

a first resistor;

one end of the first resistor is connected with the power supply unit, and the other end of the first resistor is connected with the input end of the NMOS tube.

6. The circuit of claim 4, wherein the control unit further comprises:

a second resistor;

the second resistor is arranged between the power supply electronic unit and the control end of the NMOS tube, one end of the second resistor is connected with the power supply electronic unit, and the other end of the second resistor is connected with the control end of the NMOS tube.

7. The circuit of claim 4, wherein the control unit further comprises:

a third resistor;

one end of the third resistor is connected with the control end of the NMOS tube, and the other end of the third resistor is grounded.

8. The circuit of claim 3, further comprising:

a one-way conduction unit;

the unidirectional conduction unit is arranged between the output end of the PMOS tube and the first pin, and is used for outputting a signal to the first pin through the output end of the PMOS tube and blocking the first pin from outputting the signal to the output end of the PMOS tube.

9. The circuit of claim 8, wherein the unidirectional conducting unit comprises:

a diode;

the positive pole of the diode is connected with the output end of the PMOS tube, and the negative pole of the diode is connected with the first pin.

10. The circuit of claim 2, further comprising:

a master control unit;

the master control unit is connected with the control unit;

the master control unit is used for controlling the control unit after the slave equipment is connected to the master equipment, so that the switch unit is switched off.

Images