CN216956887U - Single-wire awakening and key detection circuit - Google Patents
Single-wire awakening and key detection circuit Download PDFInfo
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- CN216956887U CN216956887U CN202220698538.4U CN202220698538U CN216956887U CN 216956887 U CN216956887 U CN 216956887U CN 202220698538 U CN202220698538 U CN 202220698538U CN 216956887 U CN216956887 U CN 216956887U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection
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Abstract
A single-wire wake-up and KEY detection circuit comprises a single-wire wake-up circuit and a button detection circuit, wherein the single-wire wake-up circuit is arranged on a mainboard, the button detection circuit is arranged on a KEY board, the KEY board is connected with the mainboard through a lead, the single-wire wake-up circuit comprises a resistor R1 and an excitation voltage Vin, the resistor R1 and the excitation voltage Vin are sequentially connected IN series on a KEY IN line, the button detection circuit comprises a first button detection branch circuit consisting of a resistor R2 and a tact switch SW1, a second button detection branch circuit consisting of a resistor R3 and a tact switch SW2, a third button detection branch circuit consisting of a resistor R4 and a tact switch SW3 and a fourth button detection branch circuit consisting of a resistor R2 and a tact switch SW4, when the tact switch is pressed, the corresponding resistor is grounded, and only one loop is used for system identification and wake-up through an external interrupt mode, not only is the cost saved, but also the IO port of the MCU can not be occupied due to too many keys.
Description
Technical Field
The utility model relates to the field of circuits, in particular to a single-wire wake-up and key detection circuit.
Background
At present, most of circuits used for key detection and circuit awakening in China directly adopt a hard-wired high-low level identification circuit in the prior art, and one key generates one loop, so that in a multi-key mode, not only the support of a plurality of hard wires is needed, but also extra cost is needed, the occupied MCU has too many IO (input/output) and the MCU cannot provide the problem of multiple external interrupts.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a single-wire wake-up and key detection circuit, which aims to solve the problems that in the prior art, most of circuits for key detection and circuit wake-up in China directly adopt a hard-wire high-low level identification circuit, and one key generates one loop, so that in a multi-key mode, not only the support of a plurality of hard wires is required, but also extra cost is required, the occupied MCU has too many IO (input/output) and the MCU cannot provide multiple external interrupts.
IN an embodiment of the present invention, a single-wire wake-up and KEY detection circuit is provided, including a single-wire wake-up circuit and a button detection circuit, where the single-wire wake-up circuit is disposed on a motherboard, the button detection circuit is disposed on a keypad, the keypad is connected to the motherboard by a lead, the single-wire wake-up circuit includes a resistor R1 and an excitation voltage Vin, the resistor R1 and the excitation voltage Vin are sequentially connected IN series with each other on a KEY IN line, the button detection circuit includes a first button detection branch circuit composed of a resistor R2 and a tact switch SW1, a second button detection branch circuit composed of a resistor R3 and a tact switch SW2, a third button detection branch circuit composed of a resistor R4 and a tact switch SW3, and a fourth button detection branch circuit composed of a resistor R2 and a tact switch SW4, where the resistor R2 and the tact switch 1 are sequentially connected IN series with each other on a KEY IN line, resistance R3 with it connects IN series each other on KEY IN line IN proper order to touch switch SW2, resistance R4 with it connects IN series on KEY IN line IN proper order to touch switch SW3, resistance R5 with it connects IN series on KEY IN line IN proper order to touch switch SW 4.
Compared with the prior art, the single-wire wake-up and KEY detection circuit comprises a single-wire wake-up circuit and a button detection circuit, wherein the single-wire wake-up circuit is arranged on a mainboard, the button detection circuit is arranged on a KEY board, the KEY board is connected with the mainboard through a lead, the single-wire wake-up circuit comprises a resistor R1 and an excitation voltage Vin, the resistor R1 and the excitation voltage Vin are sequentially connected IN series on a KEY IN wire, the button detection circuit comprises a first button detection branch circuit consisting of a resistor R2 and a light touch switch SW1, a second button detection branch circuit consisting of a resistor R3 and a light touch switch SW2, a third button detection branch circuit consisting of a resistor R4 and a light touch switch SW3 and a fourth button detection branch circuit consisting of a resistor R2 and a light touch switch SW4, so that when the light touch switch is pressed, the corresponding resistor is grounded, therefore, a trigger voltage Vf is generated, and must be less than 80% of VOL, and at this time, the operating mode can be achieved by waking up in an external interrupt manner, so that the single-line wake-up and key detection circuit provided by the embodiment can enable the system to recognize and wake up only by using one loop, thereby not only saving the cost, but also preventing the IO port of the MCU from being occupied due to too many keys.
Drawings
Fig. 1 is a schematic structural diagram of a circuit for single-wire wake-up and key detection provided in this embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the utility model and are not intended to limit the utility model.
The following describes the implementation of the present invention in detail with reference to specific embodiments.
As shown IN fig. 1, IN the embodiment of the present invention, a single-wire wake-up and KEY detection circuit is provided, including a single-wire wake-up circuit and a button detection circuit, where the single-wire wake-up circuit is disposed on a motherboard, the button detection circuit is disposed on a KEY board, the KEY board is connected to the motherboard through a lead, and the KEY board is separated from the motherboard but has a function of one piece, so that the KEY board and the motherboard can also be made together, the single-wire wake-up circuit includes a resistor R1 and an excitation voltage Vin, the resistor R1 and the excitation voltage Vin are sequentially connected IN series to each other on a KEY IN line, the single-wire wake-up circuit is used to provide a KEY detection signal and a detection current, and the button detection circuit includes a first button detection circuit composed of a resistor R2 and a light-touch switch SW1, a second button detection sub-circuit composed of a resistor R3 and a light-touch switch SW2, and a button detection sub-circuit composed of a resistor R2 and a light-touch switch SW2, A third button detection branch circuit composed of a resistor R4 and a tact switch SW3, and a fourth button detection branch circuit composed of a resistor R2 and a tact switch SW4, wherein the resistor R2 and the tact switch SW1 are sequentially connected IN series with each other on the KEY IN line, the resistor R3 and the tact switch SW2 are sequentially connected IN series with each other on the KEY IN line, the resistor R4 and the tact switch SW3 are sequentially connected IN series with each other on the KEY IN line, the resistor R5 and the tact switch SW4 are sequentially connected IN series with each other on the KEY IN line, so that the MCU enters a sleep mode, modules powered by internal power are turned off, the power consumption of the MCU is very low, when the tact switch is pressed, the corresponding resistor is grounded, so that a trigger voltage Vf is generated, the trigger voltage Vf must be less than 80% of VOL, for example, the trigger voltage Vf after the tact switch SW1 is pressed is 0V, Vf after the tact switch SW is pressed is 0.15V 2, in turn, the trigger voltage Vf of the light touch switch SW3 after being pressed is 0.35V, the trigger voltage Vf of the light touch switch SW4 after being pressed is 0.45V, thus, the MCU can recognize the change of the low level from the high level, and can generate the voltage step change, recognize the key number corresponding to the voltage of each key, at this time, through the external interrupt mode, the operating mode can be wakened up, thus, the single line wakening up and key detecting circuit provided by the embodiment can only use one loop, and can allow the system to recognize and wake up, which not only saves the cost, but also the IO port of the MCU cannot be occupied due to too many keys.
It should be noted that, in this embodiment, the level of the general MCU is a CMOS original, so the identification capability of the general low level is between 0V and 0.8V, and the highest low level of 0.8V is queried through the specification, so the trigger voltage is preferably within 0.8V × 80%, so that there is a large margin for the MCU to fully identify the low level voltage, thereby avoiding the malfunction due to the ripple interference of the circuit or the inability to identify the low level.
It should be noted that, in this embodiment, the single-line wake-up and key detection circuit utilizes the principle of low-level trigger wake-up of the MCU, and before the embedded hardware is designed, the voltage capability of the MCU at the low level is identified, and the trigger voltage Vf for wake-up of each tact switch is calculated, so that not only can each tact switch be ensured to normally trigger low-level interrupt, but also the function of each tact switch can be accurately identified.
The working flow of the circuit for single-line awakening and key detection provided in the embodiment is as follows:
(1) the system enters a sleep mode, the corresponding IO port is set to be in a common IO mode at the moment, and the voltage is 3.3V at the moment;
(2) when the IO port detects a voltage lower than 0.8V, a key is pressed, and the MCU is switched from a sleep mode to a working mode;
(3) the IO port is set as an analog IO port and used for sampling the voltage of the key;
(4) the trigger voltage Vf of the soft touch switch SW1 after being pressed is 0V, the trigger voltage Vf of the soft touch switch SW2 after being pressed is 0.15V, the trigger voltage Vf of the soft touch switch SW3 after being pressed is 0.35V, and the trigger voltage Vf of the soft touch switch SW4 after being pressed is 0.45V.
Compared with the prior art, the single-wire wake-up and KEY detection circuit comprises a single-wire wake-up circuit and a button detection circuit, wherein the single-wire wake-up circuit is arranged on a mainboard, the button detection circuit is arranged on a KEY board, the KEY board is connected with the mainboard through a lead, the single-wire wake-up circuit comprises a resistor R1 and an excitation voltage Vin, the resistor R1 and the excitation voltage Vin are sequentially connected IN series on a KEY IN wire, the button detection circuit comprises a first button detection branch circuit consisting of a resistor R2 and a light touch switch SW1, a second button detection branch circuit consisting of a resistor R3 and a light touch switch SW2, a third button detection branch circuit consisting of a resistor R4 and a light touch switch SW3 and a fourth button detection branch circuit consisting of a resistor R2 and a light touch switch SW4, so that when the light touch switch is pressed, the corresponding resistor is grounded, therefore, a trigger voltage Vf is generated, and the trigger voltage Vf must be smaller than 80% of the VOL, and at this time, the working mode can be achieved by waking up in an external interrupt mode, so that the single-line wake-up and key detection circuit provided by the embodiment can be identified and woken up by only using one loop, the cost is saved, and the IO port of the MCU cannot be occupied due to too many keys.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the utility model, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (1)
1. The utility model provides a circuit that single line awakens up and button detection, its characterized IN that, includes single line awakening circuit and button detection circuitry, single line awakening circuit sets up on the mainboard, button detection circuitry sets up on the keypad, the keypad with the mainboard is connected through the lead wire, single line awakening circuit includes resistance R1 and excitation voltage Vin, resistance R1 with excitation voltage Vin connects IN series each other IN the KEY IN line IN proper order, button detection circuitry includes the first button detection branch circuit of constituteing by resistance R2 and light touch switch SW1, the second button detection branch circuit of constituteing by resistance R3 and light touch switch SW2, the third button detection branch circuit of constituteing by resistance R4 and light touch switch SW3 and the fourth button detection branch circuit of constituteing by resistance R2 and light touch switch SW4, wherein, resistance R2 with light touch switch 1 connects IN series each other IN proper order on KEY IN line, the resistor R3 and the tact switch SW2 are sequentially connected IN series on a KEY IN line, the resistor R4 and the tact switch SW3 are sequentially connected IN series on the KEY IN line, and the resistor R5 and the tact switch SW4 are sequentially connected IN series on the KEY IN line.
Priority Applications (1)
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CN202220698538.4U CN216956887U (en) | 2022-03-28 | 2022-03-28 | Single-wire awakening and key detection circuit |
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CN202220698538.4U CN216956887U (en) | 2022-03-28 | 2022-03-28 | Single-wire awakening and key detection circuit |
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CN216956887U true CN216956887U (en) | 2022-07-12 |
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CN202220698538.4U Active CN216956887U (en) | 2022-03-28 | 2022-03-28 | Single-wire awakening and key detection circuit |
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- 2022-03-28 CN CN202220698538.4U patent/CN216956887U/en active Active
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