CN219164296U - Dual-power automatic switching circuit - Google Patents
Dual-power automatic switching circuit Download PDFInfo
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- CN219164296U CN219164296U CN202320036936.4U CN202320036936U CN219164296U CN 219164296 U CN219164296 U CN 219164296U CN 202320036936 U CN202320036936 U CN 202320036936U CN 219164296 U CN219164296 U CN 219164296U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/30—Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S20/00—Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
- Y04S20/20—End-user application control systems
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Abstract
The utility model discloses a dual-power automatic switching circuit which comprises two PMOS (P-channel metal oxide semiconductor) tubes, two NPN triodes, a Schottky diode, six resistors, two capacitors, a DC (direct current) seat and a Battery seat. The dual-power automatic switching circuit effectively reduces the design cost and simultaneously provides a better design scheme for a designer. The dual-power automatic power-switching circuit realizes automatic power switching under the unstable power supply environment through reasonable design, and effectively ensures normal operation of equipment. By changing parameters of components, the switching circuit can be suitable for wide power supply, has lower cost than integrated ICs and has wide application range.
Description
Technical Field
The utility model relates to a switching circuit, in particular to a dual-power automatic switching circuit.
Background
The dual-power automatic switching chip on the market has the following defects:
1. at present, the number of chips automatically switched by double power supplies in the market is small, and the price is high.
2. The current of the dual-power automatic switching chip sold in the market is smaller.
3. The withstand voltage is insufficient.
In view of this, there is a need to develop a circuit that does not require a chip to solve the problem of dual power automatic switching.
Disclosure of Invention
Aiming at the defects in the prior art, the utility model aims to provide the dual-power automatic switching circuit, and the purpose of the circuit is to reduce the cost.
In order to solve the technical problems, the utility model is realized by the following scheme: the utility model relates to a dual-power automatic switching circuit, which comprises:
the DC power supply circuit comprises a J1 interface, a capacitor C1, a diode D1 and a capacitor C2, wherein a pin 1 of the J1 interface is connected with the anode of the diode D1 and one end of the capacitor C1, the cathode of the diode D1 is connected with one end of the capacitor C2 and outputs a first voltage, the other end of the capacitor C1 is grounded, the other end of the capacitor C2 is grounded, and a circuit output by the pin 1 of the J1 interface is a VKK circuit;
the power supply circuit comprises a first PMOS tube Q2 and a second PMOS tube Q3, wherein the S poles of the first PMOS tube Q2 and the second PMOS tube Q3 are connected with each other, the G poles of the first PMOS tube Q2 and the second PMOS tube Q3 are connected with each other, the D pole of the first PMOS tube Q2 is connected with the positive pole of a battery pack J2 interface, the D pole of the second PMOS tube Q3 is connected with a first voltage output by the DC power supply circuit, and the other pin of the battery pack J2 interface is grounded;
one end of the resistor R3 is connected to the S pole of the first PMOS tube Q2, and the other end of the resistor R3 is connected to the G pole of the first PMOS tube Q2;
the first NPN type triode Q1 and the second NPN type triode Q4, wherein the emitter of the first NPN type triode Q1 is grounded, the collector of the first NPN type triode Q1 is connected with a BAT-KBT circuit, the collector of the second NPN type triode Q4 is connected with the G pole of the first PMOS tube Q2, and the emitter of the second NPN type triode Q4 is grounded;
one end of the resistor R1 is connected with the base electrode of the first NPN triode Q1, the other end of the resistor R1 is connected with the VKK circuit of the DC power supply circuit, one end of the resistor R2 is connected with the emitter electrode of the first NPN triode Q1, and the other end of the resistor R2 is connected with the base electrode of the first NPN triode Q1;
the resistor R4, the resistor R5 and the resistor R6, one end of the resistor R4 is connected to the D pole of the first PMOS tube Q2, the other end of the resistor R4 is connected with a BAT-KBT circuit, the BAT-KBT circuit is also connected with the resistor R5, the other end of the resistor R5 is connected to the base electrode of the second NPN triode Q4 and one end of the resistor R6, and the other end of the resistor R6 is grounded.
Further, the diode D1 is a schottky diode.
Further, the type of the first PMOS transistor Q2 is SI2305.
Further, the second PMOS transistor Q3 is of the type SI2305.
Further, the model of the first NPN transistor Q1 is 9014.
Further, the second NPN transistor Q4 has a model number 9014.
Compared with the prior art, the utility model has the beneficial effects that:
1. the circuit of the utility model can realize automatic switching of dual power supplies without a chip.
2. The current is larger than that of a chip with double power supplies automatically switched on the market.
3. The dual-power automatic switching circuit is voltage-resistant.
4. The dual-power automatic power-switching circuit realizes automatic power switching under the unstable power supply environment through reasonable design, and effectively ensures normal operation of equipment. By changing parameters of components, the switching circuit can be suitable for wide power supply, has lower cost than integrated ICs and has wide application range.
Drawings
Fig. 1-3 are connected to form a total diagram of the dual-power automatic switching circuit of the present utility model.
Detailed Description
The technical solutions in the embodiments of the present utility model will be clearly and completely described in the following with reference to the drawings in the embodiments of the present utility model, so that the advantages and features of the present utility model can be more easily understood by those skilled in the art, and thus the protection scope of the present utility model is more clearly and clearly defined. It should be apparent that the described embodiments of the utility model are only some, but not all embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
In addition, the technical features of the different embodiments of the present utility model described below may be combined with each other as long as they do not collide with each other.
Example 1: the specific structure of the utility model is as follows:
referring to fig. 1, the dual-power automatic switching circuit of the present utility model includes:
the DC power supply circuit comprises a J1 interface, a capacitor C1, a diode D1 and a capacitor C2, wherein a pin 1 of the J1 interface is connected with the anode of the diode D1 and one end of the capacitor C1, the cathode of the diode D1 is connected with one end of the capacitor C2 and outputs a first voltage, the other end of the capacitor C1 is grounded, the other end of the capacitor C2 is grounded, and a circuit output by the pin 1 of the J1 interface is a VKK circuit;
the power supply circuit comprises a first PMOS tube Q2 and a second PMOS tube Q3, wherein the S poles of the first PMOS tube Q2 and the second PMOS tube Q3 are connected with each other, the G poles of the first PMOS tube Q2 and the second PMOS tube Q3 are connected with each other, the D pole of the first PMOS tube Q2 is connected with the positive pole of a battery pack J2 interface, the D pole of the second PMOS tube Q3 is connected with a first voltage output by the DC power supply circuit, and the other pin of the battery pack J2 interface is grounded;
one end of the resistor R3 is connected to the S pole of the first PMOS tube Q2, and the other end of the resistor R3 is connected to the G pole of the first PMOS tube Q2;
the first NPN type triode Q1 and the second NPN type triode Q4, wherein the emitter of the first NPN type triode Q1 is grounded, the collector of the first NPN type triode Q1 is connected with a BAT-KBT circuit, the collector of the second NPN type triode Q4 is connected with the G pole of the first PMOS tube Q2, and the emitter of the second NPN type triode Q4 is grounded;
one end of the resistor R1 is connected with the base electrode of the first NPN triode Q1, the other end of the resistor R1 is connected with the VKK circuit of the DC power supply circuit, one end of the resistor R2 is connected with the emitter electrode of the first NPN triode Q1, and the other end of the resistor R2 is connected with the base electrode of the first NPN triode Q1;
the resistor R4, the resistor R5 and the resistor R6, one end of the resistor R4 is connected to the D pole of the first PMOS tube Q2, the other end of the resistor R4 is connected with a BAT-KBT circuit, the BAT-KBT circuit is also connected with the resistor R5, the other end of the resistor R5 is connected to the base electrode of the second NPN triode Q4 and one end of the resistor R6, and the other end of the resistor R6 is grounded.
A preferred technical scheme of the embodiment is as follows: the diode D1 is a schottky diode.
A preferred technical scheme of the embodiment is as follows: the model of the first PMOS tube Q2 is SI2305.
A preferred technical scheme of the embodiment is as follows: the model of the second PMOS tube Q3 is SI2305.
A preferred technical scheme of the embodiment is as follows: the model of the first NPN transistor Q1 is 9014.
A preferred technical scheme of the embodiment is as follows: the model of the second NPN triode Q4 is 9014.
Example 2:
as shown in fig. 1, when DC power is inserted, the voltage at one end of the resistor R1 coincides with the power supply voltage. The voltage of the 1 pin of the first NPN type triode Q1 is 0.7V higher than the voltage of the 2pin of the first NPN type triode Q1, and the first NPN type triode Q1 is conducted at this time. The voltage across the resistor R5 is low, and the voltage of the 1 pin of the second NPN transistor Q4 is not 0.7V higher than the voltage of the 2pin of the second NPN transistor Q4, so the second NPN transistor Q4 is not turned on. At this time, the first PMOS transistor Q2 and the second PMOS transistor Q3 are both in the off state, and the DC power supply supplies power to the device normally through the diode D1.
When DC power is pulled, one end of the resistor R1 has no voltage. The voltage of the 1 pin of the first NPN triode Q1 is not higher than 0.7V than the voltage of the 2pin of the first NPN triode Q1, and the first NPN triode Q1 is not conducted. The voltage of the 1 pin of the second NPN triode Q4 is 0.7V higher than the voltage of the 2pin of the second NPN triode Q4 through a resistor R4 and a resistor R5, so that the second NPN triode Q4 is conducted. At this time, the two PMOS transistors Q2 and Q3 are in the on state, and the Battery supplies power to the device normally.
Example 3:
the specification parameters of the electronic components in the utility model are as follows:
preferably: diode D1 is SS36.
Preferably: capacitance c1=c2=4.7 uF.
Preferably: resistor r5=10k, resistor r6=20k, resistor r3=resistor r4=47K, and resistor r1=r2=1m.
Preferably: the DC seat J1 is a DC-005 type DC seat.
Preferably: the Battery seat j2=2pin 2.0mm.
In conclusion, the automatic double-power-supply switching circuit realizes automatic switching of power supply under the unstable power supply environment through reasonable design, and effectively ensures normal operation of equipment. By changing parameters of components, the switching circuit can be suitable for wide power supply, has lower cost than integrated ICs and has wide application range.
The foregoing description is only of the preferred embodiments of the present utility model and is not intended to limit the scope of the utility model, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present utility model or directly or indirectly applied to other related technical fields are included in the scope of the utility model.
Claims (6)
1. A dual-power automatic switching circuit, comprising:
the DC power supply circuit comprises a J1 interface, a capacitor C1, a diode D1 and a capacitor C2, wherein a pin 1 of the J1 interface is connected with the anode of the diode D1 and one end of the capacitor C1, the cathode of the diode D1 is connected with one end of the capacitor C2 and outputs a first voltage, the other end of the capacitor C1 is grounded, the other end of the capacitor C2 is grounded, and a circuit output by the pin 1 of the J1 interface is a VKK circuit;
the power supply circuit comprises a first PMOS tube Q2 and a second PMOS tube Q3, wherein the S poles of the first PMOS tube Q2 and the second PMOS tube Q3 are connected with each other, the G poles of the first PMOS tube Q2 and the second PMOS tube Q3 are connected with each other, the D pole of the first PMOS tube Q2 is connected with the positive pole of a battery pack J2 interface, the D pole of the second PMOS tube Q3 is connected with a first voltage output by the DC power supply circuit, and the other pin of the battery pack J2 interface is grounded;
one end of the resistor R3 is connected to the S pole of the first PMOS tube Q2, and the other end of the resistor R3 is connected to the G pole of the first PMOS tube Q2;
the first NPN type triode Q1 and the second NPN type triode Q4, wherein the emitter of the first NPN type triode Q1 is grounded, the collector of the first NPN type triode Q1 is connected with a BAT-KBT circuit, the collector of the second NPN type triode Q4 is connected with the G pole of the first PMOS tube Q2, and the emitter of the second NPN type triode Q4 is grounded;
one end of the resistor R1 is connected with the base electrode of the first NPN triode Q1, the other end of the resistor R1 is connected with the VKK circuit of the DC power supply circuit, one end of the resistor R2 is connected with the emitter electrode of the first NPN triode Q1, and the other end of the resistor R2 is connected with the base electrode of the first NPN triode Q1;
the resistor R4, the resistor R5 and the resistor R6, one end of the resistor R4 is connected to the D pole of the first PMOS tube Q2, the other end of the resistor R4 is connected with a BAT-KBT circuit, the BAT-KBT circuit is also connected with the resistor R5, the other end of the resistor R5 is connected to the base electrode of the second NPN triode Q4 and one end of the resistor R6, and the other end of the resistor R6 is grounded.
2. The dual power automatic switching circuit of claim 1, wherein the diode D1 is a schottky diode.
3. The dual power automatic switching circuit of claim 1, wherein the first PMOS transistor Q2 is of type SI2305.
4. The dual power automatic switching circuit of claim 1, wherein the second PMOS transistor Q3 is of type SI2305.
5. The dual power automatic switching circuit of claim 1, wherein the first NPN transistor Q1 has a model number of 9014.
6. The dual power automatic switching circuit of claim 1, wherein the second NPN transistor Q4 is model 9014.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320036936.4U CN219164296U (en) | 2023-01-07 | 2023-01-07 | Dual-power automatic switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320036936.4U CN219164296U (en) | 2023-01-07 | 2023-01-07 | Dual-power automatic switching circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219164296U true CN219164296U (en) | 2023-06-09 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320036936.4U Active CN219164296U (en) | 2023-01-07 | 2023-01-07 | Dual-power automatic switching circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219164296U (en) |
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2023
- 2023-01-07 CN CN202320036936.4U patent/CN219164296U/en active Active
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