CN219143036U

CN219143036U - General chip signal analysis test fixture

Info

Publication number: CN219143036U
Application number: CN202223599572.5U
Authority: CN
Inventors: 陶杉; 段超毅; 蒋伟; 周闯
Original assignee: Shenzhen Kzt Microelectronics Technology Co ltd
Current assignee: Shenzhen Kzt Microelectronics Technology Co ltd
Priority date: 2022-12-27
Filing date: 2022-12-27
Publication date: 2023-06-06
Anticipated expiration: 2032-12-27

Abstract

The utility model discloses a universal chip signal analysis test fixture, which comprises a ball clamping test seat and a signal analysis adapter plate, wherein the ball clamping test seat is arranged on the ball clamping test seat; the ball clamping test seat is used for being connected and conducted with the chip, the top of the spring piece of the ball clamping test seat is clamped and conducted with the chip tin ball, and the bottom pins are correspondingly welded and conducted with the bonding pads of the signal analysis adapter plate one by one; the signal analysis adapter plate can be connected with the test seat Pin To Pin Tob surface in a one-To-one corresponding welding pad welding mode according To the thickness of any thickness between 0.1mm and 2.0mm required by chip signals, a plurality of required signal test points are arranged on the signal analysis adapter plate or at the edge of the plate, and the plurality of test points are used for leading out signals of the chip. The general chip signal analysis test fixture can solve the technical problems that the chip signal analysis fixture in the prior art cannot restore the real working state and universality of a chip, and the test results such as large signal attenuation are inaccurate.

Description

General chip signal analysis test fixture

Technical Field

The utility model relates to the technical field of test jigs, in particular to a universal chip signal analysis test jig.

Background

Along with wider and wider application of chip/function modularization in electronic products and higher running/transmission speed, an electronic product is formed by various chip/function module combinations and various components on a PCBA, and the mutual coordination operation is particularly important, for example, the overall stability of the electronic product is influenced even as a defective product because one chip/module has a quality hidden trouble or a matched PCB Layout problem; the chip/functional modules used in the electronic product are all tested relatively and independently on the respective platforms, various problems are inevitably caused in the processes of sample research and development, trial production and the like when the integrated electronic product is formed by combining the integrated electronic product through the PCB, the signals of the real-time working conditions of the chip/functional modules and various electronic components are required to be analyzed and measured for the point of quick positioning, corresponding signal line test points cannot be reserved for measurement due to the space requirement of the electronic product and other reasons, the POGO probe and SOCKET conversion plate are required to be correspondingly analyzed, the adapter plate is fixed or welded according to the corresponding PCBA, and other parts adjacent to the mounting position of the chip on the PCBA plate are required to be avoided, so that the adapter plate is usually thicker to avoid other structures. However, in the process of testing the chip by adopting the testing jig, the signal is attenuated in the transmission process due to the influence of the thickness of the adapter plate, the real working state of the chip cannot be restored, and the testing result is inaccurate.

Disclosure of Invention

The utility model mainly aims to provide a general chip signal analysis test fixture, and aims to solve the technical problems that a chip test fixture in the prior art cannot restore the real working state of a chip and the test result is inaccurate.

In order to achieve the above purpose, the utility model provides a universal chip signal analysis test fixture, which comprises a ball clamping test seat and a signal analysis adapter plate; the ball clamping test seat is used for being electrically connected with the chip; the signal analysis adapter plate is electrically connected with the ball clamping test seat, a plurality of test points are arranged on the signal analysis adapter plate, and the test points are used for leading out signals of the chip.

In an embodiment, the signal analysis adapter plate is formed with a mounting area for mounting the ball clamping test seat, and the plurality of test points are arranged on the outer side of the mounting area.

In an embodiment, the signal analysis adapter plate is provided with a front surface and a back surface which are oppositely arranged, the front surface is provided with a first bonding pad, the back surface is provided with a second bonding pad, wherein the first bonding pad is communicated with the ball clamping test seat, and the second bonding pad is communicated with the signal analysis adapter plate.

In an embodiment, the plurality of test points are respectively connected with the plurality of first pads.

In one embodiment, the thickness of the signal analysis patch panel is 0.1mm-2.0mm.

In an embodiment, the universal chip signal analysis test fixture further comprises a limiting frame, wherein the limiting frame is sleeved on the ball clamping test seat and used for limiting the chip.

In an embodiment, the limiting frame is provided with a sinking groove and a mounting hole formed in the bottom of the sinking groove, the sinking groove is used for placing the chip, and the ball clamping test seat is mounted in the mounting hole.

In an embodiment, the side wall of the mounting hole is provided with a bump, and the ball clamping test seat is provided with a chute in sliding fit with the bump.

In an embodiment, the side wall of the mounting hole is further provided with a limiting block, and the ball clamping test seat is provided with a limiting groove in limiting fit with the limiting block.

The utility model relates to a universal chip signal analysis test fixture which comprises a ball clamping test seat and a signal analysis adapter plate; the ball clamping test seat is used for being connected and conducted with the chip, the top of the spring piece of the ball clamping test seat is clamped and conducted with the chip tin ball, and the bottom pins are correspondingly welded and conducted with the bonding pads of the signal analysis adapter plate one by one; the signal analysis adapter plate can be made To have any thickness between 2.0mm and 0.1mm according To the signal requirement of the chip, is connected and conducted with the pads corresponding To the To Pin Tob surfaces of the test seats in a one-To-one correspondence manner, and a plurality of required signal test points are arranged on the signal analysis adapter plate or at the edge of the plate and used for leading out the signals of the chip. Therefore, the chip is placed on the ball clamping test seat for testing, the signal line of the chip is turned out through the signal analysis adapter plate to be connected with other equipment so as to analyze the signal of the chip, the chip analysis and test functions can be realized, meanwhile, the signal analysis adapter plate and the ball clamping test seat do not need to avoid the positions of other structures adjacent to the mounting position of the chip, and the thicknesses of the signal analysis adapter plate and the ball clamping test seat can be made thinner, so that the signal is prevented from being attenuated in the transmission process, and the real working state of the chip can be accurately restored.

Drawings

In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a general chip signal analysis test fixture according to an embodiment of the utility model;

FIG. 2 is a schematic diagram of the structure of FIG. 1 with test boards removed;

FIG. 3 is an enlarged view of FIG. 2 at A;

FIG. 4 is a schematic diagram of the structure of FIG. 2 from another perspective;

FIG. 5 is a cross-sectional view of the assembled universal chip signal analysis test fixture of FIG. 1;

FIG. 6 is an enlarged view at B in FIG. 5;

fig. 7 is a schematic structural diagram of another embodiment of the universal chip signal analysis test fixture of the present utility model.

Reference numerals illustrate:

reference numerals	Name of the name	Reference numerals	Name of the name
				100	Ball clamping test seat	300	Chip
110	Sliding chute	400	Spacing frame
				120	Limiting groove	410	Sink groove
200	Signal analysis adapter plate	420	Mounting hole
				210	Test point	421	Bump block
220	Mounting area	422	Limiting block
				230	First bonding pad	500	Test board
240	First test point group	510	Second bonding pad
				250	Second test point set	600	Ball clamping spring piece

The achievement of the objects, functional features and advantages of the present utility model will be further described with reference to the accompanying drawings in conjunction with the embodiments.

Detailed Description

The following description of the embodiments of the present utility model will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

It should be noted that, if directional indications (such as up, down, left, right, front, and rear … …) are included in the embodiments of the present utility model, the directional indications are merely used to explain the relative positional relationship, movement conditions, etc. between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are correspondingly changed.

In addition, if there is a description of "first", "second", etc. in the embodiments of the present utility model, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, if the meaning of "and/or" is presented throughout this document, it is intended to include three schemes in parallel, taking "a and/or B" as an example, including a scheme, or B scheme, or a scheme where a and B meet simultaneously. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present utility model.

The utility model provides an embodiment of a universal chip signal analysis and test jig, which can analyze and test chips, has wide application range and strong universality, and can accurately restore the real working state of the chips.

Referring to fig. 1 to 6, in an embodiment of the utility model, the universal chip signal analysis test fixture includes a ball clamping test socket 100 and a signal analysis adapter board 200; the ball clamping test socket 100 is used for being electrically connected with the chip 300; the signal analysis adapter plate 200 is electrically connected to the ball clamping test socket 100, and a plurality of test points 210 are disposed on the signal analysis adapter plate 200, where the plurality of test points 210 are used for leading out signals of the chip 300.

Specifically, the ball clamping test socket 100 is substantially square, and the shape of the ball clamping test socket 100 is adapted to the shape of the chip to be tested. A plurality of ball clamping elastic sheets 600 are arranged in the ball clamping test seat 100, and one ends of the ball clamping elastic sheets 600 are used for clamping solder balls of the chip so as to realize the electric connection between the ball clamping test seat 100 and the chip; the other end of the ball clamping spring 600 is electrically connected with the signal analysis adapter plate 200, and the ball clamping spring can be electrically connected with the signal analysis adapter plate 200 in a welding manner, so that the welding stability is higher.

In general, after a chip is placed on the ball clamping test socket 100, signals of the chip need to be analyzed by a test board 500, the test board 500 is a test board 500 in a test apparatus, the test board 500 is electrically connected to the signal analysis interposer 200, and the test board 500 is electrically connected to the chip 300 through the signal analysis interposer 200 and the ball clamping test socket 100, so that the chip can be tested by the test board 500. The universal chip signal analysis test fixture is suitable for the test board 500 of any test equipment and has strong universality.

A plurality of test points 210 are disposed on the signal analysis adapter 200, the plurality of test points 210 are electrically connected with the chip through the ball clamping test socket 100, and the test points 210 can transfer out corresponding signals of the chip to be tested, so as to analyze the chip through external equipment. Conventional test equipment generally has only a function of testing a chip, and does not have an analysis function. The universal chip signal analysis test fixture can realize the analysis function of the chip 300 through the signal analysis adapter plate 200.

When the chip 300 needs to be tested, the chip 300 is placed on the ball clamping test seat 100, and a plurality of solder balls are disposed on the chip 300 and are connected with one end of the ball clamping elastic sheet 600 in the ball clamping test seat 100 far away from the signal analysis adapter plate 200, so that signals in the chip 300 can be transmitted to the test plate 500 for testing through the ball clamping test seat 100 and the signal analysis adapter plate 200. In addition, the signal analysis adapter plate 200 is directly electrically connected with the test plate 500, circuit wiring is reduced, attenuation and interference generated by the length of the circuit wiring to signals are reduced, anti-interference performance is good, the size of the signal analysis adapter plate 200 and the size of the ball clamping test seat 100 are matched with the size of a chip, so that the signal analysis adapter plate 200 and the ball clamping test seat 100 do not need to avoid positions of other structures adjacent to the mounting position of the chip, the thicknesses of the signal analysis adapter plate 200 and the ball clamping test seat 100 can be made thinner, attenuation of signals in the transmission process is avoided, the real working state of the chip can be restored, and the test result is accurate.

The universal chip signal analysis test fixture comprises a ball clamping test seat 100 and a signal analysis adapter plate 200; the ball clamping test socket 100 is used for being electrically connected with the chip 300; the signal analysis adapter plate 200 is electrically connected to the ball clamping test socket 100, and a plurality of test points 210 are disposed on the signal analysis adapter plate 200, where the plurality of test points 210 are used for leading out signals of the chip 300. In this way, the chip 300 is placed on the ball clamping test seat 100 for testing, the signal wires of the chip 300 are turned out by the signal analysis adapter plate 200 for connection with other devices so as to analyze the signals of the chip 300, so that the analysis and test functions of the chip can be realized, meanwhile, the signal analysis adapter plate 200 and the ball clamping test seat 100 do not need to avoid the positions of other structures adjacent to the mounting position of the chip, the thicknesses of the signal analysis adapter plate 200 and the ball clamping test seat 100 can be made thinner, and therefore, the signal is prevented from being attenuated in the transmission process, and the real working state of the chip can be accurately restored.

Referring to fig. 1 and 2, in an embodiment, the signal analysis interposer 200 is formed with a mounting region 220 for mounting the ball clamping socket 100, and the plurality of test points 210 are disposed outside the mounting region 220. Specifically, the length and width of the signal analysis adapter plate 200 are both greater than those of the ball clamping test socket 100, the signal analysis adapter plate 200 is formed with a mounting area 220 for mounting the ball clamping test socket 100, a plurality of first bonding pads 230 are disposed in the mounting area 220, and the ball clamping spring 600 in the ball clamping test socket 100 is welded to the plurality of first bonding pads 230 by welding. The other end of the ball clamping spring 600 in the ball clamping test seat 100 is electrically connected with a chip to be tested, and a signal wire of the chip can be rotated out through the signal analysis adapter plate 200 and is connected with external analysis equipment to analyze the chip. The plurality of test points 210 may be located on the same side outside the mounting region 220, may be located on opposite sides outside the mounting region 220, and may be located on adjacent sides outside the mounting region 220, which is not particularly limited.

Further, the signal analysis interposer 200 is provided with a plurality of first pads 230, the test board 500 is provided with a plurality of second pads 510, and the plurality of first pads 230 are connected with the plurality of second pads 510 in a one-to-one correspondence. Specifically, the signal analysis interposer 200 has opposite upper and lower surfaces, and the plurality of first pads 230 are disposed on the upper and lower surfaces in a vertically penetrating manner. The plurality of second bonding pads 510 on the test board 500 and the plurality of first bonding pads 230 on the signal analysis interposer 200 are bonded together in a one-to-one correspondence, and the bonding manner can ensure the connection stability of the signal analysis interposer 200 and the test board 500.

In one embodiment, at least one of the test points 210 of the plurality of test points 210 is electrically connected (not shown) to at least one of the first pads 230 of the plurality of first pads 230. Specifically, in this embodiment, the number of solder balls of the chip is 153, and the number of ball clamping spring 600, the first bonding pad 230, and the second bonding pad 510 are 153. At least one of the plurality of test points 210 is connected with one first pad 230 of the 153 first pads 230 through the internal wiring of the signal analysis interposer 200 to analyze the chip corresponding signal.

Referring to fig. 1, 2 and 7, in an embodiment, the plurality of test points 210 includes a first test point set 240 and a second test point set 250, the second test point set 250 is disposed at an edge of the signal analysis patch panel 200, and the first test point set 240 and the second test point set 250 are electrically connected. The arrangement is convenient for the external analysis equipment to be connected with the test points 210, and meanwhile, avoidance is also carried out for the connection wiring of the plurality of test points 210 and the plurality of first bonding pads 230. Further, the first test point set 240 includes a plurality of rows of test points 210 arranged in a staggered manner.

Referring to fig. 6, in an embodiment, one end of the ball clamping spring 600 is welded to the signal analysis adapter board 200, and the other end is clamped to the solder ball of the chip. Specifically, one end of the ball clamping elastic sheet 600 is welded with the signal analysis adapter plate 200, so that the connection stability between the ball clamping test seat 100 and the signal analysis adapter plate 200 can be enhanced, and the other end of the ball clamping elastic sheet 600 is clamped with the solder ball of the chip to be tested, so that the chip can be conveniently taken. Of course, in other embodiments, the other end of the ball clamping spring 600 may be soldered to the solder ball of the chip to be tested, which is not limited in particular.

It should be noted that the thickness of the signal analysis patch panel 200 is 0.1mm-2.0mm. Compared with the traditional signal analysis test jig, the thickness of the signal analysis adapter plate 200 in the universal chip signal analysis test jig can be made thinner, so that signal attenuation of signals in the transmission process can be reduced, and the real working state of the chip can be accurately restored.

Referring to fig. 1 to 6, in an embodiment, the universal chip signal analysis test fixture further includes a limit frame 400, the limit frame 400 is sleeved on the ball clamping test seat 100, and the limit frame 400 is used for placing the chip. Specifically, in order to ensure that the chip is not shifted after being connected to the ball clamping test seat 100, the chip may be placed in the limiting frame 400 and connected to the ball clamping test seat 100 by sleeving the limiting frame 400 on the ball clamping test seat 100, so as to avoid the above problem.

Further, the limit frame 400 has a sinking groove 410 and a mounting hole 420 formed at the bottom of the sinking groove 410, the sinking groove 410 is used for placing the chip, and the ball clamping test seat 100 is mounted in the mounting hole 420. Specifically, the size and shape of the sinking groove 410 are adapted to the shape and size of the chip, the bottom of the sinking groove 410 is provided with a mounting hole 420, and the mounting hole 420 is a mounting through hole for mounting the ball clamping test seat 100. The chip is placed into the sinking groove 410 from top to bottom, and the ball clamping test socket 100 is mounted into the mounting hole 420 from bottom to top. When the chip is analyzed and tested, the chip is placed in the sinking groove 410, and the solder balls on the lower surface of the chip are clamped with the ball clamping spring plate 600, so that the electric connection is realized.

Referring to fig. 2 to 4, in an embodiment, a protrusion 421 is disposed on a sidewall of the mounting hole 420, and the ball clamping test socket 100 is provided with a sliding slot 110 slidably engaged with the protrusion 421. Specifically, when the ball clamping test seat 100 is installed in the installation hole 420, the ball clamping test seat 100 can slide into the installation hole 420 through the cooperation of the sliding groove 110 and the protruding block 421, and the cooperation of the protruding block 421 and the sliding groove 110 also plays a role in guiding and limiting the ball clamping test seat 100.

Further, a limiting block 422 is further provided on the side wall of the mounting hole 420, and the ball clamping test seat 100 is provided with a limiting groove 120 in limiting fit with the limiting block 422. Specifically, the limiting block 422 is configured to limit the position of the ball clamping test seat 100 in the mounting hole 420, and the ball clamping test seat 100 is provided with a limiting groove 120, and when the ball clamping test seat 100 is mounted in the mounting hole 420, the limiting block 422 plays a limiting role in sliding of the ball clamping test seat 100. When the ball clamping test socket 100 is completely installed in the installation hole 420, the limiting block 422 is located in the limiting groove 120.

The foregoing description is only of the optional embodiments of the present utility model, and is not intended to limit the scope of the utility model, and all the equivalent structural changes made by the description of the present utility model and the accompanying drawings or the direct/indirect application in other related technical fields are included in the scope of the utility model.

Claims

1. The utility model provides a general chip signal analysis test tool which characterized in that, general chip signal analysis test tool includes:

the ball clamping test seat (100) is used for being electrically connected with the chip (300); and

the signal analysis adapter plate (200) is electrically connected with the ball clamping test seat (100), a plurality of test points (210) are arranged on the signal analysis adapter plate (200), and the test points (210) are used for leading out signals of the chip (300).

2. The universal chip signal analysis test fixture according to claim 1, wherein the signal analysis adapter plate (200) is formed with a mounting area (220) for mounting the ball clamping test socket (100), and the plurality of test points (210) are disposed outside the mounting area (220).

3. The universal chip signal analysis test fixture according to claim 2, wherein the signal analysis interposer (200) has a front side and a back side disposed opposite to each other, the front side being provided with a first bonding pad, the back side being provided with a second bonding pad, wherein the first bonding pad is in communication with the ball clamping test socket (100), and the second bonding pad is in communication with the signal analysis interposer (200).

4. A universal chip signal analysis test fixture according to claim 3, wherein said plurality of test points (210) are respectively connected to said plurality of first pads (230).

5. The universal chip signal analysis test fixture according to claim 1, wherein the thickness of the signal analysis adapter plate (200) is 0.1mm-2.0mm.

6. The universal chip signal analysis test fixture according to claim 1, further comprising a limiting frame (400), wherein the limiting frame (400) is sleeved on the ball clamping test seat (100), and the limiting frame (400) is used for limiting the chip (300).

7. The universal chip signal analysis test fixture according to claim 6, wherein the limit frame (400) is provided with a sinking groove (410) and a mounting hole (420) formed in the bottom of the sinking groove (410), the sinking groove (410) is used for placing the chip (300), and the ball clamping test seat (100) is mounted in the mounting hole (420).

8. The universal chip signal analysis test fixture according to claim 7, wherein the side wall of the mounting hole (420) is provided with a bump (421), and the ball clamping test seat (100) is provided with a chute (110) in sliding fit with the bump (421).

9. The universal chip signal analysis test fixture according to claim 8, wherein a limiting block (422) is further arranged on the side wall of the mounting hole (420), and the ball clamping test seat (100) is provided with a limiting groove (120) in limiting fit with the limiting block (422).