CN219106163U - IBC solar cell, battery pack and photovoltaic system - Google Patents
IBC solar cell, battery pack and photovoltaic system Download PDFInfo
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Abstract
The utility model belongs to the technical field of solar cells, and particularly relates to an IBC solar cell, a cell assembly and a photovoltaic system, wherein the IBC solar cell comprises the following components: a monocrystalline silicon substrate; the passivation film is arranged on the front surface of the monocrystalline silicon substrate; the positive electrode part comprises a first tunneling layer, a p+ polysilicon layer, a first transparent conductive layer and a first metal electrode which are sequentially laminated; the negative electrode part comprises a second tunneling layer, an n+ polycrystalline silicon layer, a second transparent conducting layer and a second metal electrode which are sequentially laminated; and a separator portion that is located between the negative electrode portion and the positive electrode portion and electrically insulates therebetween. The metal electrode is not in direct contact with the polysilicon layer, and carriers can be normally transmitted through the transparent conductive layer, so that metal recombination can be avoided, and the passivation effect of the monocrystalline silicon substrate is greatly improved; the positive electrode part and the negative electrode part are respectively provided with a p+ polycrystalline silicon layer and an n+ polycrystalline silicon layer, and the passivation performance of the monocrystalline silicon substrate and the conversion efficiency of the battery are also greatly improved.
Description
Technical Field
The utility model belongs to the technical field of solar cells, and particularly relates to an IBC solar cell, a cell assembly and a photovoltaic system.
Background
The IBC battery is an interdigital back contact battery, and is a novel structure battery, the front surface of which is free from any electrode shielding, and an emitter electrode and a base electrode (namely positive and negative electrodes) are both designed on the back surface of the battery. The IBC battery structure in the prior art, as shown in fig. 1, is sequentially a front passivation film 01, a monocrystalline silicon wafer 02, a heavily doped layer 03, a tunneling layer 04, a doped polysilicon layer 05, a rear passivation layer 06, a metal electrode a and a metal electrode B from top to bottom. Wherein the metal electrode is in direct contact with the heavily doped layer 03 or in direct contact with the doped polysilicon layer 05. The metal electrode and silicon are in direct contact, so that metal recombination is large, and the passivation effect of the silicon wafer can be greatly reduced.
In addition, the passivation effect of the heavily doped layer/the post passivation layer is not as good as that of the tunneling layer/the doped polysilicon layer/the post passivation layer, so that the overall passivation effect of the whole battery is poor, and the conversion efficiency is difficult to improve.
Therefore, a new technology is needed to solve the problems of large metal recombination, poor passivation effect of the whole battery and difficult improvement of the conversion efficiency in the prior art.
Disclosure of Invention
The embodiment of the utility model provides an IBC solar cell, a cell assembly and a photovoltaic system, which aim to solve the problems of large metal recombination, poor passivation effect of the whole cell and difficult improvement of conversion efficiency in the prior art.
The embodiment of the utility model is realized as follows:
an IBC solar cell comprising:
a monocrystalline silicon substrate;
the passivation film is arranged on the front surface of the monocrystalline silicon substrate;
the positive electrode part is positioned on the back surface of the monocrystalline silicon substrate and comprises a first tunneling layer, a p+ polycrystalline silicon layer, a first transparent conducting layer and a first metal electrode which are sequentially stacked along the direction away from the back surface of the monocrystalline silicon substrate;
the negative electrode part is positioned on the back surface of the monocrystalline silicon substrate and comprises a second tunneling layer, an n+ polycrystalline silicon layer, a second transparent conducting layer and a second metal electrode which are sequentially stacked along the direction away from the back surface of the monocrystalline silicon substrate; and
and a separator portion that is located between the negative electrode portion and the positive electrode portion and electrically insulates the negative electrode portion from the positive electrode portion.
Further, the light transmittance of the first transparent conductive layer and the second transparent conductive layer is 90% -98%.
Further, the resistivity of the first transparent conductive layer and/or the second transparent conductive layer is E-5Ω -cm to E-6Ω -cm.
Further, the first transparent conductive layer and/or the second transparent conductive layer is a zinc oxide layer, a tin oxide layer or a tin-doped indium oxide layer.
Further, the thickness of the first transparent conductive layer and/or the second transparent conductive layer is 50 mm-200 mm.
Further, the isolation portion is an isolation groove, and the width of the isolation groove is 3 μm to 5 μm.
Further, the first tunneling layer and/or the second tunneling layerThe tunneling layer is SiO x The thickness of the layer is 1 nm-2 nm.
Further, the thickness of the p+ polysilicon layer is 100 nm-300 nm, and the surface B atomic concentration of the p+ polysilicon layer is E+20 atoms/cm 3 5 x E+21/cm 3 。
Further, the thickness of the n+ polysilicon layer is 100 nm-300 nm, and the surface P atomic concentration of the n+ polysilicon layer is E+20/cm 3 E+21/cm 3 。
Further, the monocrystalline silicon substrate is a P-type monocrystalline silicon wafer;
the passivation film is AlO x The film or the passivation film is SiN x And (3) a film.
Further, the resistivity of the P-type monocrystalline silicon piece is 1 to 3 omega cm, and the thickness is 100 to 180 mu m;
the AlO is x The thickness of the film is 5 nm-15 nm;
the SiN x The thickness of the film is 70 nm-95 nm.
Further, the monocrystalline silicon substrate is an N-type monocrystalline silicon wafer;
the passivation film is SiO x The film or the passivation film is SiN x And (3) a film.
Further, the resistivity of the N-type monocrystalline silicon piece is 2 to 10 omega cm, and the thickness is 100 to 160 mu m;
the SiO is x The thickness of the film is 10 nm-30 nm;
the SiN x The thickness of the film is 50 nm-90 nm.
The utility model also provides a battery assembly comprising the IBC solar cell.
The utility model also provides a photovoltaic system comprising the battery assembly.
The beneficial effects achieved by the utility model are as follows:
in the IBC solar cell, in the positive electrode part and the negative electrode part, the transparent conductive layers are adopted to separate the metal electrode (namely the first metal electrode and the second metal electrode) from the polysilicon layer (namely the p+ polysilicon layer and the n+ polysilicon layer), and the metal electrode and the polysilicon layer can normally transmit carriers through the transparent conductive layers, but the metal electrode and the polysilicon layer are not in direct contact, so that metal recombination can be avoided, and the passivation effect of a monocrystalline silicon substrate can be greatly improved; in addition, the p+ polysilicon layer and the n+ polysilicon layer are respectively arranged at the positive electrode part and the negative electrode part, so that the passivation performance of the monocrystalline silicon substrate is greatly improved. The two are overlapped, so that the conversion efficiency of the battery can be greatly improved.
Drawings
Fig. 1 is a schematic structural view of an IBC battery provided in the prior art;
fig. 2 is a schematic structural diagram of an IBC solar cell according to a second embodiment of the present utility model;
fig. 3 is a schematic structural diagram of an IBC solar cell according to a third embodiment of the present utility model;
reference numerals:
1-a monocrystalline silicon substrate; 11-P type monocrystalline silicon piece; 12-N type monocrystalline silicon piece;
2-passivation film;
3-positive electrode part; 31-a first tunneling layer; a 32-p+ polysilicon layer; 33-a first transparent conductive layer; 34-a first metal electrode;
4-a negative electrode portion; 41-a second tunneling layer; 42-n+ polysilicon layer; 43-a second transparent conductive layer; 44-a second metal electrode;
5-isolation part;
01-a front passivation film; 02-monocrystalline silicon piece; 03-a heavily doped layer; 04-tunneling layer; 05-a doped polysilicon layer; 06-a post passivation layer; a-a metal electrode; b-metal electrode.
Detailed Description
The present utility model will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present utility model more apparent. Examples of the embodiments are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements throughout or elements having like or similar functionality. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the utility model. Furthermore, it should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the present utility model.
In the description of the present utility model, it should be understood that the terms "length," "width," "upper," "lower," "left," "right," "horizontal," "top," "bottom," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the description of the present utility model, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present utility model, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.
The following disclosure provides many different embodiments, or examples, for implementing different structures of the utility model. In order to simplify the present disclosure, components and arrangements of specific examples are described below. They are, of course, merely examples and are not intended to limit the utility model. Furthermore, the present utility model may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present utility model provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the application of other processes and/or the use of other materials.
In the IBC solar cell, the transparent conductive layer is adopted to separate the metal electrode from the polycrystalline silicon layer, and the metal electrode and the polycrystalline silicon layer can normally transmit carriers through the transparent conductive layer, but the metal electrode and the polycrystalline silicon layer are not in direct contact, so that metal recombination is avoided, and the passivation effect of the monocrystalline silicon substrate 1 can be greatly improved; in addition, the p+ polysilicon layer and the n+ polysilicon layer are respectively arranged at the positive electrode part 3 and the negative electrode part 4, so that the passivation effect of the monocrystalline silicon substrate 1 is greatly improved. The two are overlapped, so that the conversion efficiency of the battery can be greatly improved.
Example 1
Referring to fig. 2 and 3, the present embodiment provides an IBC solar cell including single crystal silicon, a substrate, a passivation film 2, a positive electrode part 3, a negative electrode part 4, and a separator 5.
Wherein the passivation film 2 is disposed on the front surface of the monocrystalline silicon substrate 1, and the positive electrode portion 3 and the negative electrode portion 4 are both disposed on the back surface of the monocrystalline silicon substrate 1.
Referring to fig. 2 and 3, the positive electrode portion 3 is located on the back surface of the single crystal silicon substrate 1, the positive electrode portion 3 includes a first tunneling layer 31, a p+ polysilicon layer 32, a first transparent conductive layer 33, and a first metal electrode 34, which are sequentially stacked in a direction away from the back surface of the single crystal silicon substrate 1, and the first tunneling layer 31 is located on the back surface of the single crystal silicon substrate 1. These structural laminated layers are arranged, and here, the p+ polysilicon layer 32 and the first metal electrode 34 are separated by the first transparent conductive layer 33 and are not in direct contact, so that metal recombination can be avoided, and the passivation effect on the monocrystalline silicon substrate 1 is greatly improved. And since the first transparent conductive layer 33 is conductive, the first metal electrode 34 and the p+ polysilicon layer 32 can normally transport carriers through the transparent conductive layer.
Similarly, referring to fig. 2 and 3, the negative electrode part 4 is also located on the back surface of the single crystal silicon substrate 1, and the negative electrode part 4 includes a second tunneling layer 41, an n+ polysilicon layer 42, a second transparent conductive layer 43, and a second metal electrode 44, which are sequentially disposed. Similarly, the n+ polysilicon layer 42 and the second metal electrode 44 are separated by the second transparent conductive layer 43 and are not in direct contact, so that metal recombination can be avoided, and the passivation effect on the monocrystalline silicon substrate 1 is greatly improved. And since the second transparent conductive layer 43 is conductive, the second metal electrode 44 and the p+ polysilicon layer 32 can normally transport carriers through the transparent conductive layer.
Referring to fig. 2 and 3, the separator 5 is located between the negative electrode part 4 and the positive electrode part 3, and electrically insulates the negative electrode part 4 from the positive electrode part 3, and the positive electrode part 3 and the negative electrode part 4 are physically separated and insulated by the separator 5, so that the occurrence of short circuit between the two parts is avoided, and the normal operation of the IBC solar cell is ensured. The isolation portion 5 may be an isolation groove having a width of 3 μm to 5 μm. In the present embodiment, the width of the spacer 5 is 4 μm.
In practical applications, the first tunneling layer 31 and the second tunneling layer 41 may be the same layer initially, but the isolation portion 5 is processed in subsequent production to separate one tunneling layer from the first tunneling layer 31 and the second tunneling layer 41. Similarly, the first transparent conductive layer 33 and the second transparent conductive layer 43 may be the same layer at first, but the spacer 5 is processed in subsequent production to separate one transparent conductive layer from the first transparent conductive layer 33 and the second transparent conductive layer 43.
Of course, two separate first tunneling layers 31 and second tunneling layers 41 may be directly formed during the initial manufacturing process. Similarly, two separate first transparent conductive layers 33 and second transparent conductive layers 43 may be directly formed during the initial manufacturing process.
In the present embodiment, at the beginning of production, there is only one tunneling layer and one transparent conductive layer on the back surface of the single crystal silicon substrate 1, but in the subsequent production, a spacer 5 (i.e., a spacer groove) is processed, the spacer 5 dividing one tunneling layer cut into the first tunneling layer 31 and the second tunneling layer 41, and the spacer 5 dividing one transparent conductive layer cut into the first transparent conductive layer 33 and the second transparent conductive layer 43 at the same time.
The materials of the first metal electrode 34 and the second metal electrode 44 include, but are not limited to, silver aluminum alloy, and copper silver alloy.
In the present embodiment, the first metal electrode 34 and the second metal electrode 44 are made of silver.
In another embodiment, the first metal electrode 34 and the second metal electrode 44 are made of silver-aluminum alloy.
In another embodiment, the first metal electrode 34 and the second metal electrode 44 are made of copper-silver alloy.
The light transmittance of the first transparent conductive layer 33 and the second transparent conductive layer 43 is 90% -98%, for example 92%, 94% or 96%, so as to avoid the decrease of the power generation efficiency caused by the influence of the additional transparent conductive layer on the utilization of sunlight. It will be appreciated that in the same embodiment, the light transmittance of the first transparent conductive layer 33 and/or the second transparent conductive layer 43 may be equal or unequal. In the present embodiment, the light transmittance of both the first transparent conductive layer 33 and the second transparent conductive layer 43 is 95%. In another embodiment, the light transmittance of the first transparent conductive layer 33 is 95%, and the light transmittance of the second transparent conductive layer 43 is 96%.
The resistivity of the first transparent conductive layer 33 and/or the second transparent conductive layer 43 is E-5Ω·cm to E-6Ω·cm, which ensures that the carriers can be transported well without affecting the accumulation of the carriers.
Specifically, the first transparent conductive layer 33 and/or the second transparent conductive layer 43 are a zinc oxide layer (ZnO), a tin oxide layer (SnO) 2 ) Or a tin doped indium oxide layer (ITO). It is understood that the first transparent conductive layer 33 and the second transparent conductive layer 43 may be made of the same material or different materials. In this embodiment, the first transparent conductive layer 33 and/or the second transparent conductive layer 43 are/is tin-doped indium oxide layers. Correspondingly, the thickness of the first transparent conductive layer 33 and/or the second transparent conductive layer 43 is 50mm to 200mm, for example 80mm, 100mm, 120mm, 150mm, 170mm or 190mm, etc. It is understood that the thicknesses of the first transparent conductive layer 33 and the second transparent conductive layer 43 may be equal or unequal. In the present embodiment, the thicknesses of the first transparent conductive layer 33 and the second transparent conductive layer 43 are equal, and are 60mm.
Wherein the first tunneling layer 31 and/or the second tunneling layer 41 is SiO x Layers, e.g. SiO layers or SiO 2 The thickness of the layer is 1nm to 2nm, for example, 1.3nm, 1.5nm or 1.8 nm. It will be appreciated that the materials and thicknesses of first tunneling layer 31 and second tunneling layer 41 may or may not be the same. In the present embodiment, both the first tunneling layer 31 and the second tunneling layer 41 are SiO 2 The layer thickness was 1.4nm.
The thickness of the p+ polysilicon layer 32 is 100nm to 300nm, for example, 120nm, 150nm, 180nm, 200nm, 230nm, 250nm, 280nm, or the like. The surface B atomic concentration of the p+ polysilicon layer 32 is E+20/cm 3 5 x E+21/cm 3 For example 2E+20/cm 3 Or 3E+20/cm 3 Or 4E+20 pieces/cm 3 Or 5E+10 pieces/cm 3 Etc.
Similarly, the n+ polysilicon layer 42 has a thickness of 100nm to 300nm, for example 120nm, 150nm, 180nm, 200nm, 230nm, 250nm, 280nm, or the like. The surface P atomic concentration of the n+ polysilicon layer 42 is E+20/cm 3 E+21/cm 3 。
In this embodiment, the thickness of the p+ polysilicon layer 32 is 200mm, the p+ polysilicon layer32 has a surface B atom concentration of E+20 atoms/cm 3 . The thickness of the n+ polysilicon layer 42 is 200mm, and the surface P atomic concentration of the n+ polysilicon layer 42 is E+20 atoms/cm 3 。
Example two
Referring to fig. 2, this embodiment provides an IBC solar cell, and on the basis of the first embodiment, this embodiment further has the following design:
the monocrystalline silicon substrate 1 is a P-type monocrystalline silicon wafer 11, namely a P-type IBC battery.
The passivation film 2 is AlO x The film or passivation film 2 is SiN x And (3) a film.
In the present embodiment, the passivation film 2 is AlO x And (3) a film.
In another embodiment, the passivation film 2 is SiN x And (3) a film.
The resistivity of the P-type monocrystalline silicon piece 11 is 1 Ω·cm to 3 Ω·cm, for example, 1.5 Ω·cm, 2 Ω·cm, or 2.5 Ω·cm.
The thickness of the P-type monocrystalline silicon piece 11 is 100 μm to 180 μm, for example 130 μm, 150 μm or 170 μm.
AlO x The thickness of the film is 5nm to 15nm, for example 8nm, 10nm or 12nm. SiN (SiN) x The thickness of the film is 70nm to 95nm, for example 80nm, 85nm or 90nm.
In this example, the resistivity of the P-type monocrystalline silicon piece 11 is 2Ω·cm, and the thickness is 150 μm; alO (aluminum oxide) x The thickness of the film is 12nm; siN (SiN) x The film thickness was 78nm.
Example III
Referring to fig. 3, this embodiment provides an IBC solar cell, which is different from the second embodiment in that:
the monocrystalline silicon substrate 1 is an N-type monocrystalline silicon piece 12, namely an N-type IBC battery.
The passivation film 2 is SiO x The film or passivation film 2 is SiN x And (3) a film.
In the present embodiment, the passivation film 2 is SiO x And (3) a film. In another embodiment, the passivation film 2 is SiN x And (3) a film.
The resistivity of the N-type single crystal silicon wafer 12 is from 2Ω·cm to 10Ω·cm, for example, 4Ω·cm, 5Ω·cm, or 8Ω·cm. The thickness of the N-type monocrystalline silicon piece 12 is 100 μm to 160 μm, for example 120 μm, 140 μm or 150 μm.
SiO x The thickness of the film is 10nm to 30nm, for example 15nm, 20nm or 25nm.
SiN x The thickness of the film is 50nm to 90nm, for example 60nm, 75nm or 80nm.
In this example, the resistivity of the N-type single crystal silicon wafer 12 is 5Ω·cm, and the thickness is 130 μm; siO (SiO) x The thickness of the film is 22nm; siN (SiN) x The thickness of the film was 80nm.
Example IV
Referring to fig. 2 and 3, the present embodiment provides a battery assembly including the IBC solar cell as in any one of the first to third embodiments.
The battery assembly of the embodiment adopts the IBC solar battery, so that the energy conversion efficiency of the battery is greatly improved.
Example five
Referring to fig. 2 and 3, the present embodiment provides a photovoltaic system including a battery pack as in the fourth embodiment.
The photovoltaic system of the embodiment adopts the battery assembly, and the IBC solar battery adopted in the battery assembly greatly improves the energy conversion efficiency of photovoltaic power generation.
In the description of the present specification, reference to the terms "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiments or examples is included in at least one embodiment or example of the utility model. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Furthermore, the foregoing description of the preferred embodiment of the utility model is provided for the purpose of illustration only, and is not intended to limit the utility model to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the utility model.
Claims (13)
1. An IBC solar cell, comprising:
a monocrystalline silicon substrate;
the passivation film is arranged on the front surface of the monocrystalline silicon substrate;
the positive electrode part is positioned on the back surface of the monocrystalline silicon substrate and comprises a first tunneling layer, a p+ polycrystalline silicon layer, a first transparent conducting layer and a first metal electrode which are sequentially stacked along the direction away from the back surface of the monocrystalline silicon substrate;
the negative electrode part is positioned on the back surface of the monocrystalline silicon substrate and comprises a second tunneling layer, an n+ polycrystalline silicon layer, a second transparent conducting layer and a second metal electrode which are sequentially stacked along the direction away from the back surface of the monocrystalline silicon substrate; and
and a separator portion that is located between the negative electrode portion and the positive electrode portion and electrically insulates the negative electrode portion from the positive electrode portion.
2. The IBC solar cell according to claim 1, wherein the first and second transparent conductive layers have a light transmittance of 90% to 98%.
3. The IBC solar cell according to claim 1, characterized in that the resistivity of the first transparent conductive layer and/or the second transparent conductive layer is E-5 Ω -cm to E-6 Ω -cm.
4. The IBC solar cell according to claim 1, wherein the first transparent conductive layer and/or the second transparent conductive layer is a zinc oxide layer, a tin oxide layer or a tin doped indium oxide layer.
5. The IBC solar cell according to claim 4, wherein the thickness of the first transparent conductive layer and/or the second transparent conductive layer is 50mm to 200mm.
6. The IBC solar cell according to claim 1, wherein the spacers are isolation trenches having a width of 3 μm to 5 μm.
7. The IBC solar cell according to claim 1, wherein the first tunneling layer and/or the second tunneling layer is SiO x The thickness of the layer is 1 nm-2 nm.
8. The IBC solar cell according to any of claims 1 to 7, wherein the monocrystalline silicon substrate is a P-type monocrystalline silicon wafer;
the passivation film is AlO x The film or the passivation film is SiN x And (3) a film.
9. The IBC solar cell according to claim 8, wherein the P-type monocrystalline silicon piece has a resistivity of 1 Ω -cm to 3 Ω -cm and a thickness of 100 μm to 180 μm;
the AlO is x The thickness of the film is 5 nm-15 nm;
the SiN x The thickness of the film is 70 nm-95 nm.
10. The IBC solar cell according to any of claims 1 to 7, wherein the monocrystalline silicon substrate is an N-type monocrystalline silicon wafer;
the passivation film is SiO x The film or the passivation film is SiN x And (3) a film.
11. The IBC solar cell according to claim 10, wherein the N-type monocrystalline silicon piece has a resistivity of 2 Ω -cm to 10 Ω -cm and a thickness of 100 μm to 160 μm;
the SiO is x The thickness of the film is 10 nm-30 nm;
the SiN x Film thickness50nm to 90nm.
12. A battery assembly comprising an IBC solar cell according to any of claims 1 to 11.
13. A photovoltaic system comprising the cell assembly of claim 12.
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