CN219085959U

CN219085959U - Packaging structure and electronic device

Info

Publication number: CN219085959U
Application number: CN202320874147.8U
Authority: CN
Inventors: 彭昌琴; 石先玉; 冯浩; 李岚清; 张芯怡; 孙瑜; 吴昊; 李克忠; 万里兮
Original assignee: Chengdu Wanying Microelectronics Co ltd
Current assignee: Chengdu Wanying Microelectronics Co ltd
Priority date: 2023-04-19
Filing date: 2023-04-19
Publication date: 2023-05-26
Anticipated expiration: 2033-04-19

Abstract

The application provides a packaging structure and an electronic device, and relates to the technical field of chip packaging. The packaging structure comprises: pressing the substrate, the chip and the filling assembly; a mounting area is arranged in the pressing substrate, and the chip is mounted in the mounting area; a cavity area is arranged between the chip and the pressing substrate, and a cavity opening is formed on the first surface of the pressing substrate in the cavity area; the filling assembly is arranged at the cavity opening and is used for filling the cavity opening so as to seal the cavity area. The opening position of the cavity area formed during chip installation is filled through the filling assembly, so that the cavity area is effectively isolated and sealed, the diffusion condition of other materials or moisture and the like entering the cavity area is reduced, the adverse effect of the diffusion condition on the chip is reduced, the reliability and the service life of the chip are effectively improved, the failure or fault condition of the chip is reduced, and therefore the electronic device with the packaging structure can be normally used without being influenced by the moisture and the like.

Description

Packaging structure and electronic device

Technical Field

The application relates to the technical field of chip packaging, in particular to a packaging structure and an electronic device.

Background

Along with the rapid development of integrated circuits, SAW (Surface Acoustic Wave, acoustic surface filter) is widely used in the field of EMI (Electromagnetic Interference ) resistance because of its characteristics of large design flexibility, good electromagnetic interference resistance, high reliability, small size, light weight, and capability of implementing various complex functions.

Since SAW is required to withstand pressures up to 100bar when in use, a cavity is required to be designed above the chip surface when packaging SAW chips to allow the surface acoustic wave in the surface acoustic wave element to propagate without interference. In the prior art, a top sealing method such as an airtight metal packaging technology and a surface mounting technology chip size scale sound meter packaging is generally adopted, and a sealing material is adopted to seal the cavity, so that the condition that other materials enter the cavity between the chip and the base material to cause adverse effects on the chip is reduced. However, since moisture can diffuse through the sealing material, the SAW chip is still adversely affected by such factors as moisture, thereby reducing the reliability of the SAW chip and affecting the normal use of the SAW chip.

Disclosure of Invention

Accordingly, an objective of the embodiments of the present application is to provide a package structure and an electronic device, so as to improve the problem that the moisture or other materials diffused in the cavity in the prior art affect the normal use of the chip.

In order to solve the above-mentioned problem, in a first aspect, an embodiment of the present application provides a package structure, the package structure includes: pressing the substrate, the chip and the filling assembly;

a mounting area is arranged in the pressing substrate, and the chip is mounted in the mounting area;

a cavity area is arranged between the chip and the pressing substrate, and a cavity opening is formed on the first surface of the pressing substrate in the cavity area;

the filling assembly is arranged at the cavity opening and is used for filling the cavity opening so as to seal the cavity area.

In the implementation process, the chip is mounted in the mounting area arranged inside the pressing substrate, so that the substrate cost required by chip mounting is effectively reduced. And form corresponding cavity region after the chip is installed with the pressfitting base plate, pack the open position of cavity region through setting up the subassembly of filling, with keep apart effectively sealed to cavity region, thereby reduce the diffusion condition that other materials or moisture etc. get into cavity region, with the adverse effect that reduces the diffusion condition to the chip and cause, improve reliability and the life of chip effectively, reduced the inefficacy or the trouble condition of chip, thereby make the chip can not receive influence such as moisture to carry out normal use.

Optionally, the package structure further includes: a wiring substrate;

the wiring substrate is arranged on the second surface of the pressing substrate;

the wiring substrate is connected with the chip and configured to realize data exchange between the chip and an external circuit.

In the above implementation, the package structure may further include a wiring substrate disposed on the second surface of the pressing substrate. The wiring substrate is attached to the pressing substrate to form a cavity in the substrate, so that the chip is mounted in the substrate, and the substrate area cost required when the chip is mounted on the surface of the substrate is reduced. And the wiring substrate can be electrically connected with the chip through the lamination of the wiring substrate and the lamination substrate so as to realize corresponding data transmission function.

Optionally, the package structure further includes: a connection assembly;

the connecting component is arranged on a connecting surface, close to the pressing substrate, of the wiring substrate in the mounting area;

the chip is connected with the connecting component, and the connecting component is used for connecting the chip with the wiring substrate.

In the above implementation process, in order to realize connection between the chip and the wiring substrate, the packaging structure is further provided with a corresponding connection component, and the connection component is disposed on the connection surface of the wiring substrate, which is close to the pressing substrate, in the mounting area, so that the chip and the wiring substrate are respectively connected through the connection component, and thus, the chip and the wiring substrate are electrically connected, and a data transmission function is realized.

Optionally, wherein the connection assembly comprises a plurality of equally sized support connections; a plurality of the support connectors are used to invert the chip into the mounting area to form the cavity area.

In the above implementation process, the connection assembly not only can connect the chip and the wiring substrate, but also can serve as a supporting connection member to support the chip so that the chip can be inversely installed in the installation area and a cavity area is formed in the installation area. The chip is supported, installed and connected in an inverted installation mode, and the chip can be arranged in the substrate, so that the substrate area cost, wiring design difficulty and wiring cost required when the chip is installed on the surface of the substrate are reduced.

Optionally, wherein the support connector comprises: and (5) welding balls.

In the above implementation, in order to implement the corresponding connection function and support function, the support connection member may include a solder ball assembly to support the chip and electrically connect the chip with the wiring substrate.

Optionally, the area structure parameter of the mounting area is set based on the size parameter of the chip.

In the implementation process, in order to be suitable for various different chip installation scenes, the regional structure parameters of the installation region can be set according to the size parameters of the chip, so that the installation region with the corresponding size is set according to the actual condition of the chip, the method is suitable for installing various different chips, and the application scene of the package is effectively enlarged.

Optionally, wherein the filling assembly comprises: the coarse dispersion is filled with glue.

In the implementation process, in order to improve the sealing effect when the cavity area is sealed, coarse dispersion filling glue which is not influenced by moisture can be selected as a filling component, so that the situation that moisture and other materials diffuse into the cavity area is reduced, the chip is effectively protected, the chip can be normally used, and the service life of the chip is prolonged.

Optionally, the filling amount of the filling assembly is set based on an opening parameter of the cavity opening.

In the implementation process, the filling quantity of the filling assembly can be set according to the opening parameters of the cavity opening, and the filling assembly can be adaptively filled based on the openings with different sizes and shapes, so that the filling cost required when the cavity area is sealed is further reduced while the sealing is realized.

Optionally, the package structure further includes: plastic packaging material;

the plastic package material is arranged on the first surface of the pressing substrate and is used for carrying out plastic package on the chip.

In the above-mentioned realization process, can also set up the plastic envelope material in the packaging structure, set up the plastic envelope material on the first face of pressfitting base plate to carry out the plastic envelope to the chip, and because the sealed effect of filling assembly to the cavity region, the plastic envelope material can not get into the cavity region and cause adverse effect to the chip.

In a second aspect, embodiments of the present application further provide an electronic device, where the electronic device includes the package structure of any one of the first aspects above.

In the implementation process, the packaging structure can effectively improve the reliability and the service life of the chip, and reduce the failure or fault condition of the chip, so that the electronic device with the packaging structure can be normally used without being influenced by moisture and the like.

In summary, the embodiment of the application provides a packaging structure and an electronic device, which are used for filling the opening position of a cavity area through a filling assembly, so as to effectively isolate and seal the cavity area, thereby reducing the diffusion condition of other materials or moisture and the like entering the cavity area, reducing the adverse effect of the diffusion condition on a chip, effectively improving the reliability and the service life of the chip, reducing the failure or fault condition of the chip, and enabling the chip to be free from the influence of the moisture and the like for normal use.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic cross-sectional structure of a package structure according to an embodiment of the present application;

fig. 2 is a schematic cross-sectional view of a package structure according to an embodiment of the present disclosure;

fig. 3 is a flow chart of a design method of a package structure according to an embodiment of the present application.

Icon: 100-laminating the substrate; 110-an installation area; 200-chip; 210-cavity region; 300-filling assembly; 400-wiring substrate; 500-a connection assembly; 510-support connectors; 600-plastic packaging material; a-presetting the direction; b-a first face; and a C-second side.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments of the present application without making any inventive effort, are intended to be within the scope of the embodiments of the present application.

Since SAW is required to withstand large pressures, for example up to 100bar, when used, a cavity is designed above the chip surface to allow the surface acoustic wave in the surface acoustic wave element to propagate without interference when the SAW chip is packaged. In the prior art, the cavity formed on the surface of the chip is generally sealed in the following ways: adopting airtight metal packaging technology, and enabling bonding wires to play a role in connection between the external terminal and the chip; 2. the surface mounting technology adopts ceramic with flat welding pins for packaging; 3. the package size is minimized, namely, a chip size scale sound table package (CSSP) mode, and a top sealing (GlobTop) method is adopted to seal the cavity.

However, since moisture can diffuse through the sealing material, the current packaging method is not airtight packaging, so that the SAW chip is still adversely affected by factors such as moisture, thereby reducing the reliability of the SAW chip and affecting the normal use of the SAW chip.

In order to solve the above problems, the present application provides a package structure. Referring to fig. 1, fig. 1 is a schematic cross-sectional structure of a package structure according to an embodiment of the disclosure. The package structure may include: the substrate 100, the chip 200, and the filler assembly 300 are laminated.

For example, the chip 200 may be a chip of various functions such as a SAW chip.

Wherein, the mounting area 110 is provided inside the lamination substrate 100, and the chip 200 is mounted in the mounting area 110, so that the chip 200 can be mounted inside the substrate, thereby effectively reducing the design area and wiring cost required when the chip 200 is mounted on the surface of the substrate. And a cavity region 210 is disposed between the chip 200 and the bonding substrate 100, and the cavity region 210 forms a cavity opening on the first surface B of the bonding substrate 100.

Alternatively, the first surface B of the laminated substrate 100 may be a top surface in the preset direction a, and the second surface C of the laminated substrate 100 may be a bottom surface in the preset direction a.

It should be noted that, in order to seal the cavity region 210, the filling assembly 300 is disposed at the cavity opening (i.e., the opening of the cavity region 210), and the filling assembly 300 is used to fill the cavity opening to seal the cavity region 210.

Optionally, when there are multiple cavity openings, a plurality of corresponding filling assemblies 300 may be provided for filling, and only one structure having two cavity openings and two filling assemblies 300 is shown in fig. 1, and the other number of cavity openings and filling assemblies 300 will not be described in detail.

It should be noted that, the filling assembly 300 may be configured as a coarse dispersion type filling glue capable of isolating moisture and other materials, for example, a filling glue with a particle diameter greater than 100nm, or may be another filling material with a function of isolating moisture and other materials, so as to reduce the situation that moisture and other materials diffuse into the cavity region 210, and effectively protect the chip 200, so that the chip 200 can be used normally, and the service life of the chip 200 is improved.

Alternatively, the filling amount of the filling assembly 300 may be set based on the opening parameter of the cavity opening, and the shape of the filling assembly 300 may also be set based on the shape of the cavity opening, for example, when the cavity opening is rectangular, the filling assembly 300 may be set to a cube or cylinder of a corresponding size; when the cavity opening is circular, the filling assembly 300 may be configured as a correspondingly sized ball-filled paste; where the cavity opening is an irregular gap, the filler assembly 300 may be configured to fill glue of a corresponding size in an irregular shape. The sealing method can be used for adaptively filling openings with different sizes and shapes, and compared with the existing sealing method, the sealing method can be used for realizing sealing and simultaneously further reducing the filling cost required for sealing the hollow cavity region 210.

It should be noted that, in order to be suitable for various mounting scenarios of the chip 200, the area structure parameter of the mounting area 110 is set based on the size parameter of the chip 200, for example, when the length of the chip 200 is x and the width is y, the length of the cavity area 210 may be x+ (70 um-90 um) and the width may be y+ (70 um-90 um), and according to the actual situation of the chip 200, an area larger than the volume of the chip 200 can be manufactured to mount the chip 200, so that the method is suitable for mounting various different chips 200, and the applicable scenario of packaging is effectively enlarged.

Alternatively, the positions of the corresponding mounting regions 110 may be reserved on the bonded substrate 100 according to predetermined region structure parameters, so that the corresponding cavity regions 210 are manufactured based on the bonding process.

Optionally, referring to fig. 2, fig. 2 is a schematic cross-sectional view of a package structure according to an embodiment of the present application. The package structure may further include: the wiring substrate 400, the wiring substrate 400 is disposed on the second surface C of the lamination substrate 100, that is, in a preset direction, the wiring substrate 400 is disposed at the bottom of the lamination substrate 100, and the wiring substrate 400 is capable of being connected to the chip 200 and configured to realize data exchange between the chip 200 and an external circuit.

Optionally, in order to achieve connection of the chip 200 and the wiring substrate 400, the package structure may further include: the assembly 500 is connected. The connection assembly 500 is disposed on a connection surface of the wiring substrate 400 near the pressing substrate 100 in the mounting area 110, the chip 200 is connected with the connection assembly 500, and the connection assembly 500 is used for connecting the chip 200 and the wiring substrate 400, so as to connect the chip 200 and the wiring substrate 400 through the connection assembly 500, thereby electrically connecting the chip 200 and the wiring substrate 400 and realizing a data transmission function.

Alternatively, to achieve data exchange, part of the traces in the wiring substrate 400 may be disposed in a portion in contact with the mounting region 110 to perform signal and data transmission through electrical connection.

In order to reduce the wiring cost and the substrate area cost required for the chip 200 being mounted on the substrate, the chip 200 may be mounted upside down in the mounting region 110, i.e., the surface of the chip 200 is disposed near one end of the wiring substrate 400 when the chip 200 is mounted. Therefore, in order to achieve the resulting mounting of the chip 200, the connection assembly 500 may include a plurality of support connectors 510 of the same size, and the plurality of support connectors 510 are used to support the inverted chip 200 so as to invert the chip 200 within the mounting region 110, thereby forming a corresponding cavity region 210 between the chip 200 and the mounting region 110, so that the surface acoustic wave and the like in the chip 200 can propagate without interference, and the chip 200 can be supported, mounted and connected in an inverted mounting manner, so that the chip 200 can be disposed inside the substrate, thereby reducing the substrate area cost, the routing design difficulty and the routing cost required when the chip 200 is mounted on the surface of the substrate.

Alternatively, in order to achieve the corresponding connection function and support function, the support connection 510 may include a solder ball assembly to support the chip 200, form the corresponding cavity region 210, and electrically connect the chip 200 with the wiring substrate 400.

For example, the number of the support connectors 510 may be set according to actual situations, and only 4 support connectors 510 are shown in fig. 2, and the other situations will not be described in detail.

Optionally, after the cavity opening is sealed by using the filling assembly 300, a molding compound 600 may be further disposed in the package structure, and the molding compound 600 is disposed on the first surface B of the pressing substrate 100 to mold the chip 200, and due to the sealing effect of the filling assembly 300 on the cavity area 210, the molding compound 600 does not enter the cavity area 210 to adversely affect the chip 200.

Referring to fig. 3, fig. 3 is a flowchart illustrating a method for designing a package structure according to an embodiment of the present application, and the method may include steps S710-S740.

Determining area structure parameters of the mounting area based on the chip;

setting corresponding installation areas on the pressed substrate based on the area structure parameters;

inversely installing the chip in the installation area through the connecting component to form a cavity area, and connecting the chip with the wiring substrate;

the cavity opening formed in the first face of the bonded substrate for the cavity region is filled by the filling member to seal the cavity region.

Since the principle of solving the problem by the design method in the embodiment of the present application is similar to that of the embodiment of the package structure described above, the implementation of the design method in the embodiment of the present application may refer to the description in the embodiment of the package structure described above, and the repetition is omitted.

It should be noted that, the package structure provided in the embodiments of the present application is disposed in various electronic devices, for example, electronic devices such as various filter components, and the electronic devices are disposed in corresponding electronic devices, for example, electronic devices having logic computing functions, such as headphones, personal computers (Personal Computer, PCs), tablet computers, smartphones, personal digital assistants (Personal Digital Assistant, PDA), and the like, so as to implement corresponding functions.

In addition, the parts in the embodiments of the present application may be integrated together to form a single part, or the parts may exist separately, or two or more parts may be integrated to form a single part.

The foregoing is merely exemplary embodiments of the present application and is not intended to limit the scope of the present application, and various modifications and variations may be suggested to one skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application. It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.

The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application.

It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of additional identical elements in a process, article or apparatus that comprises the element.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus may be implemented in other ways. The apparatus embodiments described above are merely illustrative, for example, block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of devices according to various embodiments of the present application. In this regard, each block in the block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams, and combinations of blocks in the block diagrams, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

Claims

1. A package structure, the package structure comprising: pressing the substrate, the chip and the filling assembly;

2. The package structure of claim 1, further comprising: a wiring substrate;

3. The package structure of claim 2, further comprising: a connection assembly;

4. The package structure of claim 3, wherein the connection assembly comprises a plurality of equally sized support connections; a plurality of the support connectors are used to invert the chip into the mounting area to form the cavity area.

5. The package structure of claim 4, wherein the support connector comprises: and (5) welding balls.

6. The package structure of any of claims 1-5, wherein the area structure parameter of the mounting area is set based on a dimensional parameter of the chip.

7. The package structure of any one of claims 1-5, wherein the filler assembly comprises: the coarse dispersion is filled with glue.

8. The package structure of any of claims 1-5, wherein the fill amount of the fill assembly is set based on an opening parameter of the cavity opening.

9. The package structure according to any one of claims 1-5, further comprising: plastic packaging material;

10. An electronic device, characterized in that it comprises a packaging structure according to any of claims 1-9.