CN117936464A - Packaging cavity structure of chip device and method for reducing resonance of packaging cavity - Google Patents
Packaging cavity structure of chip device and method for reducing resonance of packaging cavity Download PDFInfo
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 82
- 238000000034 method Methods 0.000 title claims abstract description 13
- 239000000463 material Substances 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims description 107
- 230000005684 electric field Effects 0.000 claims description 39
- 238000007639 printing Methods 0.000 claims description 14
- 239000000945 filler Substances 0.000 claims description 8
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- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000002184 metal Substances 0.000 description 19
- 229910052751 metal Inorganic materials 0.000 description 19
- 238000005538 encapsulation Methods 0.000 description 14
- 230000008859 change Effects 0.000 description 9
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- 239000003989 dielectric material Substances 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000009434 installation Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000001629 suppression Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
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- 239000004020 conductor Substances 0.000 description 3
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- 239000010949 copper Substances 0.000 description 2
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- 230000035699 permeability Effects 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000011358 absorbing material Substances 0.000 description 1
- 230000037237 body shape Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
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Abstract
The application provides a packaging cavity structure of a chip device and a method for reducing resonance of the packaging cavity, which relate to the technical field of semiconductor packaging. In addition, the cavity resonance is reduced by introducing the loss layer, the influence on the packaging layout is small, the external dimension and the medium filling material are not required to be changed, great convenience is brought to product design and production, and the requirements of products and reliability can be met.
Description
Technical Field
The application relates to the technical field of semiconductor packaging, in particular to a packaging cavity structure of a chip device and a method for reducing resonance of the packaging cavity.
Background
In order to meet requirements of reliability, air tightness and the like, a metal cavity packaging structure, such as a metal cavity packaging structure and a substrate POP (Package on Package) packaging structure, cavity resonance is often formed in the packaging structure, when the cavity resonance frequency falls within the working frequency range of a packaged product, the performance of the product is reduced, and the product is completely and non-functional even fails in severe cases.
For cavity resonance caused by metal cavity packaging, as shown in fig. 1 and 2, a conventional solution is to add a first metal rib connecting position 101 and a second metal rib connecting position 102 inside a first packaging cavity structure 100 to change the cavity structure, so as to push the cavity resonance frequency to high frequency, and further avoid that the cavity resonance frequency falls in the working frequency range of a packaged product. Another solution is to change the profile of the first package cavity structure 100, thereby changing the cavity resonant mode.
In addition, for resonance caused by an open cavity structure formed by the substrate POP package structure, the prior art is to reduce the package outline size or fill dielectric material in the cavity to change the resonance frequency. As shown in fig. 3, the semi-open second encapsulation cavity structure 200 is composed of a first substrate 201, a second substrate 202, a first filling material 203, a first connection pillar 204 between the first substrate 201 and the second substrate 202, wherein the first connection pillar 204 is not necessary. The cavity resonant frequency is tuned by changing the dimensions of the semi-open cavity structure or changing the type of intermediate dielectric fill material.
The solution described above enables the cavity resonant frequency to be shifted out of the operating band range of the packaged product, thus solving the impact on the product performance, however this solution has the following limitations:
firstly, when the space layout of the packaging structure is limited, the space in the cavity is reduced due to the addition of the rib connecting position, the space of the packaging layout is greatly influenced, and the design concept of miniaturized packaging is conflicting; in addition, when the working frequency of the product is higher or the working bandwidth of the product is wider, the scheme cannot control the modes in the working frequency range outside the working frequency range of the product.
Second, the resonance formed in the semi-enclosed cavity has no more efficient means than to change the package form factor or change the dielectric fill material in the cavity, however, the package form factor and dielectric fill change can affect product requirements and reliability.
Disclosure of Invention
The embodiment of the application aims to provide a packaging cavity structure of a chip device and a method for reducing resonance of a packaging cavity, which are used for solving the problems of influencing packaging layout, external dimension, product requirement and reliability of the existing cavity resonance reducing scheme aiming at metal cavity packaging and substrate POP packaging.
The embodiment of the application provides a packaging cavity structure of a chip device, which comprises the following components: a cavity, a filler material, and at least one sacrificial layer; the filling material and at least one loss layer are arranged in the cavity, and the normal direction of the loss layer is parallel to the electric field direction of the packaging cavity structure, wherein the conductivity of the loss layer is 10S/m-100S/m.
In the technical scheme, the loss layer is arranged in the cavity of the packaging cavity structure, the loss layer is made of low-conductivity material, and the normal direction of the loss layer is parallel to the electric field direction of the packaging cavity structure. In addition, the cavity resonance is reduced by introducing the loss layer, the influence on the packaging layout is small, the external dimension and the medium filling material are not required to be changed, great convenience is brought to product design and production, and the requirements of products and reliability can be met.
In some alternative embodiments, the cavity comprises an open cavity; the open cavity comprises an upper substrate, a lower substrate and a plurality of connecting columns;
the upper substrate and the lower substrate are substrates with the same size, the lower substrate is arranged in the horizontal direction, the upper substrate and the lower substrate are arranged in parallel, and the upper substrate is arranged above the lower substrate;
the plurality of connecting columns are connected with the upper substrate and the lower substrate, and the plurality of connecting columns are uniformly arranged on the edge position of the lower substrate.
In the technical scheme, the packaging cavity structure can be suitable for packaging the substrate POP, the packaging outline size or the filling medium material in the cavity is not required to be changed, and cavity resonance can be reduced by arranging the loss layer in the open cavity.
In some alternative embodiments, the electric field direction of the package cavity structure is a vertical direction; the depletion layer is arranged between the upper substrate and the lower substrate, and the depletion layer is arranged in the horizontal direction.
According to the technical scheme, the electric field direction of the packaging cavity can be determined according to the mode of the packaging cavity structure, when the electric field direction of the packaging cavity structure is the vertical direction, the loss layer is arranged in the horizontal direction, and the loss layer can be obtained by smearing the loss layer material in the horizontal direction in the manufacturing process.
In some alternative embodiments, at least one sacrificial layer is disposed on the lower surface of the upper substrate, or on the upper surface of the lower substrate.
In the technical scheme, the loss layer is directly arranged on the surface of the upper substrate or the lower substrate and is parallel to the electric field direction of the packaging cavity structure, so that the loss layer can effectively absorb and dissipate electric field energy, and cavity resonance is reduced to the maximum extent. The layout mode ensures that the loss layer can directly act on the electric field, and improves the effect of resonance suppression. And moreover, the loss layer is integrated on the surface of the substrate, so that an additional supporting structure or an installation step is not needed, and the whole packaging structure is more compact. The compact layout is beneficial to reducing the packaging volume and improving the space utilization rate, and is suitable for application scenes with strict requirements on the size.
In some alternative embodiments, the sacrificial layer is adhered to the lower surface of the upper substrate or the upper surface of the lower substrate by printing or bake curing.
In the technical scheme, the loss layer can be directly arranged on the surface of the substrate in a coating, printing or film attaching mode, the manufacturing process is relatively simple, the production cost and the manufacturing difficulty are reduced, and the simple manufacturing process is beneficial to realizing large-scale production and rapid iteration. And moreover, the loss layer is tightly combined with the substrate, so that the loss layer is not easy to fall off or shift, and the stability and the reliability of the packaging structure are ensured.
In some alternative embodiments, at least one sacrificial layer is not in contact with the upper and lower substrates.
In some alternative embodiments, the number of the connection posts is four, and one connection post is disposed at each of four corners of the lower substrate.
In some alternative embodiments, the cavity comprises a closed cavity; the closed cavity is of a cuboid structure surrounded by six rectangular plates, and the top surface and the bottom surface of the closed cavity are arranged in the horizontal direction.
Among the above-mentioned technical scheme, encapsulation cavity structure can be applicable to metal cavity encapsulation, need not to increase and link the muscle position, can reduce cavity resonance through setting up the depletion layer in closed cavity, does not influence encapsulation layout space, is applicable to under the limited circumstances of encapsulation structure space layout, has realized miniaturized encapsulation.
In some alternative embodiments, the electric field direction of the package cavity structure is a vertical direction; the depletion layer is arranged on the top inner wall or the bottom inner wall of the closed cavity.
In the technical scheme, the loss layer is directly arranged on the inner wall and is parallel to the electric field direction of the packaging cavity structure, so that the loss layer can effectively absorb and dissipate electric field energy, and cavity resonance is reduced to the greatest extent. The layout mode ensures that the loss layer can directly act on the electric field, and improves the effect of resonance suppression. And moreover, the loss layer is integrated on the inner wall of the closed cavity, and an additional supporting structure or an installation step is not needed, so that the whole packaging structure is more compact. The compact layout is beneficial to reducing the packaging volume and improving the space utilization rate, and is suitable for application scenes with strict requirements on the size.
In some alternative embodiments, the sacrificial layer is adhered to the top or bottom interior wall of the enclosed cavity by printing or bake curing.
In the technical scheme, the loss layer can be directly arranged on the inner wall of the closed cavity in a coating, printing or film attaching mode, the manufacturing process is relatively simple, and the production cost and the manufacturing difficulty are reduced. This simple manufacturing process facilitates mass production and rapid iteration. And moreover, the loss layer is tightly combined with the metal cavity, so that the loss layer is not easy to fall off or shift, and the stability and the reliability of the packaging structure are ensured.
In some alternative embodiments, at least one lossy layer is not in contact with the top and bottom interior walls of the closed cavity.
The method for reducing cavity resonance provided by the embodiment of the application comprises the following steps:
determining a mode of the packaging cavity structure according to the size of the packaging cavity structure;
Determining the direction of an electric field according to the mode of the package cavity structure and the frequency of the concerned electromagnetic wave;
at least one loss layer is arranged in the packaging cavity structure, and the normal direction of the loss layer is parallel to the electric field direction.
According to the technical scheme, the loss layer parallel to the electric field direction is arranged in the packaging cavity structure, so that the electric field energy can be effectively absorbed and dissipated, the cavity resonance is obviously reduced, the resonance inhibition effect of the loss layer can be utilized to the maximum extent, and the stability and reliability of the product performance are ensured. The method does not need to change the external dimension of the sealing cavity structure and the medium filling material, only needs to add a loss layer in the structure, and the simple modification not only reduces the manufacturing cost, but also shortens the production period and improves the production efficiency.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic front view of a first package cavity;
FIG. 2 is a schematic top view of a first package cavity structure;
FIG. 3 is a schematic view of a second package cavity;
FIG. 4 is a schematic diagram of a rectangular resonant cavity;
FIG. 5 is a front view of a third package cavity according to the first embodiment of the present application;
FIG. 6 is a front view of a fourth package cavity according to a second embodiment of the present application;
FIG. 7 is a front view of a package cavity according to a third embodiment of the present application;
FIG. 8 is a graph showing Q values according to a third embodiment of the present application;
FIG. 9 is a front view of a package cavity according to a fourth embodiment of the present application;
FIG. 10 is a graph showing Q values according to a fourth embodiment of the present application;
FIG. 11 is a flowchart illustrating steps in a method for reducing resonance in a package cavity according to an embodiment of the present application.
Icon: 100-first encapsulation cavity structure, 101-first metal connection rib position, 102-second metal connection rib position, 200-second encapsulation cavity structure, 201-first substrate, 202-second substrate, 203-first filling material, 204-first connecting column, 300-third encapsulation cavity structure, 301-third substrate, 302-fourth substrate, 303-second filling material, 304-second connecting column, 3001-first depletion layer, 3002-second depletion layer, 3003-third depletion layer, 400-fourth encapsulation cavity structure, 401-first metal encapsulation cavity, 402-third filling material, 4031-fourth depletion layer, 4032-fifth depletion layer, 4033-sixth depletion layer, 501-fifth substrate, 502-sixth substrate, 503-fourth filling material, 504-third connecting column, 5001-seventh depletion layer, 601-second metal encapsulation cavity, 602-fifth filling material, 6031-eighth depletion layer, 6032-ninth depletion layer.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.
The package cavity structure of the chip device and the method for reducing the resonance of the package cavity reduce or eliminate the influence of the resonance of the cavity on the premise of not changing the package appearance structure. The cavity/open cavity resonance principle is that the cavity structure and the filling material inside the cavity determine the resonance frequency of the cavity, and the cavity self metal material and the medium filling material determine the resonance Q value of the cavity in the determined cavity mode. In the following, a rectangular resonant cavity is taken as an example, and one or more embodiments of the present application can reduce the principle of cavity resonance by providing a loss layer with low conductivity inside the cavity.
Referring to the rectangular resonant cavity of fig. 4, the dimensions of the cavity are a×b×d, and the resonant frequency of the cavity can be calculated from maxwell's equations and corresponding boundary conditions by placing the cavity in a cartesian coordinate system to satisfy the following formula:
Wherein m/n/l respectively represents the number of standing wave pattern changes in the x/y/z direction, i.e., the corresponding wave pattern, c represents the speed of light in vacuum, The relative permeability and relative permittivity of the materials in the cavity, respectively. The principal mode of a rectangular resonator is/>The mode, its corresponding resonant frequency is:
The Q value describes the ratio of energy storage and energy consumption in the cavity, and after the cavity structure is determined, the energy storage in the corresponding mode is certain and is only related to the structural size and the relative dielectric constant of the medium The cavity energy consumption is derived from the conductor loss of the cavity and the loss of dielectric material in the cavity, and the loss of the material is used for the loss tangent angleThe description may also be represented by Df. Conductor loss/>Dielectric loss/>The following formula is shown:
wherein, For the electric field strength in the cavity,/>Is wavelength,/>Is angular frequency,/>Is permeability in vacuum,/>Is a vacuum medium dielectric constant,/>Is the wave impedance in vacuum,/>For conductivity,/>Is the loss tangent angle of the dielectric material. From the formula, the conductor loss and conductivity of the cavity/>In inverse proportion, dielectric loss is related to loss tangent of dielectric material/>Proportional to the ratio. Therefore, the cavity resonance Q value can be reduced by introducing a low-conductivity loss layer (such as resistance paste) into the cavity and introducing a high-loss tangent filling material (such as plastic package material and underfill) into the cavity under the condition of not changing the cavity shape size.
Therefore, the package cavity structure of the chip device provided by the embodiment of the application comprises: a cavity, a filler material, and at least one sacrificial layer; the filling material and at least one loss layer are arranged in the cavity, the normal direction of the loss layer is parallel to the electric field direction of the packaging cavity structure, wherein the conductivity of the loss layer is 10S/m-100S/m, and the loss tangent of the filling material is larger than 0.01.
In the embodiment of the application, the loss layer is arranged in the cavity of the packaging cavity structure, the loss layer is made of low-conductivity material, and the normal direction of the loss layer is parallel to the electric field direction of the packaging cavity structure. In addition, the cavity resonance is reduced by introducing the loss layer, the influence on the packaging layout is small, the external dimension and the medium filling material are not required to be changed, great convenience is brought to product design and production, and the requirements of products and reliability can be met.
In some alternative embodiments, the cavity comprises an open cavity; the open cavity comprises an upper substrate, a lower substrate and a plurality of connecting columns;
the upper substrate and the lower substrate are substrates with the same size, the lower substrate is arranged in the horizontal direction, the upper substrate and the lower substrate are arranged in parallel, and the upper substrate is arranged above the lower substrate;
the plurality of connecting columns are connected with the upper substrate and the lower substrate, and the plurality of connecting columns are uniformly arranged on the edge position of the lower substrate.
In the embodiment of the application, the packaging cavity structure can be suitable for packaging the substrate POP, the packaging outline size or the filling medium material in the cavity is not required to be changed, and the cavity resonance can be reduced by arranging the loss layer in the open cavity.
In some alternative embodiments, the electric field direction of the package cavity structure is a vertical direction; the depletion layer is arranged between the upper substrate and the lower substrate, and the depletion layer is arranged in the horizontal direction.
According to the embodiment of the application, the electric field direction of the packaging cavity can be determined according to the mode of the packaging cavity structure, and when the electric field direction of the packaging cavity structure is the vertical direction, the loss layer is arranged in the horizontal direction, and the loss layer can be obtained by smearing the loss layer material in the horizontal direction in the manufacturing process.
In some alternative embodiments, at least one sacrificial layer is disposed on the lower surface of the upper substrate, or on the upper surface of the lower substrate.
In the embodiment of the application, the loss layer is directly arranged on the surface of the upper substrate or the lower substrate and is parallel to the electric field direction of the packaging cavity structure, so that the loss layer can effectively absorb and dissipate the electric field energy, thereby maximally reducing cavity resonance. The layout mode ensures that the loss layer can directly act on the electric field, and improves the effect of resonance suppression. And moreover, the loss layer is integrated on the surface of the substrate, so that an additional supporting structure or an installation step is not needed, and the whole packaging structure is more compact. The compact layout is beneficial to reducing the packaging volume and improving the space utilization rate, and is suitable for application scenes with strict requirements on the size.
In some alternative embodiments, the sacrificial layer is adhered to the lower surface of the upper substrate or the upper surface of the lower substrate by printing or bake curing.
In the embodiment of the application, the loss layer can be directly arranged on the surface of the substrate in a coating, printing or film attaching mode, the manufacturing process is relatively simple, the production cost and the manufacturing difficulty are reduced, and the simple manufacturing process is beneficial to realizing large-scale production and rapid iteration. And moreover, the loss layer is tightly combined with the substrate, so that the loss layer is not easy to fall off or shift, and the stability and the reliability of the packaging structure are ensured.
In some alternative embodiments, at least one sacrificial layer is not in contact with the upper and lower substrates.
In some alternative embodiments, the number of the connection posts is four, and one connection post is disposed at each of four corners of the lower substrate.
Referring to fig. 5, fig. 5 is a schematic view of a package cavity according to a first embodiment of the present application. The package cavity of the present embodiment is a semi-enclosed third package cavity structure 300, and the third package cavity structure 300 includes, but is not limited to, a third substrate 301, a fourth substrate 302, a second filling material 303, a second connection post 304 connecting the third substrate 301 and the fourth substrate 302, and a first depletion layer 3001 and a third depletion layer 3003 respectively located on the inner sides of the third substrate 301 and the fourth substrate 302. Wherein the second filling material 303 may theoretically be air, in practice, in order to protect the device circuits on the third substrate 301 and the fourth substrate 302, and in order to be reliable, the second filling material 303 may be a plastic molding compound or other functionally similar material. In this embodiment, a depletion layer is introduced, and the depletion layer may be fixed on the third substrate 301 and the fourth substrate 302 by printing, bonding, curing, etc., as shown in the first depletion layer 3001 and the third depletion layer 3003 in the figure; or the lossy layer is embedded somewhere in between the second filler material 303, as shown by the second lossy layer 3002. The shape of the sacrificial layer is not limited, and may be determined according to the available areas on the third substrate 301 and the fourth substrate 302. The position, area, shape and thickness of the loss layer influence the loss condition of the cavity electric field, and can be determined according to the product requirement under the condition of meeting the reliability and the packaging structure.
In some alternative embodiments, the cavity comprises a closed cavity; the closed cavity is of a cuboid structure surrounded by six rectangular plates, and the top surface and the bottom surface of the closed cavity are arranged in the horizontal direction.
In the embodiment of the application, the packaging cavity structure can be suitable for packaging the metal cavity, the connecting rib position is not required to be added, cavity resonance can be reduced by arranging the loss layer in the closed cavity, the packaging layout space is not influenced, and the miniaturized packaging is realized under the condition that the space layout of the packaging structure is limited.
In some alternative embodiments, the electric field direction of the package cavity structure is a vertical direction; the depletion layer is arranged on the top inner wall or the bottom inner wall of the closed cavity.
In the embodiment of the application, the loss layer is directly arranged on the inner wall and is parallel to the electric field direction of the encapsulation cavity structure, so that the loss layer can effectively absorb and dissipate electric field energy, thereby maximally reducing cavity resonance. The layout mode ensures that the loss layer can directly act on the electric field, and improves the effect of resonance suppression. And moreover, the loss layer is integrated on the inner wall of the closed cavity, and an additional supporting structure or an installation step is not needed, so that the whole packaging structure is more compact. The compact layout is beneficial to reducing the packaging volume and improving the space utilization rate, and is suitable for application scenes with strict requirements on the size.
In some alternative embodiments, the sacrificial layer is adhered to the top or bottom interior wall of the enclosed cavity by printing or bake curing.
In the embodiment of the application, the loss layer can be directly arranged on the inner wall of the closed cavity in a coating, printing or film attaching mode, and the like, so that the manufacturing process is relatively simple, and the production cost and the manufacturing difficulty are reduced. This simple manufacturing process facilitates mass production and rapid iteration. And moreover, the loss layer is tightly combined with the metal cavity, so that the loss layer is not easy to fall off or shift, and the stability and the reliability of the packaging structure are ensured.
In some alternative embodiments, at least one lossy layer is not in contact with the top and bottom interior walls of the closed cavity.
Referring to fig. 6, fig. 6 is a schematic view of a package cavity according to a second embodiment of the present application. The fourth sealed cavity structure 400 enclosed in the present embodiment, the fourth sealed cavity structure 400 is composed of a first metal sealed cavity 401, a third filling material 402, a fourth loss layer 4031 and a fifth loss layer 4032 located on the inner surface of the cavity, and a sixth loss layer 4033 inside the third filling material 402. Where the third filler material 402 may be selected as desired based on product performance, when the third filler material 402 is not present, and the fifth lossy layer 4032 is not present accordingly, the third filler material 402 is preferably a Gao Sunhao corner cut dielectric material to ensure a more efficient reduction in cavity resonance Q. The shape, size and position block number of the loss layers can influence the loss degree of the electromagnetic field in the cavity resonance mode, and can be determined according to the product performance and the actual structural requirement. As an illustrative example, the upper and lower inner surfaces of the fourth encapsulation cavity structure 400 are filled with two rectangular fourth and sixth lossy layers 4031 and 4033.
The introduction of the third filling material 402 can reduce the cavity resonance frequency and the cavity resonance Q value, and can select a material with low dielectric constant and high loss tangent angle as the cavity filling material under the condition of not affecting the product performance.
It should be noted that, the present embodiment only shows one of the structures of the loss layers, and the loss layers are only disposed on the upper and lower surfaces of the inner wall of the cavity; in practical use, the loss layer can be arranged at any position and any surface of the inner wall of the cavity, and the design of the loss layer needs to be accurately calculated and evaluated according to the size and the mode of the cavity.
In the structure of the embodiment, the external dimension of the package is not required to be changed for the closed cavity and the semi-closed cavity, and in addition, the layout area and the dimension in the cavity are not required to be reduced, thereby being beneficial to the design of miniaturization of the product.
From the solution point of view, the concept of the invention is different from the concept of the existing solution, and the existing solution is to change the resonant frequency by changing the structure and the like, rather than directly changing the resonant Q value. The invention adopts the thought of the loss material and the loss layer to quickly dissipate the electromagnetic field under the resonance mode, thereby reducing the Q value of the resonance frequency. Along with the reduction of the Q value of the resonant frequency, the effect of cavity resonance on the product performance is reduced.
To further illustrate the effect of the present invention, two examples are presented for illustration.
Referring to fig. 7, fig. 7 is a schematic view of a package cavity according to a third embodiment of the present application. The package cavity structure of this embodiment is an open cavity structure, the dimensions of the fifth substrate 501 and the sixth substrate 502 are 10mm×10mm, the thickness of the substrate is replaced by copper foil equivalent after 0.2mm, the fourth filling material 503 is a plastic package material with dielectric constant dk=4.0 and loss tangent df=0.07, the third connecting column 504 for connecting the fifth substrate 501 and the sixth substrate 502 is located at four corners of the substrate, the dimensions are 1.2mm×1.2mm×0.9mm, and the equivalent material is copper. The seventh depletion layer 5001 is located on the inner surface of the fifth substrate 501, and the resistive paste with a surface sheet resistance of 1kΩ per square is selected and adhered to the inner surface of the fifth substrate 501 by printing and baking curing, and has a size of 7mm×7mm and a thickness of 0.2mm.
As shown in fig. 8, the solid line is a cavity resonance mode Q-value curve provided with the seventh loss layer 5001, and the broken line is a cavity resonance mode Q-value curve provided with no loss layer, and it can be seen that the cavity resonance is improved by the loss layer provided in this embodiment, and the Q-value is reduced from the initial maximum 38 to within 1.5.
Referring to fig. 9, fig. 9 is a schematic diagram of a package cavity according to a fourth embodiment of the present application. The package cavity structure of this embodiment is a closed cavity structure, the second metal closed cavity 601 is made of metal copper material, the cavity body shape size is 10.2mm×10.2mm×2.2mm, and the metal wall thickness is 0.1mm; fifth filler 602 is a plastic molding material having a dielectric constant dk=4.0 and a loss tangent df=0.07, and has dimensions of 10mm×10mm×1.4mm. The eighth depletion layer 6031 and the ninth depletion layer are distributed on the upper and lower inner surfaces of the second metal closed cavity 601, the sizes are 10mm×10mm×0.3mm, the resistance paste with the surface sheet resistance of 10kΩ per square is selected, and the resistance paste is adhered to the inner surface of the cavity in a printing and baking curing mode.
As shown in fig. 10, the solid line is a cavity resonance mode Q value curve in which the eighth loss layer 6031 and the ninth loss layer 6032 are provided, and the broken line is a cavity resonance mode Q value curve in which no loss layer is provided, and it can be seen that the cavity resonance is improved by the loss layer provided in this embodiment, and the Q value is reduced from the initial highest 4600 to within 6.
It should be noted that the material of the depletion layer may be a material having depletion characteristics with respect to an electromagnetic field, such as a resistive paste, a wave-absorbing material, or the like, for example, a material having low conductivity characteristics, a material having high depletion, or the like. The assembly mode of the lost material can be printing, bonding, film pasting and the like. The shape and number of lossy materials are not limited, and are weighted according to performance, product size, and reliability.
Referring to fig. 11, fig. 11 is a flowchart of a method for reducing cavity resonance according to an embodiment of the present application, which specifically includes:
Step 100, determining a mode of the packaging cavity structure according to the size of the packaging cavity structure;
step 200, determining the direction of an electric field according to the mode of the structure of the packaging cavity and the frequency of the concerned electromagnetic wave;
Step 300, at least one depletion layer is arranged in the packaging cavity structure, and the normal direction of the depletion layer is parallel to the electric field direction.
In the embodiment of the application, the loss layer parallel to the electric field direction is arranged in the packaging cavity structure, so that the electric field energy can be effectively absorbed and dissipated, the cavity resonance is obviously reduced, the resonance inhibition effect of the loss layer can be maximally utilized, and the stability and reliability of the product performance are ensured. The method does not need to change the external dimension of the sealing cavity structure and the medium filling material, only needs to add a loss layer in the structure, and the simple modification not only reduces the manufacturing cost, but also shortens the production period and improves the production efficiency.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
Further, the units described as separate units may or may not be physically separate, and units displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Furthermore, functional modules in various embodiments of the present application may be integrated together to form a single portion, or each module may exist alone, or two or more modules may be integrated to form a single portion.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and variations will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (10)
1. A package cavity structure for a chip device, comprising: a cavity, a filler material, and at least one sacrificial layer; the filling material and at least one loss layer are arranged in the cavity, and the normal direction of the loss layer is parallel to the electric field direction of the packaging cavity structure, wherein the conductivity of the loss layer is 10S/m-100S/m.
2. The packaged cavity structure of claim 1, wherein the cavity comprises an open cavity; the open cavity comprises an upper substrate, a lower substrate and a plurality of connecting columns;
the upper substrate and the lower substrate are substrates with the same size, the lower substrate is arranged in the horizontal direction, the upper substrate and the lower substrate are arranged in parallel, and the upper substrate is arranged above the lower substrate;
the plurality of connecting columns are connected with the upper substrate and the lower substrate, and the plurality of connecting columns are uniformly arranged on the edge position of the lower substrate.
3. The package cavity structure of claim 2, wherein the electric field direction of the package cavity structure is a vertical direction; the loss layer is arranged between the upper substrate and the lower substrate, and the loss layer is arranged in the horizontal direction.
4. A package cavity structure according to claim 3, wherein at least one of said depletion layers is provided on a lower surface of said upper substrate or on an upper surface of said lower substrate.
5. The package cavity structure of claim 4, wherein the sacrificial layer is bonded to the lower surface of the upper substrate or the upper surface of the lower substrate by printing or bake curing.
6. The package cavity structure of claim 2, wherein at least one of said lossy layers is not in contact with said upper and lower substrates.
7. The packaged cavity structure of claim 1, wherein the cavity comprises a closed cavity; the closed cavity is of a cuboid structure surrounded by six rectangular plates, and the top surface and the bottom surface of the closed cavity are arranged in the horizontal direction.
8. The package cavity structure of claim 7, wherein the electric field direction of the package cavity structure is a vertical direction; the loss layer is arranged on the top inner wall or the bottom inner wall of the closed cavity.
9. The encapsulated cavity structure of claim 8 wherein said sacrificial layer is bonded to a top or bottom inner wall of said enclosed cavity by printing or bake curing.
10. A method of reducing resonance in a package cavity, comprising:
determining a mode of the packaging cavity structure according to the size of the packaging cavity structure;
Determining the electric field direction of the packaging cavity according to the mode of the packaging cavity structure and the concerned electromagnetic wave frequency;
at least one depletion layer is arranged in the packaging cavity structure, and the normal direction of the depletion layer is parallel to the electric field direction.
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Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002043460A (en) * | 2000-07-26 | 2002-02-08 | Sumitomo Metal Electronics Devices Inc | Package for high frequency |
| US6433356B1 (en) * | 1996-10-29 | 2002-08-13 | Yeda Research And Development Co. Ltd. | Hybrid organic-inorganic semiconductor structures and sensors based thereon |
| US20090140400A1 (en) * | 2007-12-03 | 2009-06-04 | E.I. Du Pont De Nemours And Company | Method of Mid-Frequency Decoupling |
| CN110444846A (en) * | 2019-02-22 | 2019-11-12 | 中国电子科技集团公司第五十五研究所 | It is a kind of to inhibit intracavitary circulator that the structure with interior resonance occurs |
| CN110676224A (en) * | 2019-11-12 | 2020-01-10 | 河北新华北集成电路有限公司 | Amplifier chip packaging structure and manufacturing method |
| CN110797311A (en) * | 2018-08-01 | 2020-02-14 | 三星电子株式会社 | Semiconductor package and method of manufacturing the same |
| WO2021198345A1 (en) * | 2020-03-31 | 2021-10-07 | Trumpf Photonic Components Gmbh | Vcsel with increased wavelength dependence on driving current |
| CN113629020A (en) * | 2021-06-25 | 2021-11-09 | 北京大学 | Millimeter wave packaging structure and preparation method thereof |
| CN113629019A (en) * | 2021-06-25 | 2021-11-09 | 北京大学 | Millimeter wave packaging structure and preparation method thereof |
| US20220153573A1 (en) * | 2019-09-05 | 2022-05-19 | Murata Manufacturing Co., Ltd. | Package structure and method for manufacturing the same |
| CN219085959U (en) * | 2023-04-19 | 2023-05-26 | 成都万应微电子有限公司 | Packaging structure and electronic device |
-
2024
- 2024-03-22 CN CN202410330147.0A patent/CN117936464B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6433356B1 (en) * | 1996-10-29 | 2002-08-13 | Yeda Research And Development Co. Ltd. | Hybrid organic-inorganic semiconductor structures and sensors based thereon |
| JP2002043460A (en) * | 2000-07-26 | 2002-02-08 | Sumitomo Metal Electronics Devices Inc | Package for high frequency |
| US20090140400A1 (en) * | 2007-12-03 | 2009-06-04 | E.I. Du Pont De Nemours And Company | Method of Mid-Frequency Decoupling |
| CN110797311A (en) * | 2018-08-01 | 2020-02-14 | 三星电子株式会社 | Semiconductor package and method of manufacturing the same |
| CN110444846A (en) * | 2019-02-22 | 2019-11-12 | 中国电子科技集团公司第五十五研究所 | It is a kind of to inhibit intracavitary circulator that the structure with interior resonance occurs |
| US20220153573A1 (en) * | 2019-09-05 | 2022-05-19 | Murata Manufacturing Co., Ltd. | Package structure and method for manufacturing the same |
| CN110676224A (en) * | 2019-11-12 | 2020-01-10 | 河北新华北集成电路有限公司 | Amplifier chip packaging structure and manufacturing method |
| WO2021198345A1 (en) * | 2020-03-31 | 2021-10-07 | Trumpf Photonic Components Gmbh | Vcsel with increased wavelength dependence on driving current |
| CN113629020A (en) * | 2021-06-25 | 2021-11-09 | 北京大学 | Millimeter wave packaging structure and preparation method thereof |
| CN113629019A (en) * | 2021-06-25 | 2021-11-09 | 北京大学 | Millimeter wave packaging structure and preparation method thereof |
| CN219085959U (en) * | 2023-04-19 | 2023-05-26 | 成都万应微电子有限公司 | Packaging structure and electronic device |
Non-Patent Citations (2)
| Title |
|---|
| ULLAH, R ET AL: "Electronic stopping power in a narrow band gap semiconductor from first principles", 《PHYSICAL REVIEW B》, vol. 91, no. 12, 11 March 2015 (2015-03-11), pages 1 - 8 * |
| 蔡有海;文玉梅;李平;余大海;伍会娟;: "LED芯片封装缺陷检测方法研究", 《传感技术学报》, no. 07, 20 July 2009 (2009-07-20), pages 1040 - 1044 * |
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