CN218975436U - Semiconductor device and electronic apparatus - Google Patents
Semiconductor device and electronic apparatus Download PDFInfo
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- CN218975436U CN218975436U CN202320178601.6U CN202320178601U CN218975436U CN 218975436 U CN218975436 U CN 218975436U CN 202320178601 U CN202320178601 U CN 202320178601U CN 218975436 U CN218975436 U CN 218975436U
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Abstract
The embodiment of the application provides a semiconductor device and electronic equipment, the semiconductor device includes: an insulating substrate; a first metal plate disposed on the insulating substrate; a plurality of power semiconductor elements disposed on the first metal plate; a second metal plate disposed on the insulating substrate; a first bonding wire connecting the power semiconductor element and the second metal plate; and a second bonding wire connecting the second metal plate and the output terminal. By providing a metal plate (second metal plate) between the power semiconductor element and the external terminal at a position close to the power semiconductor element, the bonding wire connecting the power semiconductor element and the external terminal can thereby be made to take the metal plate as a transfer point (i.e., the bonding wire connecting the power semiconductor element is connected to the metal plate before being connected to the external terminal), and heat generated by the bonding wire and the power element can be efficiently released.
Description
Technical Field
The present application relates to the field of electronic circuits, and more particularly, to a semiconductor device and an electronic apparatus.
Background
A semiconductor device used for driving a motor or the like includes a power semiconductor element through which a large current flows, mounted on a resin-sealed package. Such a semiconductor device has a structure in which a circuit element is mounted on a heat sink (metal base). This allows the heat sink to efficiently release the heat of the circuit element generated by energizing the circuit to the outside of the resin sealing portion.
In such a semiconductor device, a circuit is arranged in the resin sealing portion, and a circuit element such as a semiconductor element is connected to an external terminal by a bonding wire. With this circuit, when a large current flows through the bonding wire, heat is generated in the bonding wire due to the resistance component and the current of the bonding wire, but the periphery of the bonding wire is entirely surrounded by the resin, and the heat cannot be efficiently released.
In order to avoid the problems caused by the above-described conditions, the prior art proposes the following structure: when connecting the power semiconductor element and the external terminal by the bonding wire, an electrically insulated portion is provided at an intermediate point between the power semiconductor element and the external terminal, and the bonding wire is connected thereto, whereby heat generated in the bonding wire is efficiently released to the outside.
It should be noted that the foregoing description of the background art is only for the purpose of facilitating a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background section of the present application.
Disclosure of Invention
The inventors of the present application found that the prior art embodiment shows a semiconductor device obtained by resin-sealing 1 power semiconductor element, but in the case of being used for motor driving or the like, for example, in the case of driving a three-phase brushless motor, 6 power semiconductor elements are required, and therefore, when these 6 semiconductor elements are mounted on a substrate, a large area is required.
As a semiconductor device capable of reducing a mounting area, an intelligent power module (IPM, intelligent Power Module) is known in which a plurality of power semiconductor elements and drive control elements for the power semiconductor elements are mounted, but in such a semiconductor device, since a state in which the plurality of power semiconductor elements generate heat simultaneously exists, in addition to the heat generation of the bonding wire itself, it is necessary to consider the influence of the heat generation of the power semiconductor elements.
In order to solve at least one of the above problems, an embodiment of the present application provides a semiconductor device and an electronic apparatus, in which, in order to efficiently release heat generated by a bonding wire and heat generated by a power semiconductor element to the outside in the semiconductor device (e.g., IPM), in each power semiconductor element mounted in the semiconductor device, when the power semiconductor element and an external terminal are connected by the bonding wire, the bonding wire connected to the power semiconductor element is connected to a metal plate insulated from other components arranged on a substrate and then connected to the external terminal, the metal plate is located close to the power semiconductor element, and the metal plate is located between the power semiconductor element and the external terminal. By adopting this structure, heat generated by the bonding wire and the power element can be efficiently released.
According to an aspect of an embodiment of the present application, there is provided a semiconductor device including:
an insulating substrate;
a first metal plate disposed on the insulating substrate;
a plurality of power semiconductor elements disposed on the first metal plate;
a second metal plate disposed on the insulating substrate;
a first bonding wire connecting the power semiconductor element and the second metal plate; and
and a second bonding wire connecting the second metal plate and the output terminal.
According to another aspect of the embodiments of the present application, there is provided an electronic apparatus having the semiconductor device described in the foregoing aspect.
The beneficial effects of this application lie in: according to the embodiment of the present application, by providing the metal plate (second metal plate) between the power semiconductor element and the external terminal at a position close to the power semiconductor element, so that the bonding wire connecting the power semiconductor element and the external terminal takes the metal plate as the transfer point (i.e., the bonding wire connecting the power semiconductor element is connected to the metal plate first and then to the external terminal), the heat generated by the bonding wire and the power element can be efficiently released.
Specific embodiments of the present application are disclosed in detail below with reference to the following description and drawings, indicating the manner in which the principles of the present application may be employed. It should be understood that the embodiments of the present application are not limited in scope thereby. The embodiments of the present application include many variations, modifications and equivalents within the spirit and scope of the appended claims.
Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments in combination with or instead of the features of the other embodiments.
It should be emphasized that the term "comprises/comprising" when used herein is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps or components.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art. In the drawings:
fig. 1 is a schematic view of one example of a semiconductor device of an embodiment of the present application;
fig. 2 is a schematic view of another example of a semiconductor device of an embodiment of the present application;
FIG. 3 is a schematic illustration of the dashed portion of FIG. 2;
fig. 4 is a cross-sectional view of the semiconductor device as viewed from the direction of (1) in fig. 3.
Detailed Description
The foregoing and other features of the present application will become apparent from the following description, with reference to the accompanying drawings. In the specification and drawings, there have been specifically disclosed specific embodiments of the present application which are indicative of some of the embodiments in which the principles of the present application may be employed, it being understood that the present application is not limited to the described embodiments, but, on the contrary, the present application includes all modifications, variations and equivalents falling within the scope of the appended claims.
In the embodiments of the present application, the terms "first," "second," and the like are used to distinguish between different elements from each other by reference, but do not denote a spatial arrangement or a temporal order of the elements, and the elements should not be limited by the terms. The term "and/or" includes any and all combinations of one or more of the associated listed terms. The terms "comprises," "comprising," "including," "having," and the like, are intended to reference the presence of stated features, elements, components, or groups of components, but do not preclude the presence or addition of one or more other features, elements, components, or groups of components.
The following describes the implementation of the examples of the present application with reference to the drawings.
Example 1
Embodiment 1 of the present application provides a semiconductor device.
Fig. 1 is a schematic diagram of one example of a semiconductor device of the present embodiment, showing a circuit form of the semiconductor device.
In the example of fig. 1, IPM for driving a three-phase brushless motor is taken as an example. As shown in fig. 1, when a three-phase brushless motor is driven, each phase half-bridge circuit structure is connected to a total of 6 driving power semiconductor elements, and on/off signals corresponding to the states are applied to these power semiconductor elements, whereby the three-phase brushless motor can be driven.
In the example of fig. 1, in order to reduce the mounting area of the circuit component, the function of the broken line portion in fig. 1 may be housed in one package.
Fig. 2 is a schematic diagram of another example of the semiconductor device of the embodiment of the present application, showing a wiring form of the semiconductor device.
In the example of fig. 2, an input signal for driving the three-phase brushless motor is input to a terminal (referred to as an input terminal) arranged on the lower side in fig. 2, and then a drive signal is transmitted from a terminal (output terminal) arranged on the upper side via a gate drive chip on the high voltage side, a gate drive chip on the low voltage side, and a power semiconductor element (for example, siC MOSFET).
In the above embodiment, since the signal transmission is performed through the above-described path, the gate driving chip at the high voltage side and the gate driving chip at the low voltage side are mounted on the lead frame closer to the input terminal at the lower side. Since the power semiconductor element generates a large amount of heat when it is driven by a large current, it is disposed at an upper portion from the center to promote heat dissipation to the outside, and is mounted on a DBC (Direct Bonding Copper) substrate (copper-clad ceramic substrate) having a good heat dissipation property, and is located close to the gate driving chip. Thus, the length of the bonding wire connected to the upper external terminal, which is output from the source of each power semiconductor element, has a certain length.
Fig. 3 is an enlarged schematic view of a broken line portion of the semiconductor device shown in fig. 2; fig. 4 is a cross-sectional view of the semiconductor device as viewed from the direction of (1) shown in fig. 3.
As shown in fig. 3 and 4, the semiconductor device 100 of the embodiment of the present application includes:
an insulating substrate 10;
a first metal plate 20 disposed on the insulating substrate 10;
a plurality of power semiconductor elements 30 provided on the first metal plate 20;
a second metal plate 40 disposed on the insulating substrate 10;
a first bonding wire 50 connecting the power semiconductor element 30 and the second metal plate 40; a kind of electronic device with a high-pressure air-conditioning system.
A second bonding wire 60 connecting the second metal plate 40 and an output terminal of the semiconductor device 100.
According to the above-described embodiment, by providing the metal plate (second metal plate) between the power semiconductor element and the external terminal at a position close to the power semiconductor element, so that the bonding wire connecting the power semiconductor element and the external terminal takes the metal plate as the transfer point (i.e., the bonding wire connecting the power semiconductor element is connected to the metal plate first and then to the external terminal), it is possible to efficiently release the heat generated by the bonding wire and the power element.
In some embodiments, as shown in fig. 3 and 4, a distance l1 between the second metal plate 40 and the power semiconductor element 30 is smaller than a distance l2 between the second metal plate and the lead frame F carrying the output terminal. This can more efficiently dissipate heat.
In the above-described embodiment, as described above, when a large current flows in the bonding wire connecting the power semiconductor element and the external terminal, heat is also generated in the bonding wire due to the resistance component and the current of the bonding wire. In addition, the power semiconductor element also generates heat during operation, and this heat is transferred to the bonding wire, and the temperature of the bonding wire further increases. In addition, when a plurality of gate driving chips (driving elements) exist in a small area, heat generation of adjacent chips is also conducted. On the other hand, the periphery of the bonding wire is covered with a molding resin having low thermal conductivity, and the heat thereof is accumulated in the bonding wire. Therefore, it is necessary to dissipate heat accumulated in the bonding wire.
According to the above embodiment, since the heat generated in the bonding wire is generated not only by the current flowing through the bonding wire but also by the transmission of the heat generated by the power semiconductor element itself, the second metal plate 40 is disposed at a position closer to the power semiconductor element 30 than the output terminal in order to efficiently dissipate the heat, and the embodiment of the present utility model can dissipate the heat at a position as close to the heat generating source (power semiconductor element) as possible. Accordingly, heat generated by the power element (i.e., the power semiconductor element 30) and heat generated by the bonding wires (i.e., the first bonding wire 50 and the second bonding wire 60) can be radiated from the relay substrate (i.e., the second metal plate 40) via the insulating substrate 10, and heat generation of the bonding wire (the second bonding wire 60) on the external terminal side of the relay substrate can be suppressed, thereby improving the reliability of the IPM.
In some embodiments, as shown in fig. 4, the insulating substrate 10 is a DBC substrate, and since the DBC substrate can achieve a better heat dissipation effect, the heat dissipation effect can be further improved by using the DBC substrate as a substrate for mounting the first metal plate 20 and the second metal plate 40.
In some embodiments, as shown in fig. 4, the power semiconductor element 30 and the first metal plate 20 are connected by soldering. By adopting the conventional welding connection mode, the number of parts is saved, the assembly complexity is reduced, the operation area is saved, and the realization cost is low. However, the present application is not limited thereto, and the power semiconductor element 30 and the first metal plate 20 may be connected by other connection methods to achieve other desired functions and effects, for example, to achieve better heat dissipation effect, to use other connection methods, and so on.
In some embodiments, as shown in fig. 4, the semiconductor device 100 may further include a heat dissipation plate 70 and a third metal plate 80 disposed on the heat dissipation plate 70, and the insulating substrate 10 is disposed on the third metal plate 80. This can further improve the heat dissipation effect by the heat dissipation plate 70 and the third metal plate 80.
In the above embodiment, the third metal plate 80 may be omitted, that is, the insulating substrate 10 is directly provided on the heat dissipation plate 70, whereby heat dissipation can be further performed only by the heat dissipation plate 70, and the heat dissipation effect can be improved.
In some embodiments, as shown in fig. 1 and 2, the semiconductor device 100 further includes a gate driving chip connected to the input terminals (INHU, INHV, INHW, INLU, INLV, INLW).
In the above-described embodiment, as shown in fig. 2, the plurality of power semiconductor elements 30 are connected to the gate driving chip, and the plurality of power semiconductor elements 30 are located between the second metal plate 40 and the gate driving chip, for example, at a position above the middle of the entire circuit wiring shown in fig. 2. The length of the bonding wire can be shortened due to the closer distance from the second metal plate 40. And, because of being close to the gate drive chip setting, be convenient for with the connection of gate drive chip.
In the above embodiment, the gate driving chip may include the gate driving chip 91 of the high voltage side and the gate driving chip 92 of the low voltage side. The above embodiments are directed to IPM type semiconductor devices, and other implementations of the gate driving chip are also possible for other types of semiconductor devices, and specific reference may be made to the related art, and the description thereof is omitted here.
In the above-described embodiment, the gate driving chip and the plurality of power semiconductor elements 30 can be packaged in one resin package, whereby the mounting area of the circuit part can be reduced, facilitating miniaturization of the apparatus.
The semiconductor device according to the embodiment of the present application may include other structures, implement other functions, or reduce some structures, and the description thereof is omitted herein with reference to the related art.
According to embodiment 1 of the present application, by providing a metal plate (second metal plate) between the power semiconductor element and the external terminal at a position close to the power semiconductor element such that the bonding wire connecting the power semiconductor element and the external terminal takes the metal plate as a transfer point (i.e., the bonding wire connecting the power semiconductor element is connected to the metal plate first and then to the external terminal), heat generated by the bonding wire and the power element can be efficiently released.
Example 2
The electronic device may also have an input circuit to generate an input signal; in addition, the electronic apparatus may further have a back-end circuit to which a gate voltage generated based on a set signal or a reset signal output from the semiconductor device 100 may be supplied to control on or off of a transistor in the back-end circuit.
According to embodiment 2 of the present application, by providing a metal plate (second metal plate) between the power semiconductor element and the external terminal of the semiconductor device at a position close to the power semiconductor element, so that the bonding wire connecting the power semiconductor element and the external terminal takes the metal plate as a transfer point (i.e., the bonding wire connecting the power semiconductor element is connected to the metal plate before being connected to the external terminal), heat generated by the bonding wire and the power element can be efficiently released.
The present application has been described in connection with specific embodiments, but it should be apparent to those skilled in the art that these descriptions are intended to be illustrative and not limiting. Various modifications and alterations of this application may occur to those skilled in the art in light of the spirit and principles of this application, and are to be seen as within the scope of this application.
Claims (9)
1. A semiconductor device, characterized in that the semiconductor device comprises:
an insulating substrate;
a first metal plate disposed on the insulating substrate;
a plurality of power semiconductor elements disposed on the first metal plate;
a second metal plate disposed on the insulating substrate;
a first bonding wire connecting the power semiconductor element and the second metal plate; and
and a second bonding wire connecting the second metal plate and the lead frame of the output terminal.
2. The semiconductor device of claim 1, wherein,
the distance between the second metal plate and the power semiconductor element is smaller than the distance between the second metal plate and the lead frame.
3. The semiconductor device according to claim 1 or 2, wherein,
the semiconductor device further includes a heat dissipation plate;
the insulating substrate is arranged on the heat dissipation plate.
4. The semiconductor device as claimed in claim 3, wherein,
the semiconductor device further includes a third metal plate;
the third metal plate is located between the heat dissipation plate and the insulating substrate.
5. The semiconductor device according to claim 1 or 2, wherein,
the power semiconductor element and the first metal plate are connected through welding.
6. The semiconductor device according to claim 1 or 2, wherein,
the insulating substrate is a DBC substrate.
7. The semiconductor device according to claim 1 or 2, wherein,
the semiconductor device further includes:
a gate driving chip connected to the input terminal;
the plurality of power semiconductor elements are connected with the gate driving chip, and the plurality of power semiconductor elements are positioned between the second metal plate and the gate driving chip;
the gate driving chip comprises a gate driving chip at a high voltage end and a gate driving chip at a low voltage end.
8. The semiconductor device of claim 7, wherein,
the gate driving chip and the plurality of power semiconductor elements are packaged in one resin package.
9. An electronic device having the semiconductor device according to any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320178601.6U CN218975436U (en) | 2023-01-30 | 2023-01-30 | Semiconductor device and electronic apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320178601.6U CN218975436U (en) | 2023-01-30 | 2023-01-30 | Semiconductor device and electronic apparatus |
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| Publication Number | Publication Date |
|---|---|
| CN218975436U true CN218975436U (en) | 2023-05-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202320178601.6U Active CN218975436U (en) | 2023-01-30 | 2023-01-30 | Semiconductor device and electronic apparatus |
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| CN (1) | CN218975436U (en) |
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- 2023-01-30 CN CN202320178601.6U patent/CN218975436U/en active Active
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