CN218887194U - High-density trench gate IGBT device - Google Patents
High-density trench gate IGBT device Download PDFInfo
- Publication number
- CN218887194U CN218887194U CN202223402325.1U CN202223402325U CN218887194U CN 218887194 U CN218887194 U CN 218887194U CN 202223402325 U CN202223402325 U CN 202223402325U CN 218887194 U CN218887194 U CN 218887194U
- Authority
- CN
- China
- Prior art keywords
- trench
- slot
- wafer
- igbt device
- gate igbt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
The utility model discloses a high density ditch slot gate IGBT device, including projecting pole PAD district and grid PAD district, projecting pole PAD district sets up first slot, grid PAD district sets up the second slot, and the length direction of first slot is mutually perpendicular with the length direction of second slot, and the width of second slot is greater than or is equal to the width of first slot. The utility model discloses a high density trench gate IGBT device, through the slot of the regional direction of other suitable increase perpendicular to tube core in the position outside the projecting pole PAD district on the device, be difficult to the stack effect on the wafer between the stress of equidirectional, can reduce the warpage degree in the production process.
Description
Technical Field
The utility model belongs to the technical field of the semiconductor product, specifically speaking, the utility model relates to a high density trench gate IGBT device.
Background
With the rise of new energy vehicles, insulated Gate Bipolar Transistors (IGBTs) gradually move into the field of vision of people, and play an extremely important role in current social life. The IGBT is one of the most important power semiconductor devices, and it plays an important role in white appliances, electric vehicles, photovoltaic inversion, wind power, energy storage, and rail transit.
The IGBT technology was proposed in the early 20 th century and 80 s, and now the Trench FS IGBT technology became the mainstream through the development of several generations of technologies such as a Planar NPT (non-punch through) IGBT, a Trench NPT IGBT, and a Planar FS (field stop) IGBT, starting from the first Planar PT (punch through) IGBT. The international leading IGBT technology is a high-density trench gate field stop IGBT, and the application of the high-density trench gate technology greatly improves the performance parameters of devices. The high-density deep trench can store a large number of minority carriers in a drift region of the device when the device is conducted, the on-state loss of the device can be reduced, the high-density deep trench can provide reverse voltage-resisting capacity close to a planar junction when reverse blocking is conducted, the most appropriate capacitance ratio can be effectively adjusted by the high-density trench gate, and the high-density deep trench gate has small switching loss and excellent switching characteristics in the switching process.
The conventional high-density trench gate FS IGBT has the structural characteristics of high trench density, deep trench depth, small Pwell size, small contact hole size and the like, and the problem of large wafer warping is caused by excessively high trench density in the wafer production process. The main reason for the large warpage of the wafer is that the polycrystalline silicon in the trench undergoes crystal transformation in a high-temperature process, and the volume of the polycrystalline silicon shrinks to bring large tensile stress to the surface of the wafer, so that the wafer deforms. The wafer warping is too large, which seriously affects the wafer production and manufacturing, firstly, the structure of the high-density trench gate IGBT is very small, the process tolerance is small, and when the wafer warping is too large, the problem of partial photoetching sleeve deviation of the wafer is caused, so that the yield in the wafer is low, and the device cost is high; secondly, the wafer production is a high-precision instrument, and the wafer warping is too large, so that the wafer identification is difficult and normal production and manufacturing cannot be finished; finally, in the wafer production process, the wafer is grabbed by various mechanical arms, the wafer is adsorbed by the table disc, the wafer is difficult to grab and adsorb in the production process due to the fact that the wafer is warped too much, and even the wafer is broken in equipment due to the fact that the wafer is not firmly adsorbed and falls, and the equipment is down.
SUMMERY OF THE UTILITY MODEL
The utility model discloses aim at solving one of the technical problem that exists among the prior art at least. Therefore, the utility model provides a high density trench gate IGBT device, the purpose reduces the warpage degree of device in the production process.
In order to realize the purpose, the utility model discloses the technical scheme who takes does: the high-density trench gate IGBT device comprises an emitting electrode PAD area and a gate electrode PAD area, wherein the emitting electrode PAD area is provided with a first trench, the gate electrode PAD area is provided with a second trench, the length direction of the first trench is vertical to the length direction of the second trench, and the width of the second trench is larger than or equal to that of the first trench.
The width of the first groove is 0.8-1.5um.
The first grooves are arranged in a plurality of numbers, and the distance between every two adjacent first grooves is 0.4-3um.
The width of the second groove is 0.8-1.8um.
The second slot sets up a plurality ofly, and the interval between two adjacent second slots is 0.4-3um.
The length of the first groove is greater than the length of the second groove.
The utility model discloses a density trench gate IGBT device, through the slot of the regional direction of other suitable increase perpendicular to tube core in the position outside the projecting pole PAD district on the device, be difficult to the superposition effect on the wafer between the stress of equidirectional, can reduce the warpage degree in the production process.
Drawings
The description includes the following figures, the contents shown are respectively:
fig. 1 is a top view of the density trench gate IGBT device of the present invention;
FIG. 2 isbase:Sub>A cross-sectional view A-A of FIG. 1;
FIG. 3 is a cross-sectional view B-B of FIG. 1;
FIG. 4 is a schematic diagram of stress distribution of a conventional high-density trench gate IGBT wafer;
labeled as: 1. an emitter PAD region; 2. and a grid PAD area.
Detailed Description
The following detailed description of the embodiments of the present invention will be given with reference to the accompanying drawings, for the purpose of helping those skilled in the art to understand more completely, accurately and deeply the conception and technical solution of the present invention, and to facilitate its implementation.
It should be noted that, in the following embodiments, the "first" and "second" do not represent an absolute distinction relationship in structure and/or function, nor represent a sequential execution order, but merely for convenience of description.
As shown in fig. 1 to 3, the utility model provides a high density trench gate IGBT device, including projecting pole PAD district 1 and grid PAD district 2, set up the die area on the projecting pole PAD district 1, projecting pole PAD district 1 is provided with first slot, and grid PAD district 2 is provided with the second slot, and the length direction of first slot is mutually perpendicular with the length direction of second slot, and the width of second slot is greater than or is equal to the width of first slot.
Specifically, the existing high-density Trench gate IGBT has uniform Trench direction height, stress distribution generated by polysilicon crystal transition in Trench is shown in fig. 4, all stresses are in the same direction during the production process of the wafer, the stresses are seriously superposed, and the wafer has large warpage. The utility model discloses a high density trench gate IGBT device is in the device production process, at grid PAD district 2, the slot that sets up in terminal cut-off ring region, scribing groove region produces the tensile stress of perpendicular to tube core region, the stress stack back of two kinds of not equidirectionals, the direction of stress will no longer be unified, be difficult to between the different stresses superpose and act on the wafer of device, the stress of a certain direction will be littleer on the wafer, the device warpage is littleer, also can not influence the device normal behavior.
As shown in fig. 1, a plurality of first trenches (lateral trenches) are provided, each first trench has polysilicon therein, the width of each first trench is 0.8-1.5um, the distance between two adjacent first trenches is 0.4-3um, and during wafer production, the tensile stress generated by the polysilicon in the first trenches in the die region is longitudinal.
As shown in fig. 1, a second trench (a longitudinal trench) is added at the PAD region 2 of the Gate, the longitudinal trench may be connected with the front Emitter or Gate according to requirements, the second trench is provided with a plurality of second trenches, the second trench has polysilicon therein, the width of the second trench is 0.8-1.8um, the second trench is provided with a plurality of second trenches, and the distance between two adjacent second trenches is 0.4-3um. The distance between every two adjacent second grooves is smaller than or equal to the distance between every two adjacent first grooves, the transverse tensile stress generated by the polycrystalline silicon in the second grooves can be mutually pulled with the longitudinal tensile stress generated by the tube core region, and the internal tensile stress of the wafer cannot be gathered in one direction, so that the warping degree in the wafer production process is reduced.
The invention has been described above by way of example with reference to the accompanying drawings. Obviously, the specific implementation of the present invention is not limited by the above-described manner. Various insubstantial improvements are made by adopting the method conception and the technical proposal of the utility model; or without improvement, the above conception and technical solution of the present invention can be directly applied to other occasions, all within the protection scope of the present invention.
Claims (6)
1. The high-density trench gate IGBT device comprises an emitting electrode PAD area and a gate electrode PAD area, and is characterized in that the emitting electrode PAD area is provided with a first trench, the gate electrode PAD area is provided with a second trench, the length direction of the first trench is vertical to the length direction of the second trench, and the width of the second trench is larger than or equal to that of the first trench.
2. The high density trench gate IGBT device of claim 1, wherein the first trench has a width of 0.8-1.5um.
3. The high-density trench gate IGBT device according to claim 1, wherein the first trenches are arranged in plurality, and the distance between two adjacent first trenches is 0.4-3um.
4. The high density trench gate IGBT device of any one of claims 1 to 3, wherein the width of the second trench is 0.8-1.8um.
5. The high-density trench gate IGBT device according to claim 4, wherein the second trenches are arranged in plurality, and the distance between two adjacent second trenches is 0.4-3um.
6. The high density trench gate IGBT device of any one of claims 1 to 3, characterized in that the length of the first trench is greater than the length of the second trench.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202223402325.1U CN218887194U (en) | 2022-12-19 | 2022-12-19 | High-density trench gate IGBT device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202223402325.1U CN218887194U (en) | 2022-12-19 | 2022-12-19 | High-density trench gate IGBT device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN218887194U true CN218887194U (en) | 2023-04-18 |
Family
ID=85941683
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202223402325.1U Active CN218887194U (en) | 2022-12-19 | 2022-12-19 | High-density trench gate IGBT device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN218887194U (en) |
-
2022
- 2022-12-19 CN CN202223402325.1U patent/CN218887194U/en active Active
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109830532A (en) | Superjunction IGBT device and its manufacturing method | |
CN108682624B (en) | Manufacturing method of IGBT chip with composite gate | |
CN101393928A (en) | Tunnel IGBT with anode in short circuit | |
CN111106168B (en) | Terminal voltage-resistant structure of semiconductor device, semiconductor device and manufacturing method thereof | |
CN105679816A (en) | Trench gate charge storage type IGBT and manufacturing method thereof | |
CN205159322U (en) | MOSFET (metal -oxide -semiconductor field effect transistor) device | |
CN110429134B (en) | IGBT device with asymmetric primitive cells and preparation method | |
CN104637997A (en) | Dual-mode reverse conducting gate commutated thyristor and manufacturing method thereof | |
CN110444586B (en) | Trench gate IGBT device with shunt area and preparation method | |
CN102110717A (en) | Trench metal oxide semiconductor field effect transistor and manufacturing method thereof | |
CN101976670B (en) | Silicon-on-insulator integrated great-current P-type combined semiconductor device | |
CN218887194U (en) | High-density trench gate IGBT device | |
CN113193039A (en) | Manufacturing method of trench type IGBT (insulated gate bipolar transistor) cell structure and trench type IGBT cell structure | |
CN105655385B (en) | The manufacturing method of groove-shaped super-junction device | |
CN104934469A (en) | IGBT terminal structure and manufacturing method thereof | |
CN103022155A (en) | Groove MOS (metal oxide semiconductor) structure Schottky diode and preparation method thereof | |
CN205564757U (en) | Ultra -low power consumption semiconductor power device | |
CN110416079A (en) | The production method of trench gate igbt chip | |
CN112652536B (en) | Preparation method of low-conduction voltage drop planar gate IGBT | |
CN108063159A (en) | The terminal structure of semiconductor power device, semiconductor power device and preparation method thereof | |
CN108831832B (en) | Manufacturing method of groove step gate IGBT chip | |
CN201918387U (en) | P-type combined semiconductor component with silicon-on-insulator (SOI) capable of integrating high current | |
CN111682062A (en) | Back structure of IGBT device, preparation method of back structure and IGBT device | |
CN110690294A (en) | Fast recovery diode | |
CN220065707U (en) | Improved warpage IGBT |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |