CN104637997A - Dual-mode reverse conducting gate commutated thyristor and manufacturing method thereof - Google Patents
Dual-mode reverse conducting gate commutated thyristor and manufacturing method thereof Download PDFInfo
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- CN104637997A CN104637997A CN201510042123.6A CN201510042123A CN104637997A CN 104637997 A CN104637997 A CN 104637997A CN 201510042123 A CN201510042123 A CN 201510042123A CN 104637997 A CN104637997 A CN 104637997A
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- 238000004519 manufacturing process Methods 0.000 title abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 238000002360 preparation method Methods 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 5
- 239000010703 silicon Substances 0.000 claims abstract description 5
- 238000009792 diffusion process Methods 0.000 claims description 40
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 24
- 238000001259 photo etching Methods 0.000 claims description 24
- 239000011248 coating agent Substances 0.000 claims description 22
- 238000000576 coating method Methods 0.000 claims description 22
- 230000000873 masking effect Effects 0.000 claims description 17
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 15
- 229910052782 aluminium Inorganic materials 0.000 claims description 15
- 239000004411 aluminium Substances 0.000 claims description 15
- 238000002161 passivation Methods 0.000 claims description 12
- 239000000377 silicon dioxide Substances 0.000 claims description 12
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 9
- 239000004642 Polyimide Substances 0.000 claims description 9
- 229910052796 boron Inorganic materials 0.000 claims description 9
- 239000012535 impurity Substances 0.000 claims description 9
- 229920001721 polyimide Polymers 0.000 claims description 9
- 235000012239 silicon dioxide Nutrition 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 4
- 239000012528 membrane Substances 0.000 claims description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical group [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 3
- 230000007423 decrease Effects 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 3
- 238000002955 isolation Methods 0.000 claims description 3
- 230000003902 lesion Effects 0.000 claims description 3
- 229910052698 phosphorus Inorganic materials 0.000 claims description 3
- 239000011574 phosphorus Substances 0.000 claims description 3
- 238000004857 zone melting Methods 0.000 claims description 3
- 235000012489 doughnuts Nutrition 0.000 claims description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 2
- 230000003139 buffering effect Effects 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 20
- 238000001459 lithography Methods 0.000 description 14
- 238000005516 engineering process Methods 0.000 description 11
- 230000000903 blocking effect Effects 0.000 description 10
- OQCFWECOQNPQCG-UHFFFAOYSA-N 1,3,4,8-tetrahydropyrimido[4,5-c]oxazin-7-one Chemical compound C1CONC2=C1C=NC(=O)N2 OQCFWECOQNPQCG-UHFFFAOYSA-N 0.000 description 6
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 241001654170 Caladenia catenata Species 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000010141 design making Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- -1 forms thyristor Chemical compound 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
- H01L29/7404—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device
- H01L29/7412—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a diode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66363—Thyristors
- H01L29/66371—Thyristors structurally associated with another device, e.g. built-in diode
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Abstract
The invention provides a dual-mode reverse conducting gate commutated thyristor and a manufacturing method thereof. Each basic unit of the dual-mode reverse conducting gate commutated thyristor comprises two diodes and a gate commutated thyristor between the diodes, wherein the diodes are effectively isolated from the gate commutated thyristor; each diode comprises a P<+> anode, a N<-> substrate, a N' buffering layer and a N<+> cathode in sequence from top to bottom; the gate commutated thyristor longitudinally comprises the cathode of the gate commutated thyristor, a P type base area, a N<-> substrate, a N' buffering layer and a P<+> anode in sequence from top to bottom; the cathode of the gate commutated thyristor consists of three N<+> doping areas; the gates of the gate commutated thyristor are arranged between every two of the three N<+> doping areas. By adopting the dual-mode reverse conducting gate commutated thyristor and the manufacturing method thereof, a silicon chip structure is utilized fully, the cost is lowered, and the current processing performance can be increased greatly; meanwhile, the preparation process of the dual-mode reverse conducting gate commutated thyristor is compatible with the process of the conventional integrated gate commutated thyristor, so that industrialization can be realized.
Description
Technical field
The invention belongs to power semiconductor field, relate to a kind of power semiconductor switching device structure, being specially a kind of bimodulus against leading door pole stream-exchanging thyristor and preparation method thereof.
Background technology
The inverse door pole stream-exchanging thyristor of leading of bimodulus is a kind of power electronic device being integrated with door pole stream-exchanging thyristor (GCT) and diode (Diode) on chip.Its operation principle and traditional integrated gate commutated thyristor similar.In device, GCT is mainly as switch element, and its typical operating state is conducting state, blocking state and State Transferring.Electrode by gate pole, anode and negative electrode.And Diode is mainly as afterflow effect, be a kind of PIN structural, electrode has anode and negative electrode.Work when wherein GCT with Diode is different, research shows that this device will have the features such as electric current is large, blocking voltage is high, switching frequency is high, reliability is high, compact conformation.May be used for various high-tension circuit, as high voltage static switch, flickering compensation arrangement.In this sense, this device will be a kind of superior performance and the device having much characteristic.
Summary of the invention
The object of the present invention is to provide a kind of bimodulus against leading door pole stream-exchanging thyristor and preparation method thereof, Diode accomplishes in GCT according to certain ratio against leading door pole stream-exchanging thyristor by this bimodulus, both intersect to form mutual interdigitated, form the inverse parallel structure of multiple Diode and GCT.Bimodulus of the present invention makes full use of silicon chip structure against leading door pole stream-exchanging thyristor, reduce costs, and greatly can improve current handling capability, simultaneously, this bimodulus provided is inverse leads door pole stream-exchanging thyristor preparation technology and traditional integrated gate commutated thyristor process compatible, can realize industrialization.
For achieving the above object, the technical solution used in the present invention is:
A kind of bimodulus is inverse leads door pole stream-exchanging thyristor, it is characterized in that, the inverse each elementary cell leading door pole stream-exchanging thyristor of described bimodulus comprises two door pole stream-exchanging thyristors between diode and diode, has effective isolation between diode and door pole stream-exchanging thyristor; Described diode longitudinally comprises the P+ anode of diode, N-substrate, N ' resilient coating and N+ negative electrode from top to bottom successively; Described door pole stream-exchanging thyristor longitudinally comprises negative electrode, P type base, N-substrate, N ' resilient coating, the P+ anode of door pole stream-exchanging thyristor from top to bottom successively, and wherein the negative electrode of door pole stream-exchanging thyristor is by the gate pole that 3 N+ doped regions form, N+ doped region arranges door pole stream-exchanging thyristor between any two; N-substrate, the N ' resilient coating of described diode AND gate pole commutated thyristor share, and the negative electrode of described diode and the anode of door pole stream-exchanging thyristor lead door pole stream-exchanging thyristor anode as bimodulus is inverse jointly.
Further, described N ' undoped buffer layer concentration is 1 × 10
14~ 5 × 10
16cm
-3, junction depth is 15 ~ 20um; Described N-substrate doping is 1 × 10
13~ 1 × 10
14cm
-3, thickness is 360 ~ 400um; The doping content of described N ' resilient coating exceeds 1 ~ 2 order of magnitude than N-substrate doping.
Further, the doping content of the negative electrode N+ doped region of described door pole stream-exchanging thyristor is 1 × 10
20~ 5 × 10
19cm
-3, junction depth is 20 ~ 25um; The doping content of the P type base of door pole stream-exchanging thyristor is 1 × 10
17~ 5 × 10
16cm
-3, junction depth is 60 ~ 75um; The doping content of the P+ anode of door pole stream-exchanging thyristor is 5 × 10
18~ 1 × 10
17cm
-3, junction depth is 10 ~ 15um.
Further, the doping content of the P+ anode of described diode is 1 × 10
17~ 5 × 10
16cm
-3, junction depth is 60 ~ 75um; The doping content of the N+ negative electrode of described diode is 1 × 10
20~ 5 × 10
19cm
-3, junction depth is 10 ~ 15um.
Further, the inverse door pole stream-exchanging thyristor of leading of described bimodulus adopts center gate pole, at diameter be Φ 58mm silicon chip on 5 donuts are set, the elementary cell number comprised by the outside each annulus in center is respectively: N1=48, N2=84, N3=120, N4=156, N5=192; Diode AND gate pole commutated thyristor intersects to form interdigital structure mutually.
Further, inverse negative electrode (being the negative electrode of the door pole stream-exchanging thyristor) finger of leading door pole stream-exchanging thyristor of described bimodulus is tree finger-like, stage casing is the rectangle of long 2 ~ 2.6mm, wide 0.2 ~ 0.4mm, and also respectively there is a semicircle at two, and its diameter is wide equal with rectangle.
The inverse preparation method leading door pole stream-exchanging thyristor of described bimodulus, comprises the following steps:
Step 1, adopt the stretching high resistant of zone-melting process, minor diameter monocrystalline silicon to lead door pole stream-exchanging thyristor N-substrate as bimodulus is inverse, doping scope is 1 × 10
13~ 1 × 10
14cm
-3;
Step 2, the P type base adopting twice expansion boron formation door pole stream-exchanging thyristor and diode P+ anode, first masking film is formed in N-substrate face, then photoetching, relevant position formed diffusion window, finally adopt Gaussian, first time diffusion concentration be 1 × 10
17~ 5 × 10
16cm
-3, at 1200 DEG C, spread 1400min, second time diffusion concentration be 1 × 10
17~ 5 × 10
16cm
-3, at 1200 DEG C, spread 120min, junction depth is 60 ~ 75um, and removes masking film;
Step 3, employing Gaussian form N ' resilient coating, and first produce thin oxide layer at N-substrate back, avoid the lens lesion caused, then adopt Gaussian, the concentration of diffusion is 1 × 10
14~ 5 × 10
16cm
-3, at 1200 DEG C, spread 100 ~ 120min, formation junction depth is 15 ~ 20um;
Step 4, employing Double side diffusion form door pole stream-exchanging thyristor negative electrode N+ doped region and diode cathode; First form masking film in N-substrate face, carry out photoetching in relevant position, door pole stream-exchanging thyristor negative electrode N+ doped region, form diffusion window, impurity is phosphorus, and adopt Gaussian, the concentration of diffusion is 1 × 10
20~ 5 × 10
19cm
-3; Then on N-substrate back N ' resilient coating, form masking film, at diode cathode relevant position photolithographic diffusion window, adopt Gaussian, the concentration of diffusion is 1 × 10
20~ 5 × 10
19cm
-3, at 1200 DEG C, spread 100 ~ 120min, junction depth is 20 ~ 25um; Finally remove masking film;
Step 5, employing Gaussian form door pole stream-exchanging thyristor P+ anode, first on N-substrate back N ' resilient coating, form masking film, form diffusion window in the photoetching of door pole stream-exchanging thyristor P+ anode relevant position, impurity is boron, adopt Gaussian, diffusion concentration is 1 × 10
17~ 5 × 10
16cm
-3, at 1150 DEG C diffusion time 120 ~ 180min, junction depth is 60 ~ 75um, finally removes masking film;
Step 6, the grooving of door pole stream-exchanging thyristor gate pole and benefit expand figure, and first at the silica membrane of N-substrate face deposit one deck, carry out photoetching in the place of grooving and form window, adopt dry etching, etching depth is 10 ~ 15um; And the decline of concentration is shown in order to compensate gate pole, carry out boron diffusion, adopt Gaussian, impurity concentration is 1 × 10
17~ 5 × 10
16cm
-3, at 1100 DEG C, diffusion 30 ~ 45min, finally removes silicon dioxide film;
Step 7, bimodulus anti-carve aluminium and the passivation of polyimide passivation film against leading door pole stream-exchanging thyristor, first at N-substrate face deposit layer of silicon dioxide film, carry out photoetching in the place anti-carving aluminium and form window, then carrying out deposit aluminium is 3 ~ 5um to thickness, forms each electrode; Finally removing silica membrane, carry out the passivation of diaphragm polyimides, being prepared into bimodulus against leading door pole stream-exchanging thyristor.
Technique effect of the present invention is:
1) bimodulus provided by the invention is inverse that lead door pole stream-exchanging thyristor inversely with conventional gate to lead compared with door pole stream-exchanging thyristor, improves on state current, reduces on-state voltage drop;
2) bimodulus provided by the invention respectively introduces a semicircle against leading door pole stream-exchanging thyristor at negative electrode finger two ends, improves the inverse forward blocking voltage of leading door pole stream-exchanging thyristor of bimodulus, makes device have good switch recovery characteristics simultaneously;
3) bimodulus provided by the invention is inverse leads the preparation technology of door pole stream-exchanging thyristor and the process compatible of domestic existing production door pole stream-exchanging thyristor, be conducive to realizing the inverse actual production leading door pole stream-exchanging thyristor of bimodulus, reduce manufacture craft difficulty and cost.
Accompanying drawing explanation
Fig. 1 is the inverse elementary cell cross-sectional view leading door pole stream-exchanging thyristor of bimodulus.
Fig. 2 is that bimodulus is against leading door pole stream-exchanging thyristor N-substrate doping schematic diagram.
Fig. 3 is that bimodulus is against leading the P type base of door pole stream-exchanging thyristor GCT and the P+ doped anode schematic diagram of Diode.
Fig. 4 is the inverse resilient coating N ' doping schematic diagram of leading door pole stream-exchanging thyristor of bimodulus.
Fig. 5 is the negative electrode doping schematic diagram of bimodulus against the negative electrode N+ doped region and Diode of leading door pole stream-exchanging thyristor GCT.
Fig. 6 is the inverse P+ doped anode schematic diagram of leading door pole stream-exchanging thyristor GCT of bimodulus.
Fig. 7 is inverse gate pole grooving and the benefit expansion schematic diagram of leading door pole stream-exchanging thyristor GCT of bimodulus.
Fig. 8 is that bimodulus anti-carves aluminium and polyimide passivation film schematic diagram against leading door pole stream-exchanging thyristor.
Fig. 9 is that bimodulus is against leading negative electrode P district lithography layout in door pole stream-exchanging thyristor preparation technology.
Figure 10 is that bimodulus is against leading N+ district lithography layout in door pole stream-exchanging thyristor preparation technology.
Figure 11 is that bimodulus is against leading structure gate pole grooving lithography layout in door pole stream-exchanging thyristor preparation technology.
Figure 12 is that bimodulus mends expansion lithography layout against leading gate pole in door pole stream-exchanging thyristor preparation technology.
Figure 13 is that bimodulus is against leading door pole stream-exchanging thyristor preparation technology Anodic P district lithography layout.
Figure 14 is that inverse the leading in door pole stream-exchanging thyristor preparation technology of bimodulus anti-carves aluminium lithography layout.
Figure 15 is that bimodulus is against leading polyimide passivation film lithography layout in door pole stream-exchanging thyristor preparation technology.
To be that bimodulus is inverse lead door pole stream-exchanging thyristor, conventional gate commutated thyristor and inversely lead door pole stream-exchanging thyristor forward conduction Character Comparison schematic diagram Figure 16.
Figure 17 is that bimodulus is against leading door pole stream-exchanging thyristor and inverse contrast schematic diagram of leading door pole stream-exchanging thyristor reverse blocking voltage.
Figure 18 is that inverse door pole stream-exchanging thyristor, conventional gate commutated thyristor and the inverse turn-off characteristic of leading door pole stream-exchanging thyristor of leading of bimodulus contrasts schematic diagram.
Embodiment
The present invention gives the inverse technical scheme leading door pole stream-exchanging thyristor of a kind of bimodulus, bimodulus is inverse leads the structure of door pole stream-exchanging thyristor as shown in Figure 1, and a kind of bimodulus is inverse leads door pole stream-exchanging thyristor, comprising: GCT, Diode, and the isolated area between GCT and Diode.GCT is longitudinally comprising the P+ anode region of the negative electrode N+ doped region of GCT, the P type base of GCT, N-substrate, N ' resilient coating and GCT from top to bottom successively.Diode is longitudinally comprising the N+ cathodic region of the P type base of Diode, N-substrate, N ' resilient coating and Diode from top to bottom successively.N-substrate is the N-substrate that GCT and Diode shares, and N ' resilient coating is the public resilient coating of GCT and Diode.
Fig. 2 gives bimodulus against leading door pole stream-exchanging thyristor N-substrate doping schematic diagram.High resistant, minor diameter monocrystalline that substrate mainly uses zone-melting process stretching.The forward blocking voltage of the concentration Main Basis device layout of the doping of substrate, lower doping content is conducive to device and bears higher forward blocking voltage.Doping scope is 1 × 10
13~ 1 × 10
14cm
-3.
Fig. 3 gives bimodulus against leading the P type base of door pole stream-exchanging thyristor GCT and the P+ doped anode schematic diagram of Diode.The base P concentration of GCT part affects switching characteristic and the gate pole parameter characteristic of device, adopts the base P of schematic design making GCT and the doping of Diode anode P of expanding boron for twice.First showing the thin oxide layer growing one deck 5nm, masking film is formed.GCT base P and Diode anode P carry out photoetching, forms diffusion window.Adopt Gaussian, the concentration that first time spreads is 1 × 10
17~ 5 × 10
16cm
-3, at 1200 DEG C, spread 1400min, the concentration of second time diffusion is 1 × 10
17~ 5 × 10
16cm
-3, at 1200 DEG C, spread 120min.The junction depth formed is 60 ~ 75um, and removes the oxide layer that whole device shows.
Fig. 4 gives bimodulus inverse resilient coating N ' doping schematic diagram of leading door pole stream-exchanging thyristor.Resilient coating is to improve device inside Electric Field Distribution, and the thickness of resilient coating is all thinner.Grow the thin oxide layer of one deck 5nm at silicon chip back side, avoid the lens lesion caused.Gaussian, the concentration of diffusion is 1 × 10
14~ 5 × 10
16cm
-3, at 1200 DEG C, spread 100 ~ 120min.Formation junction depth is 15 ~ 20um.
Fig. 5 gives the negative electrode doping schematic diagram of the negative electrode N+ doped region and Diode of bimodulus against leading door pole stream-exchanging thyristor GCT.Double side diffusion during this technique.First showing the thin oxide layer growing one deck 5nm, forming masking film, GCT base P carries out photoetching, form diffusion window, impurity is phosphorus, and adopt Gaussian, the concentration of diffusion is 1 × 10
20~ 5 × 10
19cm
-3; Then show the thin oxide layer growing one deck 5nm overleaf, form Diode negative electrode diffusion window, adopt Gaussian, the concentration of diffusion is 1 × 10
20~ 5 × 10
19cm
-3.At 1200 DEG C, spread 100 ~ 120min, junction depth is 20 ~ 25um, and removes the oxide layer that whole device shows.
Fig. 6 gives bimodulus inverse P+ anode region doping schematic diagram of leading door pole stream-exchanging thyristor GCT.First showing the thin oxide layer growing one deck 5nm, forming masking film, in GCT anode P+ district's photoetching, forming diffusion window.Impurity is boron, and adopt Gaussian, diffusion concentration is 1 × 10
17~ 5 × 10
16cm
-3, at 1150 DEG C diffusion time 120 ~ 180min, junction depth is 60 ~ 75um, finally removes the whole oxide-film shown.
Fig. 7 gives bimodulus inverse gate pole grooving and benefit expansion schematic diagram of leading door pole stream-exchanging thyristor GCT.First at the silicon dioxide showing deposit one deck 10nm.Needing the place of grooving to carry out photoetching, forming the window of grooving, adopt dry etching, etching depth is 10 ~ 15um.Showing the decline of concentration in order to compensate gate pole, carrying out boron diffusion.Gaussian, impurity concentration is 1 × 10
17~ 5 × 10
16cm
-3, at 1100 DEG C, advance 30 ~ 45min.Finally remove the whole silicon dioxide shown.
Fig. 8 gives bimodulus and anti-carves aluminium and polyimide passivation film schematic diagram against leading door pole stream-exchanging thyristor.Anti-carve each electrode that aluminium mainly forms thyristor, first at the silicon dioxide showing deposit 10nm, needing the place anti-carving aluminium to carry out photoetching, form window.Adopt the method for deposit aluminium again, the thickness of deposit aluminium is 3 ~ 5um, forms electrode.Finally remove the silicon dioxide shown, carry out the passivation of diaphragm polyimides.
By to the inverse analysis leading door pole stream-exchanging thyristor technique of a kind of bimodulus, obtain the inverse laying out pattern scheme leading door pole stream-exchanging thyristor of a kind of bimodulus, the making of whole chip needs 6 photoetching.
Fig. 9 gives bimodulus against leading door pole stream-exchanging thyristor negative electrode P district lithography layout.This photoetching defines the inverse P district led in the cathodic region of door pole stream-exchanging thyristor and the PNP of isolation of a kind of bimodulus.In figure tiny rectangular be the anode of Diode part, its finger length is 2.6mm, and finger width is 0.2mm, respectively has a radius to be the semicircle of 0.1mm on both sides, and finger is spaced apart 0.5mm between transverse direction; Finger larger in figure is the base P of GCT part, in order to improve the disposal ability of electric current, is set to trapezoidal shape.
Figure 10 gives bimodulus against leading door pole stream-exchanging thyristor N+ district lithography layout.This photoetching forms inverse negative electrode and the Diode negative electrode partly of leading the GCT part of door pole stream-exchanging thyristor of a kind of bimodulus.Structure as shown in Figure 1, the inverse door pole stream-exchanging thyristor GCT part of leading of a kind of bimodulus is containing 3 cathode electrode units.This photoetching uses double face photoetching machine, forms the negative electrode of GCT part and the negative electrode of Diode part simultaneously.In figure, the length of negative electrode finger elects 2.6mm as, and finger width is 0.2mm, respectively has a radius to be the semicircle of 0.1mm on both sides, and finger is spaced apart 0.5mm between transverse direction.
Figure 11 gives bimodulus against leading door pole stream-exchanging thyristor structure gate pole grooving lithography layout.This photoengraving is to form corrosion window, isolates a kind of GCT and Diode part.The place of Figure 11 empty is the position of negative electrode finger, and the zone of opacity between negative electrode finger is the place needing corrosion and grooving.
Figure 12 is that the inverse door pole stream-exchanging thyristor gate pole of leading of bimodulus mends expansion lithography layout.The object of this photoetching is the doping content in order to improve gate pole, and this region is exactly the base P of GCT part.The P base of GCT part affects turn-on characteristics and the gate pole parameter characteristic of device, and after the grooving etching of Fig. 8 technique, therefore surface concentration reduces needs the concentration spreading P base again.In Figure 12, the P base of trapezoidal expression GCT part, blank is between the two expressed as to be needed to mend the region expanded.
Figure 13 gives bimodulus against leading door pole stream-exchanging thyristor anode P district lithography layout.This photoetching defines the inverse anode of leading door pole stream-exchanging thyristor of a kind of bimodulus.In order to improve the disposal ability of electric current, be set to trapezoidal shape.
Figure 14 gives bimodulus and anti-carves aluminium lithography layout against leading door pole stream-exchanging thyristor.This photoetching forms electrode to show at device.Need in Figure 14 to form the scope that the region of electrode is exactly finger, in Figure 14, negative electrode finger length elects 2.6mm as, respectively has a radius to be the semicircle of 0.1mm on both sides, and finger is spaced apart 0.5mm between transverse direction, and the width of finger is 0.34mm.
Figure 15 gives bimodulus against leading door pole stream-exchanging thyristor polyimide passivation film lithography layout.This photoetching shows to form medium protection film at device.In Figure 15, passive area is the dark finger that white finger inside is contained and the region do not comprised beyond white.Wherein, white portion is the electrode anti-carving aluminium formation, the visible Figure 14 of concrete size.Need the dark finger of passivation white portion to be of a size of, finger length is 2.6mm, and finger width is 0.2mm, respectively has a radius to be the semicircle of 0.12mm on both sides, and finger is spaced apart 0.5mm between transverse direction.
Figure 16 gives bimodulus against leading door pole stream-exchanging thyristor and conventional gate commutated thyristor forward conduction Character Comparison schematic diagram.In figure, abscissa represents on state voltage, and ordinate is current density size.Find out from Figure 16, under same current density, the inverse on-state voltage drop of leading door pole stream-exchanging thyristor device of bimodulus is all less than integrated gate commutated thyristor; Under same on state voltage, the inverse current density leading door pole stream-exchanging thyristor device of bimodulus is all greater than integrated gate commutated thyristor device.At 100A/cm
2under electric current, the inverse on-state voltage drop of leading door pole stream-exchanging thyristor of bimodulus is about 1.4V.
Figure 17 is the inverse contrast schematic diagram of leading door pole stream-exchanging thyristor and conventional gate commutated thyristor reverse blocking voltage of bimodulus.Upper as can be seen from figure, bimodulus is inverse leads the forward blocking voltage that door pole stream-exchanging thyristor bears and is higher than integrated gate commutated thyristor, and the maximum blocking voltage that device can bear is 5000V.
Figure 18 is that the inverse turn-off characteristic of leading door pole stream-exchanging thyristor and conventional gate commutated thyristor of bimodulus contrasts schematic diagram.As seen from the figure, the bimodulus inverse turn-off time of leading door pole stream-exchanging thyristor will be longer than integrated gate commutated thyristor.This is mainly because bimodulus is comparatively large against the on state current of leading door pole stream-exchanging thyristor, and inner non equilibrium carrier is more, and under identical minority carrier controlled technique, the time of recovery is just longer.The bimodulus inverse turn-off time of leading door pole stream-exchanging thyristor is about 2us.
The present invention gives bimodulus against leading door pole stream-exchanging thyristor and preparation method thereof, and on the preparation method basis determined, give bimodulus inverse laying out pattern of leading door pole stream-exchanging thyristor.By to the optimization of laying out pattern and design, improve inverse on-state characteristic and the forward blocking characteristic leading door pole stream-exchanging thyristor of bimodulus.The production technology scheme of the process program that the present invention adopts and existing integrated gate commutated thyristor is compatible, is conducive to realizing the inverse actual production leading door pole stream-exchanging thyristor of bimodulus, and reduces manufacture craft difficulty and cost.
Claims (7)
1. a bimodulus is against leading door pole stream-exchanging thyristor, it is characterized in that, the inverse each elementary cell leading door pole stream-exchanging thyristor of described bimodulus comprises two door pole stream-exchanging thyristors between diode and diode, has effective isolation between diode and door pole stream-exchanging thyristor; Described diode longitudinally comprises the P+ anode of diode, N-substrate, N ' resilient coating and N+ negative electrode from top to bottom successively; Described door pole stream-exchanging thyristor longitudinally comprises negative electrode, P type base, N-substrate, N ' resilient coating, the P+ anode of door pole stream-exchanging thyristor from top to bottom successively, and wherein the negative electrode of door pole stream-exchanging thyristor is by the gate pole that 3 N+ doped regions form, N+ doped region arranges door pole stream-exchanging thyristor between any two; N-substrate, the N ' resilient coating of described diode AND gate pole commutated thyristor share, and the negative electrode of described diode and the anode of door pole stream-exchanging thyristor lead door pole stream-exchanging thyristor anode as bimodulus is inverse jointly.
2. lead door pole stream-exchanging thyristor by bimodulus described in claim 1 is inverse, it is characterized in that, described N ' undoped buffer layer concentration is 1 × 10
14~ 5 × 10
16cm
-3, junction depth is 15 ~ 20um; Described N-substrate doping is 1 × 10
13~ 1 × 10
14cm
-3, thickness is 360 ~ 400um; The doping content of described N ' resilient coating exceeds 1 ~ 2 order of magnitude than N-substrate doping.
3. lead door pole stream-exchanging thyristor by bimodulus described in claim 1 is inverse, it is characterized in that, the doping content of the negative electrode N+ doped region of described door pole stream-exchanging thyristor is 1 × 10
20~ 5 × 10
19cm
-3, junction depth is 20 ~ 25um; The doping content of the P type base of door pole stream-exchanging thyristor is 1 × 10
17~ 5 × 10
16cm
-3, junction depth is 60 ~ 75um; The doping content of the P+ anode of door pole stream-exchanging thyristor is 5 × 10
18~ 1 × 10
17cm
-3, junction depth is 10 ~ 15um.
4. lead door pole stream-exchanging thyristor by bimodulus described in claim 1 is inverse, it is characterized in that, the doping content of the P+ anode of described diode is 1 × 10
17~ 5 × 10
16cm
-3, junction depth is 60 ~ 75um; The doping content of the N+ negative electrode of described diode is 1 × 10
20~ 5 × 10
19cm
-3, junction depth is 10 ~ 15um.
5. lead door pole stream-exchanging thyristor by bimodulus described in claim 1,2,3 or 4 is inverse, it is characterized in that, the inverse door pole stream-exchanging thyristor of leading of described bimodulus adopts center gate pole, at diameter be Φ 58mm silicon chip on 5 donuts are set, the elementary cell number comprised by the outside each annulus in center is respectively: N1=48, N2=84, N3=120, N4=156, N5=192; Diode AND gate pole commutated thyristor intersects to form interdigital structure mutually.
6. lead door pole stream-exchanging thyristor by bimodulus described in claim 5 is inverse, it is characterized in that, inverse negative electrode (being the negative electrode of the door pole stream-exchanging thyristor) finger of leading door pole stream-exchanging thyristor of described bimodulus is tree finger-like, stage casing is the rectangle of long 2 ~ 2.6mm, wide 0.2 ~ 0.4mm, also respectively there is a semicircle at two, and its diameter is wide equal with rectangle.
7., by the inverse preparation method leading door pole stream-exchanging thyristor of bimodulus described in claim 1, comprise the following steps:
Step 1, adopt the stretching high resistant of zone-melting process, minor diameter monocrystalline silicon to lead door pole stream-exchanging thyristor N-substrate as bimodulus is inverse, doping scope is 1 × 10
13~ 1 × 10
14cm
-3;
Step 2, the P type base adopting twice expansion boron formation door pole stream-exchanging thyristor and diode P+ anode, first masking film is formed in N-substrate face, then photoetching, relevant position formed diffusion window, finally adopt Gaussian, first time diffusion concentration be 1 × 10
17~ 5 × 10
16cm
-3, at 1200 DEG C, spread 1400min, second time diffusion concentration be 1 × 10
17~ 5 × 10
16cm
-3, at 1200 DEG C, spread 120min, junction depth is 60 ~ 75um, and removes masking film;
Step 3, employing Gaussian form N ' resilient coating, and first produce thin oxide layer at N-substrate back, avoid the lens lesion caused, then adopt Gaussian, the concentration of diffusion is 1 × 10
14~ 5 × 10
16cm
-3, at 1200 DEG C, spread 100 ~ 120min, formation junction depth is 15 ~ 20um;
Step 4, employing Double side diffusion form door pole stream-exchanging thyristor negative electrode N+ doped region and diode cathode; First form masking film in N-substrate face, carry out photoetching in relevant position, door pole stream-exchanging thyristor negative electrode N+ doped region, form diffusion window, impurity is phosphorus, and adopt Gaussian, the concentration of diffusion is 1 × 10
20~ 5 × 10
19cm
-3; Then on N-substrate back N ' resilient coating, form masking film, at diode cathode relevant position photolithographic diffusion window, adopt Gaussian, the concentration of diffusion is 1 × 10
20~ 5 × 10
19cm
-3, at 1200 DEG C, spread 100 ~ 120min, junction depth is 20 ~ 25um; Finally remove masking film;
Step 5, employing Gaussian form door pole stream-exchanging thyristor P+ anode, first on N-substrate back N ' resilient coating, form masking film, form diffusion window in the photoetching of door pole stream-exchanging thyristor P+ anode relevant position, impurity is boron, adopt Gaussian, diffusion concentration is 1 × 10
17~ 5 × 10
16cm
-3, at 1150 DEG C diffusion time 120 ~ 180min, junction depth is 60 ~ 75um, finally removes masking film;
Step 6, the grooving of door pole stream-exchanging thyristor gate pole and benefit expand figure, and first at the silica membrane of N-substrate face deposit one deck, carry out photoetching in the place of grooving and form window, adopt dry etching, etching depth is 10 ~ 15um; And the decline of concentration is shown in order to compensate gate pole, carry out boron diffusion, adopt Gaussian, impurity concentration is 1 × 10
17~ 5 × 10
16cm
-3, at 1100 DEG C, diffusion 30 ~ 45min, finally removes silicon dioxide film;
Step 7, bimodulus anti-carve aluminium and the passivation of polyimide passivation film against leading door pole stream-exchanging thyristor, first at N-substrate face deposit layer of silicon dioxide film, carry out photoetching in the place anti-carving aluminium and form window, then carrying out deposit aluminium is 3 ~ 5um to thickness, forms each electrode; Finally removing silica membrane, carry out the passivation of diaphragm polyimides, being prepared into bimodulus against leading door pole stream-exchanging thyristor.
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| CN110061052A (en) * | 2019-04-30 | 2019-07-26 | 江苏捷捷微电子股份有限公司 | High forward blocking voltage gate sensitive triggering unidirectional controlled silicon chip and manufacturing method |
| CN111969054A (en) * | 2020-08-20 | 2020-11-20 | 湖南大学 | Reverse conducting SiC GTO semiconductor device and preparation method thereof |
| CN112838084A (en) * | 2021-01-05 | 2021-05-25 | 湖南大学 | SiC GTO and MESFET integrated structure and manufacturing method thereof |
| CN115136318A (en) * | 2020-02-25 | 2022-09-30 | 日立能源瑞士股份公司 | Integrated Gate Commutated Thyristor (IGCT) |
| CN115346979A (en) * | 2022-10-18 | 2022-11-15 | 富芯微电子有限公司 | TVS device based on thyristor structure and manufacturing method thereof |
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| CN111969054A (en) * | 2020-08-20 | 2020-11-20 | 湖南大学 | Reverse conducting SiC GTO semiconductor device and preparation method thereof |
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