CN218769519U

CN218769519U - Semiconductor chip packaging structure, lead frame and semiconductor chip packaging mold

Info

Publication number: CN218769519U
Application number: CN202223144381.XU
Authority: CN
Inventors: 谢治丞
Original assignee: Fuman Microelectronics Group Co ltd
Current assignee: Fuman Microelectronics Group Co ltd
Priority date: 2022-11-25
Filing date: 2022-11-25
Publication date: 2023-03-28
Anticipated expiration: 2032-11-25

Abstract

The utility model provides a semiconductor chip packaging structure, a lead frame and a semiconductor chip packaging mold, wherein the semiconductor chip packaging structure comprises a packaging base, and one end of the packaging base is a leading-out end electrically connected with an external circuit; the chip is adhered to the supporting top surface of the packaging base; the lead connecting terminal is arranged on one side of the packaging base back to the lead-out end and comprises a connecting end electrically connected with the chip and a chip end attached to the PCB; and the packaging shell covers the top surface of the support, wraps the chip and the connecting end and exposes the leading-out end and the patch end outside the packaging shell. According to the semiconductor chip packaging structure, the traditional bent pin arranged by extending the shell is replaced by the extended lead terminal arranged in the packaging shell, so that the area of a chip base is enlarged under the limited base island area of a lead frame, and the semiconductor chip packaging structure is suitable for packaging large-area chips; the lead connecting terminal can replace the traditional packaging structure and directly adopts the surface mount technology to assemble with the PCB without changing the structural layout of the existing PCB and the PIN welding feet thereof.

Description

Semiconductor chip packaging structure, lead frame and semiconductor chip packaging mold

Technical Field

The utility model relates to a semiconductor chip packaging technology field, concretely relates to semiconductor chip packaging structure, lead frame and semiconductor chip packaging mold.

Background

The packaging technology is a technology for packaging a semiconductor integrated circuit chip by insulating plastic or ceramic materials, and is crucial to chip manufacturing process, because the chip needs to be isolated from the outside to prevent impurities in the air from corroding the chip so as to cause the electrical performance of the chip to be reduced; in addition, the packaged chip is more convenient to mount, transport and store.

The semiconductor chip is welded on the chip base and the pins of the base island of the lead frame through leads, and then the chip base and the pins are packaged in the packaging shell through the packaging mold, so that the process of forming the semiconductor chip packaging structure is an important technical link in the semiconductor chip packaging technology.

In the conventional semiconductor chip package structure, an extended bent pin is usually disposed on one side of a chip base, and the bent pin is completely exposed out of a package housing after being packaged. Since the base island area of the lead frame is usually certain (time and cost are consumed for changing the base island layout), the extended bent pins occupy more base island space and area, so that the area of the chip base for adhering and supporting the chip is correspondingly reduced, and the chip base cannot be adapted to chip packaging with larger area. In addition, the bending pin which is completely exposed out of the packaging shell after packaging is not suitable for the widely popular semiconductor chip and PCB mounting process at present.

Therefore, the existing semiconductor chip packaging structure adopts the prolonged bent pins, which causes the reduction of the chip placement area of the substrate and is not suitable for the chip mounting process, which is a technical problem to be solved urgently in the field.

SUMMERY OF THE UTILITY MODEL

The utility model discloses a solve among the above-mentioned prior art semiconductor chip packaging structure and adopt the extension buckle the pin and lead to the base island chip to place the area and reduce, be unsuitable the technical problem of chip paster technology, provide a semiconductor chip packaging structure, lead frame and semiconductor chip packaging mould.

For solving the above technical problem, the utility model discloses a technical scheme is:

the utility model provides a semiconductor chip packaging structure, include:

a packaging base, one end of which is a leading-out terminal electrically connected with an external circuit;

a chip adhered to the top support surface of the package base;

the plurality of lead terminals are arranged on one side of the packaging base back to the lead terminals and comprise connecting ends electrically connected with the chip and chip terminals used for being connected with the PCB chips;

and the packaging shell covers the top surface of the support, wraps the chip and the connecting end and exposes the leading-out end and the patch end outside the packaging shell.

Preferably, the connection terminal includes:

the first terminal and the second that connect that the interval set up lead the terminal, the first link that connects leads the terminal is perpendicular to the first paster end that connects the terminal that leads.

Preferably, the terminal surface of the leading-out end is provided with a notch groove, the notch groove penetrates through the packaging base along the thickness direction of the packaging base, the notch groove extends along the longer edge direction of the terminal surface of the leading-out end, and the extension length of the notch groove accounts for more than two-thirds of the longer edge length of the terminal surface of the leading-out end.

Preferably, the packaging base is provided with a pair of filling holes at intervals near the leading-out end, so that the packaging shell can be filled and locked on the packaging base.

Preferably, the package housing is provided with a pair of transfer sockets on two side surfaces of the leading end, respectively, for inserting the transfer device and transferring the semiconductor chip package structure.

Preferably, the top surface of the package housing facing away from the package base is provided with a reference hole for the transfer device to be inserted into the package housing.

Preferably, the packaging base adopts a rectangular base plate, and one side end of the rectangular base plate is a leading-out end;

the packaging shell comprises an upper shell and a lower shell which are mutually butted, the butted surfaces of the upper shell and the lower shell are superposed on the top surface of the support, and the lower shell is pasted on the other three side ends of the rectangular base plate.

The utility model also provides a lead frame, including the many groups of frame groups of adjacent setting, frame group is including a plurality of foretell semiconductor chip packaging structure along certain array orientation one-to-one adjacent butt joint, and every semiconductor chip packaging structure draws forth end and adjacent semiconductor chip packaging structure draw forth the end and dock on the array orientation, and every semiconductor chip packaging structure's paster end and adjacent semiconductor chip packaging structure's paster end dock on the array orientation.

Preferably, included angles exist between the four side lines of the supporting top surface of the packaging base and the arrangement direction, and the included angles are smaller than 90 degrees and larger than 0 degree.

The utility model also provides a semiconductor chip packaging mold, including last mould and lower mould, go up mould and lower mould and can laminate and form a plurality of die cavities, the die cavity is used for the foretell lead frame's of shaping semiconductor chip packaging structure.

Compared with the prior art, the semiconductor chip packaging structure provided by the utility model adopts the extended lead terminals arranged in the packaging shell to replace the bending pins arranged by the traditional shell extension, enlarges the chip base and the area of bearing the chip under the limited base island area of the lead frame, and is applicable to the packaging of large-area chips; meanwhile, the lead terminals of the semiconductor chip packaging structure can directly replace the traditional packaging structure after packaging, and are directly assembled with the PCB by adopting a surface mount technology without changing the structural layout of the traditional PCB and PIN welding feet and welding spots thereof.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that are needed in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that, the drawings in the following description are only some embodiments of the invention, and other drawings can be obtained by those skilled in the art without inventive exercise.

Fig. 1 is a schematic top view of a semiconductor chip package structure according to an embodiment of the present invention;

fig. 2 is a schematic bottom view of a semiconductor chip package structure according to an embodiment of the present invention;

fig. 3 is a schematic side view of a semiconductor chip package structure according to an embodiment of the present invention;

fig. 4 is a front view of a semiconductor chip package structure according to an embodiment of the present invention.

Wherein, in the drawings, the reference numerals are mainly as follows:

1. a package base; 11. leading out the terminal; 111. a notch groove; 12. a top support surface; 2. a lead terminal; 21. a first lead terminal; 211. a connecting end; 212. a patch end; 22. a second lead terminal; 3. a package housing; 31. an upper housing; 32. a lower housing; 4. a filler hole; 5. a transferring socket; 6. a reference hole.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly understood, the following description is made in conjunction with the accompanying fig. 1-4 and the embodiments to further explain the principles and structures of the present invention in detail. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention.

Referring to fig. 1-4, the present invention provides a semiconductor chip package structure, including:

a mounting base 1 having a terminal 11 at one end for electrical connection with an external circuit; a chip bonded to the top support surface 12 of the package base 1; the lead terminals 2 are arranged on one side of the packaging base 1, which is opposite to the lead terminals 11, and comprise connecting ends 211 electrically connected with the chip and chip terminals 212 used for being connected with the chip of the PCB; and a package body 3 covering the supporting top surface 12 and wrapping the chip and the connecting terminal 211, wherein the terminals 11 and the chip terminals 212 are exposed outside the package body 3.

In the present embodiment, the connection terminal 2 includes: the first lead terminal 21 and the first lead terminal 22 are arranged at an interval, and the connection end 211 of the first lead terminal 21 is perpendicular to the patch end 212 of the first lead terminal 21. As an embodiment of the present embodiment, an extending direction provided between the package base 1 and the lead terminal 2 is a longitudinal direction of the package housing 3, a direction perpendicular to the longitudinal direction is a width direction of the package housing 3, and an extending direction between the supporting top surface 12 of the package base 1 and a bottom surface thereof facing away from the supporting top surface 12 is a thickness direction of the package housing 3; the connection end 211 of the first lead terminal 21 extends in the width direction of the package housing 3. As a more preferable embodiment, the connection end 211 of the first lead terminal 21 extends in the width direction of the package housing 3 by more than half the length of the package housing 3 in the width direction thereof.

In one embodiment, the first lead terminal 21 is a power transmission terminal, and the first lead terminal 22 is a working heat dissipation terminal. In other embodiments, the terminal 2 further includes a third terminal 2, or further terminal 2 is included to provide further power transmission terminals or tool heat dissipation terminals.

In one embodiment, the end surface of the terminal 11 is provided with a notch groove 111, the notch groove 111 penetrates through the package base along the thickness direction of the package base, the notch groove 111 extends along the longer edge direction of the end surface of the terminal 11, and the extension length of the notch groove 111 occupies more than two thirds of the longer edge length of the end surface of the terminal 11. After the lead frame is packaged, when the leading-out ends 11 of the adjacent semiconductor chip packaging structures are cut off, wherein the leading-out ends 11 of the adjacent semiconductor chip packaging structures are butted with one another at one side of the leading-out ends 11 of the semiconductor chip packaging structures, the leading-out ends 11 of the adjacent semiconductor chip packaging structures are butted with one another, so that the corresponding notch grooves 111 of the leading-out ends 11 of the adjacent semiconductor chip packaging structures form a complete opening, and the opening can serve as a precut opening when the adjacent semiconductor chip packaging structures are cut off, so that the adjacent semiconductor chip packaging structures can be conveniently and quickly disconnected.

In an embodiment, a pair of filling holes 4 is formed at a position of the package base 1 near the leading-out end 11 at an interval, so that during packaging, an unformed package housing 3 in the package module is filled and locked on the package base, so that the packaged package housing 3 can more stably and firmly package the package base 1.

In one embodiment, the package housing 3 is provided with a pair of transfer sockets 5 on two side surfaces of the terminals 11 for the transfer device to insert and transfer the semiconductor chip package, so that the semiconductor chip package can be transferred from the package mold to the next production process by the transfer device after the package is completed.

As a preferred embodiment, the top surface of the package housing 3 facing away from the package base 1 is provided with a reference hole 6 for positioning and inserting the transferring device into the package housing 3, so as to assist the transferring device to accurately position and pick or clamp the semiconductor chip package structure.

In one embodiment, the package base 1 is a rectangular base plate, and one side end of the rectangular base plate is a terminal 11; the package housing 3 includes an upper housing 31 and a lower housing 32 which are butted against each other, the abutting surface of the upper housing 31 and the lower housing 32 is overlapped with the supporting top surface 12, the lower housing 32 is attached to the other three side ends of the rectangular base plate, the abutting surface between the upper housing 31 and the lower housing 32 corresponds to the parting surface between the upper die and the lower die of the package mold, and the upper housing 31 and the lower housing 32 are formed by respectively injecting the package material into the upper cavity of the upper die and the lower cavity of the lower die. The encapsulation housing 3 is preferably injection molded using a plastic or ceramic material as an encapsulation material.

The utility model also provides a lead frame, including the many groups of frame groups of adjacent setting, frame group is including a plurality of foretell semiconductor chip packaging structure along certain array orientation adjacent butt joint one by one, and every semiconductor chip packaging structure draws forth end 11 and adjacent semiconductor chip packaging structure draw forth end 11 and dock in the array orientation, and every semiconductor chip packaging structure's paster end 212 docks in the array orientation with adjacent semiconductor chip packaging structure's paster end 212.

In one embodiment, the four side lines of the top supporting surface 12 of the package base 1 in the form of a rectangular base plate have included angles with the arrangement direction, the included angles are smaller than 90 degrees and larger than 0 degree, and the connecting ends 211 of the lead terminals 2 are adapted to the included angles.

The utility model also provides a semiconductor chip packaging mold, including locating the device of moulding plastics and by the device drive of moulding plastics, can go up mould and lower mould of compound die from top to bottom, go up mould and lower mould and can laminate the die cavity that forms a plurality of semiconductor chip packaging structure (of packaging shell 3) that are used for the above-mentioned lead frame of injection moulding when the compound die.

The above description is only exemplary of the present invention and should not be construed as limiting the present invention, and any modifications, equivalents and improvements made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.

Claims

1. A semiconductor chip package structure, comprising:

a chip bonded to the top support surface of the package base;

the plurality of lead terminals are arranged on one side of the packaging base back to the lead terminals and comprise connecting ends electrically connected with the chip and patch ends used for being connected with a PCB patch; the lead connecting terminal comprises a first lead connecting terminal and a second lead connecting terminal which are arranged at intervals, and the connecting end of the first lead connecting terminal is perpendicular to the patch end of the first lead connecting terminal;

and the packaging shell covers the top surface of the support and wraps the chip and the connecting end, and the leading-out end and the patch end are exposed outside the packaging shell.

2. The semiconductor chip package structure according to claim 1, wherein the end surface of the terminal has a notch groove, the notch groove penetrates the package base along a thickness direction of the package base, the notch groove extends along a longer edge of the end surface of the terminal, and an extension length of the notch groove accounts for more than two-thirds of the longer edge of the end surface of the terminal.

3. The semiconductor chip package of claim 1, wherein the package base has a pair of filler holes spaced near the lead-out end for the package housing to fill and lock to the package base.

4. The semiconductor chip package according to claim 1, wherein the package housing has a pair of transfer sockets on two side surfaces of the terminals for inserting a transfer device and transferring the semiconductor chip package.

5. The semiconductor chip package structure of claim 4, wherein a top surface of the package housing facing away from the package base is provided with a reference hole for the transfer device to be inserted into.

6. The semiconductor chip package according to any one of claims 1 to 5, wherein the package base is a rectangular base plate, and one side end of the rectangular base plate is the terminal.

7. The semiconductor chip package structure of claim 6, wherein the package housing comprises an upper housing and a lower housing butted against each other, wherein the butted surfaces of the upper housing and the lower housing are overlapped with the top supporting surface, and the lower housing is attached to the other three side ends of the rectangular base plate.

8. A lead frame comprising a plurality of sets of frame groups arranged adjacently, wherein the frame groups comprise a plurality of semiconductor chip package structures according to any one of claims 1 to 7, which are adjacently butted one by one along a certain arrangement direction, the leading-out terminal of each semiconductor chip package structure is butted with the leading-out terminal of the adjacent semiconductor chip package structure in the arrangement direction, and the die bonding terminal of each semiconductor chip package structure is butted with the die bonding terminal of the adjacent semiconductor chip package structure in the arrangement direction.

9. The lead frame according to claim 8, wherein the four edges of the top support surface of the package base are at an angle with respect to the alignment direction, the angle being less than 90 degrees and greater than 0 degrees.

10. A semiconductor chip packaging mold, comprising an upper mold and a lower mold, wherein the upper mold and the lower mold can be fitted to form a plurality of cavities for molding the semiconductor chip packaging structure of the lead frame according to claim 8 or 9.