CN218734268U - Miniaturized delay line frequency-locking phase-locking circuit - Google Patents
Miniaturized delay line frequency-locking phase-locking circuit Download PDFInfo
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- CN218734268U CN218734268U CN202222984817.XU CN202222984817U CN218734268U CN 218734268 U CN218734268 U CN 218734268U CN 202222984817 U CN202222984817 U CN 202222984817U CN 218734268 U CN218734268 U CN 218734268U
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Abstract
The utility model relates to a miniaturized delay line frequency-locked phase-locked circuit, which comprises a phase-locked loop circuit and a frequency-locked loop circuit, wherein the phase-locked loop circuit is connected with the frequency-locked loop circuit; the frequency locking loop circuit comprises a power divider, a delayer, a phase shifter, a frequency mixer and a filter; the output end of the power divider is respectively connected with the input ends of the delayer and the phase shifter, the output ends of the phase shifter and the delayer are connected with the input end of the frequency mixer, and the output end of the frequency mixer is connected with the input end of the filter. The utility model discloses a with whole circuit device optimal design, both can satisfy present miniaturization and universalization trend, newly introduce the device in addition and be more excellent in the aspect of stray.
Description
Technical Field
The utility model relates to an electron radio frequency technology field especially relates to a miniaturized delay line lock phase locking circuit frequently.
Background
In the continuous development of high and new electronic technologies, radio frequency and microwave technologies have been used not only in military but also in civil fields, such as navigation, communication, rapid reconnaissance, television broadcasting, signal transmission, and the like. With the continuous application, the research of signal generation technology has a very important position in electronic test due to the fundamental role of signals in the signal generation technology. In the current frequency synthesis technology, a phase-locked loop is used as a mainstream frequency source generator, and the phase-locked loop has the advantages of being high in frequency range, low in phase noise, good in stray suppression and the like. However, the delay line in the delay line frequency discrimination technology needs stable non-dispersive delay, which is generally realized by using a cable, the delay of the cable depends on the length, if better phase noise improvement is to be realized, a cable of tens of meters is needed, and because the development of the technology is limited by the problems of the length and the weight of the cable, the delay line frequency-locked phase-locked cable is more applied to cases such as a signal source, and the like, and the requirement of increasingly miniaturization of products cannot be met.
It is noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure and therefore may include information that does not constitute prior art that is already known to a person of ordinary skill in the art.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome prior art's shortcoming, provide a miniaturized time delay line lock phase circuit frequently, solved the problem that exists in the current time delay line lock phase cable frequently.
The purpose of the utility model is realized through the following technical scheme: a miniaturized delay line frequency-locking phase-locking circuit comprises a phase-locking loop circuit and a frequency-locking loop circuit, wherein the phase-locking loop circuit is connected with the frequency-locking loop circuit; the frequency locking loop circuit comprises a power divider, a delayer, a phase shifter, a frequency mixer and a filter; the output end of the power divider is respectively connected with the input ends of the delayer and the phase shifter, the output ends of the phase shifter and the delayer are connected with the input end of the frequency mixer, and the output end of the frequency mixer is connected with the input end of the filter.
The phase-locked loop circuit comprises a phase discriminator, a loop filter, an adder, an oscillator and a frequency divider; the output end of the phase discriminator is connected with the input end of the loop filter, the output end of the loop filter is connected with the input end of the adder, the output end of the adder is connected with the input end of the oscillator, the output end of the oscillator is connected with the input end of the frequency divider, and the output end of the frequency divider is connected with the input end of the phase discriminator.
The output end of the filter is connected with the input end of the adder, the output end of the oscillator is connected with the input end of the power divider, an input signal is input from the phase discriminator, and an output signal is output from the oscillator.
The utility model has the advantages of it is following: a miniaturized delay line frequency-locking phase-locking circuit can meet the current miniaturization and generalization trend by optimally designing the whole circuit device, and a newly introduced device is better in stray aspect.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the detailed description of the embodiments of the present application provided below in connection with the appended drawings is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application. The present invention will be further described with reference to the accompanying drawings.
As shown in fig. 1, the utility model relates to a miniaturized delay line frequency-locked phase-locked circuit, which comprises a phase-locked loop circuit and a frequency-locked loop circuit, wherein the phase-locked loop circuit is connected with the frequency-locked loop circuit; the frequency locking loop circuit comprises a power divider, a delayer, a phase shifter, a frequency mixer and a filter; the output end of the power divider is respectively connected with the input ends of the delayer and the phase shifter, the output ends of the phase shifter and the delayer are connected with the input end of the mixer, and the output end of the mixer is connected with the input end of the filter.
Furthermore, the phase-locked loop circuit comprises a phase discriminator, a loop filter, an adder, an oscillator and a frequency divider; the output end of the phase discriminator is connected with the input end of the loop filter, the output end of the loop filter is connected with the input end of the adder, the output end of the adder is connected with the input end of the oscillator, the output end of the oscillator is connected with the input end of the frequency divider, and the output end of the frequency divider is connected with the input end of the phase discriminator.
Further, the output end of the filter is connected with the input end of the adder, the output end of the oscillator is connected with the input end of the power divider, the input signal is input from the phase discriminator, and the output signal is output from the oscillator.
The working process of the utility model is as follows: as shown in fig. 1, the left part i mainly comprises a phase detector, a loop filter, an oscillator (voltage controlled), a frequency divider, etc., wherein the phase detector compares the phases of two signals and is used for outputting f of the oscillator (voltage controlled) 0 And input f i Extracting the phase information and converting the extracted information into a voltage u proportional to the phase d (t), although this voltage is not free from high frequency components and noise, a loop filter is introduced to improve this voltage, but this low pass filter has other important characteristics: such as loop stability, loop bandwidth, phase noise, lock time, etc., are closely related to it, so its choice is particularly critical. The voltage-controlled oscillator is a substantially linear voltage-frequency device, the output frequency of which is controlled by the output voltage of the loop filter and gradually approaches to the frequency of the reference input signal until the two have the same frequency and the phase error reaches the voltage-controlled oscillatorThe required voltage at this frequency point reaches a locked state.
And a frequency locking ring structure block diagram of the right II. After a signal output by an oscillator (voltage control) enters a frequency locking ring, the signal is divided into two paths by a power divider: one of the paths passes through the delay line, and because the delay time at different frequencies is the same, when the frequency is actually changed, the phase has a certain error, namely the delay line is used for converting the frequency information of the signal into phase information; the other path passes through the variable phase shifter, so that the signal has a phase shift to ensure the orthogonality with the first path of signal. The two paths of signals are subjected to different processing and then enter a mixing type phase discriminator to obtain frequency error information, and the frequency error information is filtered and fed back to a phase-locked loop to improve loop phase noise.
The utility model discloses can change the delay device into band pass filter, realize through adjusting band pass filter group delay index that the signal has a great time delay behind the wave filter, change the wave filter and select big time delay broadband wave filter generally speaking, the wave filter is undulant little in required output frequency range internal group delay when the bandwidth is wide enough, is convenient for calculate required number of degrees of shifting the phase.
The utility model discloses an utilize wave filter group delay characteristic to improve the back to the circuit, the lock ring circuit volume has very big reduction frequently, and all device sizes all can be integrated inside little module in the circuit, and need not take the delay line outward, and chips such as accessible MEMS wave filter are in the same place circuit integration moreover, realize more extensive scene and use.
The foregoing is illustrative of the preferred embodiments of the present invention, and it is to be understood that the invention is not limited to the precise forms disclosed herein, and that various other combinations, modifications, and environments may be resorted to, falling within the scope of the invention as defined by the appended claims. But that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the invention, which is to be limited only by the claims appended hereto.
Claims (3)
1. The utility model provides a miniaturized delay line lock frequency phase-locked circuit which characterized in that: the phase-locked loop circuit is connected with the frequency-locked loop circuit; the frequency locking loop circuit comprises a power divider, a delayer, a phase shifter, a frequency mixer and a filter; the output end of the power divider is respectively connected with the input ends of the delayer and the phase shifter, the output ends of the phase shifter and the delayer are connected with the input end of the frequency mixer, and the output end of the frequency mixer is connected with the input end of the filter.
2. The miniaturized delay line frequency-locked phase-locked circuit of claim 1, wherein: the phase-locked loop circuit comprises a phase discriminator, a loop filter, an adder, an oscillator and a frequency divider; the output end of the phase discriminator is connected with the input end of the loop filter, the output end of the loop filter is connected with the input end of the adder, the output end of the adder is connected with the input end of the oscillator, the output end of the oscillator is connected with the input end of the frequency divider, and the output end of the frequency divider is connected with the input end of the phase discriminator.
3. A miniaturized delay line frequency-locked phase-locked circuit as claimed in claim 2, wherein: the output end of the filter is connected with the input end of the adder, the output end of the oscillator is connected with the input end of the power divider, an input signal is input from the phase discriminator, and an output signal is output from the oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222984817.XU CN218734268U (en) | 2022-11-09 | 2022-11-09 | Miniaturized delay line frequency-locking phase-locking circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222984817.XU CN218734268U (en) | 2022-11-09 | 2022-11-09 | Miniaturized delay line frequency-locking phase-locking circuit |
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| CN218734268U true CN218734268U (en) | 2023-03-24 |
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| CN202222984817.XU Active CN218734268U (en) | 2022-11-09 | 2022-11-09 | Miniaturized delay line frequency-locking phase-locking circuit |
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- 2022-11-09 CN CN202222984817.XU patent/CN218734268U/en active Active
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