CN217983333U - Packaging structure of SMD SO23C discrete semiconductor device - Google Patents

Packaging structure of SMD SO23C discrete semiconductor device Download PDF

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Publication number
CN217983333U
CN217983333U CN202221850069.XU CN202221850069U CN217983333U CN 217983333 U CN217983333 U CN 217983333U CN 202221850069 U CN202221850069 U CN 202221850069U CN 217983333 U CN217983333 U CN 217983333U
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China
Prior art keywords
segmentation
iii
metal pin
semiconductor device
metal
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CN202221850069.XU
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Chinese (zh)
Inventor
李尚哲
李明芬
陈育峰
黄凯军
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Anhui Jixin Microelectronics Technology Co ltd
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Anhui Jixin Microelectronics Technology Co ltd
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Priority to CN202221850069.XU priority Critical patent/CN217983333U/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The utility model discloses a packaging structure of SMD SO23C discrete semiconductor device relates to discrete semiconductor device chip package technical field, including metal lead frame base island, discrete semiconductor device chip, metal pin one and metal pin two, metal pin one is including connecting portion, segmentation I that connect gradually, segmentation II and segmentation III, and metal pin two is including segmentation II I, segmentation II and segmentation two III that connect gradually, and a plurality of recesses have been seted up at the bottom edge of the plastic-sealed body, segmentation III and segmentation two III can insert respectively in the recess that corresponds. The utility model discloses set up the recess in the bottom of the plastic-sealed body, metal pin one's segmentation III and metal pin two's segmentation two III can partially insert the recess, and metal pin one like this and metal pin two are littleer in the ascending shared area of projection of vertical side, therefore metal lead frame base island and semiconductor discrete device chip can adopt bigger size.

Description

Packaging structure of SMD SO23C discrete semiconductor device
Technical Field
The utility model relates to a SMD SO23C discrete semiconductor device's packaging structure belongs to discrete semiconductor device chip technical field.
Background
The conventional chip-on-insulator SOT23 semiconductor discrete device adopts a gull-shaped metal pin form as shown in FIG. 1, and the pin form has a significant disadvantage that the bottom of the pin extends away from the chip. When viewed from a top view, the gull-shaped metal pins protrude outwards, and the area of the plastic package body can be only reduced under the condition of limited overall size, so that the size of the semiconductor discrete device chip is also correspondingly reduced, and the compatibility of a plurality of large semiconductor discrete device chips is reduced under the condition.
How to increase the area of a semiconductor discrete device chip within a limited size becomes a technical problem to be solved urgently in the field.
SUMMERY OF THE UTILITY MODEL
The utility model provides a packaging structure of SMD SO23C discrete semiconductor device to solve among the above-mentioned prior art urgent need reduce pin area, increase discrete semiconductor device chip area's problem in limited size.
In order to realize the purpose, the utility model discloses a technical scheme be:
the utility model provides a SMD SO23C discrete semiconductor device's packaging structure, including metal lead frame base island, discrete semiconductor device chip and plastic-sealed body, one side of metal lead frame base island is connected with metal pin I, one side that discrete semiconductor device chip kept away from metal pin I is connected with metal pin II through the metal bonding wire, metal pin I is including the connecting portion that connects gradually, segmentation I, segmentation II and segmentation III, metal pin II is including segmentation II I that connects gradually, segmentation II and segmentation II III, segmentation I and segmentation II I are the level and highly uniform, segmentation I III and segmentation II III are the level and highly uniform, segmentation II are perpendicular with segmentation I, segmentation II and segmentation II I are perpendicular, a plurality of recesses have been seted up to the bottom edge of plastic-sealed body, segmentation III and segmentation II can insert respectively in the corresponding recess.
Specifically, the first section III and the second section III are partially inserted into the corresponding grooves, and gaps are reserved between the first section III and the second section III and the corresponding grooves.
Specifically, the bottom surfaces of the first section III and the second section III extend out of the groove.
Specifically, one side of the metal lead frame base island, which is far away from the semiconductor discrete device chip, is provided with an extension part extending out of the plastic package body.
Compared with the prior art, the beneficial effects of the utility model are that:
the bottom of the plastic package body is provided with the groove, and the first subsection III of the first metal pin and the second subsection III of the second metal pin can be partially inserted into the groove, so that the area occupied by the projection of the first metal pin and the second metal pin in the vertical direction is smaller, the metal lead frame base island and the semiconductor discrete device chip can adopt larger sizes, and gaps are reserved between the first subsection III and the second subsection III and the groove, so that when the first metal pin and the second metal pin are welded on a bonding pad, solder paste can climb onto the upper surfaces of the first subsection III and the second subsection III from the gaps, and the first subsection III and the second subsection III are fully covered; the extension part is arranged at the bottom of the metal lead frame base island and can be contacted with the printed circuit board, so that the heat dissipation effect of the semiconductor discrete device chip is improved.
Drawings
Fig. 1 is a schematic diagram of a gull-shaped metal pin of a surface mount type SOT23 semiconductor discrete device in the prior art;
fig. 2 is a top perspective view of the present invention;
fig. 3 is a perspective view of the utility model from bottom view;
fig. 4 is a schematic view of the internal structure of the present invention;
fig. 5 is a plan view of the internal structure of the present invention;
FIG. 6 is a schematic plan view of the overall structure of the present invention;
fig. 7 is a perspective view of the utility model with a heat dissipation structure.
In the figure: 1. the semiconductor package comprises a plastic package body, 11, gull-shaped metal pins, 12, first metal pins, 121, first and second segments I and 122, first and second segments II and 123, first and third segments 124 and 124, a connecting part 13, second metal pins, 131, first and second segments I and 132, second and second segments 133 and second segments III and 14, a groove 15, a metal lead frame base island 16, a semiconductor discrete device chip 17, an adhesive substance 18, metal bonding wires 19 and an extending part.
Detailed Description
The technical solutions in the implementations of the present invention will be apparent from and fully described in conjunction with the accompanying drawings, which illustrate only some, but not all, embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.
As shown in fig. 2 to fig. 7, an embodiment of the present invention provides a package structure of a surface mount type SO23C discrete semiconductor device, including a metal lead frame base island 15 and a discrete semiconductor device chip 16, a bonding substance 17 is bonded between the discrete semiconductor device chip 16 and the metal lead frame base island 15, the bonding substance 17 may be solder paste or conductive adhesive, and the discrete semiconductor device chip 16 and the metal lead frame base island 15 can be firmly fixed by using the bonding substance 17.
As can be seen from fig. 4 and 5, a metal pin one 12 is fixedly connected to one side of the metal lead frame base island 15, and the semiconductor discrete device chip 16 on the side of the metal lead frame base island 15 away from the metal pin one 12 is connected to two metal pins two 13 through two metal bonding wires 18. The metal bonding wire 18, the semiconductor discrete device chip 16, the whole metal lead frame base island 15 and the parts of the first metal pin 12 and the second metal pin 13 are wrapped by a plastic package process to form the plastic package body 1, and the plastic package process is a conventional technology for manufacturing the plastic package body 1 in the field.
As can be seen from fig. 5, the first metal pin 12 can be divided into a first segment i 121, a second segment ii 122, a first segment iii 123 and a connecting portion 124, wherein the connecting portion 124 is fixedly connected with the base island 15 of the metal lead frame, the connecting portion 124, the first segment i 121, the second segment ii 122 and the first segment iii 123 are connected in sequence, the top of the first segment i 121 is substantially flush with the top of the discrete semiconductor device chip 16, the first segment ii 122 is located on the lower side of the first segment i 121 and perpendicular to the first segment i 121, the first segment i 121 is connected with the second segment ii 122 through an arc transition, the first segment iii 123 is parallel to the first segment i 121, the first segment iii 123 is also connected with the second segment ii 122 through an arc transition, and the first segment iii 123 extends towards the plastic package body 1; the second metal pin 13 can be divided into a second segment i 131, a second segment ii 132 and a second segment iii 133 which are connected in sequence, wherein a metal bonding wire 18 is connected between one end of the second segment i 131 close to the discrete semiconductor device chip 16 and the discrete semiconductor device chip 16, the second segment i 131 is flush with the first segment i 121, the second segment ii 132 is positioned at the lower side of the second segment i 131 and is perpendicular to the second segment i 131, the second segment i 131 is in arc transition connection with the second segment ii 132, the second segment iii 133 is parallel to the first segment iii 123, the second segment iii 133 is in arc transition connection with the second segment ii 132, and the second segment iii 133 also extends towards the plastic package body 1. Compare gull type metal pin 11's the form of outwards extending, the utility model discloses a metal pin 12 and two 13 projection area on vertical side are littleer, consequently can be with the metal lead frame foundation island 15 and the semiconductor discrete device chip 16 do bigger, and then satisfy multiple specification chip size's encapsulation.
As can be seen from fig. 3 and 6, three grooves 14 respectively matched with two second metal pins 13 and one first metal pin 12 are formed in the bottom edge of the plastic package body 1, the first segment iii 123 and the second segment iii 133 are respectively partially inserted into the corresponding grooves 14, a gap is left between the first segment iii 123 and the second segment iii 133 and the inner wall of the corresponding groove 14, and the bottoms of the first segment iii 123 and the second segment iii 133 extend out of the grooves 14. As shown in fig. 6, since the segment iii 123 and the segment iii 133 are partially inserted into the groove 14, the projection of the segment iii 123 and the segment iii 133 in the vertical direction intersects with the projection of the plastic package body 1, which further reduces the projection area of the metal pin one 12 and the metal pin two 13 in the vertical direction, that is, the area of the metal lead frame base island 15 and the semiconductor discrete device chip 16 can be further increased. When bonding metal pin one 12 and metal pin two 13 to the pads, the solder paste may climb from the gap onto the upper surfaces of segment one iii 123 and segment two iii 133, substantially covering segment one iii 123 and segment two iii 133.
As an embodiment of the present invention, an extension portion 19 can be added to the bottom of the metal lead frame base island 15, the extension portion 19 can be integrally formed with the metal lead frame base island 15, and the extension portion 19 can extend out of the plastic package body 1. By providing the extension portion 19 at the bottom of the metal lead frame base island 15, the extension portion 19 can be brought into contact with the printed wiring board, increasing the heat dissipation effect of the semiconductor discrete device chip 16.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the embodiments may be appropriately combined to form other embodiments understood by those skilled in the art.

Claims (4)

1. The utility model provides a chip type SO23C discrete semiconductor device's packaging structure, includes metal lead frame base island (15), discrete semiconductor device chip (16) and plastic-sealed body (1), one side of metal lead frame base island (15) is connected with metal pin (12), and one side that discrete semiconductor device chip (16) kept away from metal pin (12) is connected with metal pin two (13) through metal bonding wire (18), its characterized in that, metal pin one (12) are including connecting portion (124), segmentation I (121), segmentation II (122) and segmentation III (123) that connect gradually, metal pin two (13) are including segmentation II (131), segmentation II (132) and segmentation II (133) that connect gradually, segmentation I (121) and segmentation II (131) are the level and highly uniform, segmentation III (123) and segmentation II (133) are the level and highly uniform, segmentation II (122) are perpendicular with segmentation I (121), segmentation II (132) and segmentation II (131) are perpendicular, the edge of segmentation I (131) is the vertical, the edge of segmentation II (14) is seted up respectively in the segmentation II (133).
2. The packaging structure of the SMD SO23C discrete semiconductor device according to claim 1, wherein said first segment III (123) and said second segment III (133) are both partially inserted into the corresponding recesses (14), and a gap is left between each of said first segment III (123) and said second segment III (133) and the corresponding recess (14).
3. The packaging structure of the SMD SO23C discrete semiconductor device according to claim 1, wherein bottom surfaces of said first segment III (123) and said second segment III (133) extend out of said groove (14).
4. The packaging structure of the paster type SO23C semiconductor discrete device according to claim 1, wherein the side of the metal lead frame base island (15) far away from the semiconductor discrete device chip (16) is provided with an extension part (19) extending out of the plastic package body (1).
CN202221850069.XU 2022-07-18 2022-07-18 Packaging structure of SMD SO23C discrete semiconductor device Active CN217983333U (en)

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Application Number Priority Date Filing Date Title
CN202221850069.XU CN217983333U (en) 2022-07-18 2022-07-18 Packaging structure of SMD SO23C discrete semiconductor device

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Application Number Priority Date Filing Date Title
CN202221850069.XU CN217983333U (en) 2022-07-18 2022-07-18 Packaging structure of SMD SO23C discrete semiconductor device

Publications (1)

Publication Number Publication Date
CN217983333U true CN217983333U (en) 2022-12-06

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