CN217499400U

CN217499400U - Coating carrier

Info

Publication number: CN217499400U
Application number: CN202221564244.9U
Authority: CN
Inventors: 赵锋; 毛卫平; 任明冲; 徐锐; 杨伯川
Original assignee: Dongfang Risheng Changzhou New Energy Co ltd
Current assignee: Dongfang Risheng Changzhou New Energy Co ltd
Priority date: 2022-06-21
Filing date: 2022-06-21
Publication date: 2022-09-27
Anticipated expiration: 2032-06-21

Abstract

The application relates to the technical field of photovoltaics, and relates to a coating carrier. The carrier comprises a bearing panel and a plurality of hollowed-out grooves. A plurality of fretwork recesses set up on bearing the weight of the panel. The hollow grooves are arranged in the bearing panel in a matrix mode and used for bearing the silicon wafer. The hollow groove comprises two first supporting edges arranged in parallel and two second supporting edges arranged in parallel; the first supporting edge and the second supporting edge are vertically arranged; the length of the first supporting edge is greater than that of the second supporting edge, and the width of the second supporting edge is greater than that of the first supporting edge. The coating carrier can be suitable for TCO coating process in the production process of the rectangular heterojunction battery. The width of the second supporting edge is larger than that of the first supporting edge, so that the expansion amount of the first supporting edge can be compensated, the mask amount of the long side and the mask amount of the short side of the silicon wafer are consistent, and the problems of battery leakage and low filling factor caused by the fact that the mask is too small can be solved; or the problem that the mask is too large to cause short-current loss of the battery.

Description

Coating carrier

Technical Field

The application relates to the technical field of photovoltaics, in particular to a coating carrier.

Background

The heterojunction solar cell (HIT) technology is an efficient technical route which attracts high industrial attention in recent years, and becomes the industry-recognized next-generation commercial photovoltaic industrial technology due to high photoelectric conversion efficiency, excellent performance, large cost reduction space and good price-balancing internet prospect.

At present, a sliced battery, namely a rectangular battery, is generally adopted for improving the CTM and reducing internal electric loss, when a conventional complete battery piece is sliced and cut, certain damage can be caused to the battery piece, particularly to a heterojunction and other high-efficiency batteries, in the process of slicing, laser can cause thermal damage to a passivation layer in a cutting and slicing area, so that the efficiency is reduced, therefore, a primary silicon wafer is firstly sliced before the battery is produced at present, and then the battery is prepared. For a heterojunction solar cell, when the cell is prepared, a TCO film layer needs to be plated on a sliced silicon wafer.

In the heterojunction solar cell, the TCO coating layer is mainly formed by magnetron sputtering or reactive plasma deposition, and a tray is required to be used as a carrier for bearing a silicon wafer in the coating process in the deposition process. In the TCO coating process, firstly, a silicon wafer is placed in a designed tray, the tray is conveyed to vacuum coating equipment through a transmission system, and a TCO film layer is deposited on the surface of the silicon wafer in the vacuum coating equipment by a magnetron sputtering or reactive plasma deposition method to form a TCO film with a certain thickness; after deposition is finished, the tray with the silicon wafer is conveyed out of the vacuum chamber through the transmission system, film coating is finished, and the silicon wafer coated with the TCO film can be taken out of the tray.

The TCO film layer is used for electrical conduction and antireflection, and a mask is generally provided on the back or front side of the cell in order to prevent the conduction of the front and back electrodes.

The thinning of silicon wafers is a necessary trend in the development of heterojunction solar cells. When a mask is prepared on a rectangular silicon wafer, particularly a thin rectangular silicon wafer at present, the problems of battery leakage and low filling factor caused by too small mask often occur; or the problem of short current loss of the battery caused by overlarge mask.

SUMMERY OF THE UTILITY MODEL

The embodiment of the application aims to provide a coating carrier, which can be suitable for a TCO coating process in a rectangular heterojunction battery production process and solve the problems of battery leakage and low filling factor caused by too small mask; or the problem of short current loss of the battery caused by overlarge mask.

The application provides a coating film carrier includes:

a load bearing panel; and

a plurality of hollowed-out grooves; the matrix type is arranged in the bearing panel and is used for bearing the silicon chip; the hollow groove comprises two first supporting edges arranged in parallel and two second supporting edges arranged in parallel; the first supporting edge and the second supporting edge are vertically arranged; the length of the first supporting edge is greater than that of the second supporting edge, and the width of the second supporting edge is greater than that of the first supporting edge.

The coating carrier can be suitable for TCO coating process in the production process of the rectangular heterojunction battery. The hollow grooves are arranged in the bearing panel in a matrix mode and used for bearing the silicon wafer. The hollowed-out groove can contain the rectangular silicon wafer. The length of the first supporting edge of the hollow groove is larger than that of the second supporting edge, when the TCO film layer is plated, the expansion amount of the first supporting edge of the hollow groove after being heated is larger than that of the second supporting edge, the width of the second supporting edge is larger than that of the first supporting edge, and the expansion amount of the first supporting edge can be compensated, so that the mask amount of the long side and the short side of the silicon wafer is consistent, and the problems of battery leakage and low filling factor caused by the fact that the mask is too small can be solved; or the problem of short current loss of the battery caused by overlarge mask.

In other embodiments of the present application, the hollow groove is elongated.

The hollowed-out grooves are in a long and narrow shape, so that the rectangular silicon wafer can be accommodated.

In other embodiments of the present application, the hollow groove is rectangular.

The hollowed-out groove is rectangular, so that the rectangular silicon wafer can be better matched.

In other embodiments of the present application, most of the hollow grooves have a hollow area, and the hollow area accounts for more than 90% of the area of the whole grooves.

In another embodiment of the present application, the width of the second supporting side is 0.02mm to 1mm wider than the width of the first supporting side.

The width of the second supporting edge is 0.02 mm-1 mm wider than that of the first supporting edge, so that the masks of the long side and the short side of the silicon wafer can meet the requirements.

In other embodiments of the present application, a load bearing panel has a first surface and an opposing second surface; the depth of the bearing surfaces of the first supporting edge and the second supporting edge from the first surface is 0.5 mm-3 mm.

The depth of the bearing surface of the first supporting edge and the second supporting edge from the first surface is 0.5-3 mm, so that the height requirement of the silicon wafer can be met, the silicon wafer is completely accommodated in the hollow groove, and a favorable guarantee is provided for a subsequent TCO film coating process.

In other embodiments of the present application, the plating carrier is integrally formed.

Through setting up coating film carrier integrated into one piece, guaranteed the steadiness and the structural strength of whole coating film carrier structure.

In other embodiments of the present application, the coating carrier is made of stainless steel or quartz.

The coating carrier is made of stainless steel or quartz materials, so that the strength of the coating carrier can be ensured, and the deformation caused by thermal expansion is small.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.

Fig. 1 is a schematic structural diagram of a coating carrier according to an embodiment of the present disclosure;

fig. 2 is a schematic structural view of a hollow groove of a plating carrier according to an embodiment of the present disclosure.

Icon: 100-a coating carrier; 110-a carrier panel; 120-hollowing out the groove; 121-a first support edge; 122-second support edge.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined or explained in subsequent figures.

In the description of the embodiments of the present application, it should be understood that the terms "upper", "left", "right", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, or orientations or positional relationships that are conventionally placed when products of the application are used, or orientations or positional relationships that are conventionally understood by those skilled in the art, and are used for convenience of description and simplification of description, but do not indicate or imply that the devices or elements that are referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore, should not be considered as limiting the present application.

Furthermore, the terms "first," "second," and the like are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.

In the description of the embodiments of the present application, it should also be noted that the terms "disposed" and "connected" are to be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected, unless explicitly stated or limited otherwise; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.

When the heterojunction solar cell is plated with the TCO film layer, the mask is realized by putting a silicon wafer into a tray with a hollowed groove, a frame platform for supporting the silicon wafer is arranged in the groove, and the mask is obtained when the TCO is not deposited at the contact position of the silicon wafer and the frame platform during film plating.

The inventor finds that when the mask is prepared on the prior rectangular silicon wafer, particularly a thin rectangular silicon wafer, the rectangular silicon wafer is easily heated and unevenly warped, and the mask of the silicon wafer is too small or too large due to the thermal deformation of a tray, so that the leakage ratio of a battery is high, the filling factor of the battery is low or the short current loss is caused.

In view of the above, the inventor designs a film plating carrier, which is applicable to a TCO film plating process in a heterojunction solar cell production process, is particularly applicable to a rectangular silicon wafer, and can effectively solve the problems that the rectangular silicon wafer is easily heated and unevenly warped and a tray is heated and deformed to cause a silicon wafer mask to be too small or too large, so that the leakage proportion of a cell is avoided or reduced, and the cell filling factor is low; and reducing or avoiding loss of battery short current.

Referring to fig. 1 and 2, the present embodiment provides a plating carrier 100, including: a bearing panel 110 and a plurality of hollowed-out grooves 120.

Further, a plurality of hollow grooves 120 are disposed on the carrier panel 110.

Each of the hollow grooves 120 can accommodate a rectangular silicon wafer.

Further, in some embodiments of the present disclosure, in order to accommodate a rectangular silicon wafer, the hollow groove 120 is configured to be elongated.

Further, in some embodiments of the present application, in order to accommodate a rectangular silicon wafer, the hollowed-out groove 120 is rectangular.

Further, in some embodiments of the present disclosure, the plating carrier 100 is integrally formed.

Through setting up coating film carrier 100 integrated into one piece, guaranteed the steadiness and the structural strength of whole coating film carrier 100 structure.

Further, in some embodiments of the present disclosure, the plurality of hollow-out grooves 120 are arranged in a matrix manner in the carrier panel 110 for carrying a silicon wafer.

Through setting up a plurality of fretwork recess 120 matrixes and arranging in bearing panel 110 for bear the weight of the silicon chip, stability is better when making the TCO rete plate.

Further, in some embodiments of the present application, the load-bearing panel 110 is quadrilateral in shape.

Further, in some embodiments of the present disclosure, the carrier panel 110 is rectangular, and can better accommodate a plurality of rectangular silicon chips.

Further, in some embodiments of the present application, the material of the plating carrier 100 is stainless steel or quartz material.

It should be noted that the stainless steel or quartz material selected for the plating carrier 100 is a common material in the art, and is commercially available, and no improvement is made in the present application.

The coating carrier 100 is made of stainless steel or quartz, so that the strength of the coating carrier 100 and the small thermal expansion deformation can be guaranteed.

In other alternative embodiments of the present disclosure, the material of the plating carrier 100 may be selected from any suitable material commonly used in the art.

Further, the hollow groove 120 includes two parallel first supporting edges 121 and two parallel second supporting edges 122. Further, the first supporting side 121 and the second supporting side 122 are vertically disposed. The length of the first support edge 121 is greater than the length of the second support edge 122.

The length of the first supporting edge 121 of the hollow groove 120 is larger than that of the second supporting edge 122, so that the rectangular silicon wafer can be better matched, the rectangular silicon wafer can be accommodated, and the TCO film layer is plated.

Further, the inventor finds that the hollow-out groove 120 can accommodate a rectangular silicon wafer, and the shape of the hollow-out groove 120 is generally long and narrow, for example, a rectangular hollow-out groove matching the rectangular silicon wafer.

However, when the hollow-out grooves 120 of the plating carrier 100 are formed in such shapes, the side lengths of the hollow-out grooves 120 are often unequal, for example, the common rectangular hollow-out grooves have long sides and short sides. When the TCO film coating is carried out by using the coating carrier 100, the expansion amounts of the long side and the short side are different under the same heating temperature. For example, in some embodiments of the present disclosure, the first supporting edge 121 of the hollow groove 120 expands more than the second supporting edge 122 after being heated. When the silicon chip is placed in the hollow groove, the hollow groove with different expansion amounts can affect the mask amount of the long side and the short side of the silicon chip, the mask amount of the short side is smaller, and then the electric leakage proportion of the battery is increased, and the filling factor of the battery is lower.

In view of this, the coating carrier 100 of the present application is configured such that the width of the second supporting edge 122 is greater than the width of the first supporting edge 121.

Through the arrangement, the width of the second supporting edge 122 is larger than that of the first supporting edge 121, so that the expansion amount of the first supporting edge 121 is compensated, and the same mask can be obtained on the long side and the short side of the silicon wafer in the TCO film plating process.

Further, according to the research of the inventor, the difference between the widths of the second supporting edge 122 and the first supporting edge 121 needs to be designed by comprehensively considering the actual uneven heating condition of the silicon wafer, the thickness of the silicon wafer, the bending coefficient calculated by the length and the width of the silicon wafer, and the expansion difference between the length and the width of the hollow groove 120.

Illustratively, in some embodiments of the present application, referring to fig. 1 and 2, for a wafer of type 210 x 105 (length 210mm, width 105mm) and thickness 100 μm, a plating carrier carrying 72pcs (12 x 6, as shown in fig. 1) expands 0.2mm in the long side direction and expands only 0.1mm in the short side direction at a deposition temperature of 100 ℃, and the wafer bends by 0.08mm in the long side direction due to uneven heating, both of which cause the mask of the short side of the wafer to be smaller than that of the long side of the wafer by 0.18mm, so that the design of the plating carrier 100 requires that the second supporting side 122 be 0.18mm wider than the design width of the first supporting side 121 to make the mask of the four sides normal, and the efficiency requirement is met while ensuring no electrical leakage.

As a result of comprehensive studies by the inventors, in the embodiment of the present application, the width of the second supporting side 122 of the plating carrier 100 is 0.02mm to 1mm wider than the width of the first supporting side 121.

Further optionally, in some embodiments of the present application, the width of the second supporting side is 0.06mm to 0.69mm wider than the width of the first supporting side.

Further optionally, in some embodiments of the present application, the width of the second supporting side is 0.07mm to 0.68mm wider than the width of the first supporting side. Further optionally, in some embodiments of the present application, the width of the second supporting side is 0.10mm to 0.60mm wider than the width of the first supporting side. Further optionally, in some embodiments of the present application, the width of the second supporting side is 0.20mm to 0.50mm wider than the width of the first supporting side.

Illustratively, the width of the second support edge is 0.25mm, 0.28mm, 0.30mm, 0.35mm, 0.40mm, 0.45mm or 0.48mm wider than the width of the first support edge.

Further, the load bearing panel 110 has a first surface and an opposing second surface.

Further, in some embodiments of the present application, the bearing surfaces of the first and second supporting

sides

121 and 122 have a depth of 0.5mm to 3mm from the first surface.

It should be noted that, when the TCO film plating process is performed, the silicon wafer is placed from the first surface and enters the hollow groove 120. The silicon wafer is supported on the supporting surface of the first supporting edge 121 and the second supporting edge 122.

The depth of the bearing surface of the first supporting edge 121 and the second supporting edge 122 from the first surface is 0.5 mm-3 mm, so that the height requirement of the silicon wafer can be met, the silicon wafer is completely accommodated in the hollow groove 120, and a favorable guarantee is provided for a subsequent TCO film layer plating process.

Further optionally, in some embodiments of the present application, the bearing surfaces of the first supporting edge 121 and the second supporting edge 122 have a depth of 0.55mm to 2.95mm from the first surface.

Further optionally, in some embodiments of the present application, the bearing surfaces of the first supporting edge 121 and the second supporting edge 122 have a depth of 0.60mm to 2.90mm from the first surface. Further optionally, in some embodiments of the present application, the bearing surfaces of the first supporting edge 121 and the second supporting edge 122 have a depth of 0.65mm to 2.85mm from the first surface. Further optionally, in some embodiments of the present application, the bearing surfaces of the first supporting edge 121 and the second supporting edge 122 have a depth of 0.70mm to 2.80mm from the first surface.

Illustratively, the bearing surfaces of the first and second support edges 121, 122 are at a depth of 0.75mm, 0.80mm, 0.85mm, 0.90mm, 0.95mm, 1.00mm, 1.20mm, 1.50mm, 2.00mm, or 2.50mm from the first surface.

Further, most of the hollow grooves 120 are hollow, and the hollow area accounts for more than 90% of the area of the whole grooves.

Illustratively, the open area comprises 90%, 92%, 94%, 95%, 96%, 97%, 98%, or 99% of the total groove area.

Further, in some embodiments of the present application, the first supporting edge 121 and the second supporting edge 122 are both rectangular parallelepiped, and the edge forms a regular mask.

The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A coating carrier is characterized by comprising:

a load bearing panel; and

a plurality of hollowed-out grooves; the bearing panel is arranged in the bearing panel in a matrix manner and is used for bearing a silicon wafer; the hollowed-out groove comprises two first supporting edges arranged in parallel and two second supporting edges arranged in parallel; the first supporting edge and the second supporting edge are vertically arranged; the length of the first supporting edge is greater than that of the second supporting edge, and the width of the second supporting edge is greater than that of the first supporting edge.

2. The plating carrier of claim 1,

the hollow-out grooves are in a long and narrow shape.

3. The plating carrier of claim 2,

the hollow groove is rectangular.

4. The plating carrier of claim 3,

most areas of the hollowed-out grooves are hollowed out, and the hollowed-out areas account for more than 90% of the area of all the grooves.

5. A plating carrier according to any one of claims 1 to 4,

the width of the second supporting edge is 0.02 mm-1 mm wider than that of the first supporting edge.

6. The plating carrier of claim 5,

the carrier panel has a first surface and an opposing second surface; the depth of the bearing surfaces of the first supporting edge and the second supporting edge from the first surface is 0.5-3 mm.

7. The plating carrier of claim 5,

the coating carrier is integrally formed.

8. The plating carrier of claim 1,

the coating carrier is made of stainless steel or quartz material.