CN217214728U - Semiconductor device based on sapphire substrate - Google Patents

Abstract

The utility model discloses a semiconductor device and preparation method based on sapphire substrate includes from bottom to top: a sapphire single crystal substrate and a laminated structure; the method is characterized in that: the laminated structure at least comprises a gallium oxide semiconductor layer; the sapphire single crystal substrate is partially etched through, and a lower metal layer is deposited on the partially etched through area. The technical scheme of the utility model need not the substrate and shifts, through doing the local erosion to the sapphire substrate and wearing the processing, wearing regional deposit metal level eroding for the metal level is direct and semiconductor layer electrical contact, like this, and the device during operation, the heat of production can transmit away well through the metal level, very big improvement the heat dissipation of power device, in addition, insulating sapphire substrate also plays insulation protection's effect.

Description

Semiconductor device based on sapphire substrate

Technical Field

The utility model relates to a semiconductor device and manufacturing technical field, in particular to semiconductor device and preparation method based on sapphire substrate.

Background

Sapphire is an insulating material having excellent chemical stability and high mechanical strength, and nowadays, a preparation technique of sapphire is well-established and widely used in the growth of semiconductor materials, and sapphire is used as a substrate for the growth of some semiconductor materials, for example, as an epitaxial substrate for a gallium nitride thin film having a hexagonal crystal structure, due to its crystal structure having hexagonal symmetry; can also be used as alpha-Ga having a hexagonal crystal structure ₂ O ₃ Thin film or epsilon-Ga ₂ O ₃ An epitaxial substrate for the thin film.

Gallium oxide (Ga) ₂ O ₃ ) As a semiconductor material of a super-wide forbidden band, the semiconductor material has the forbidden band width of 4.7-5.3 eV, and has outstanding advantages in the aspects of breakdown field intensity, small on-resistance, Barre plus merit value, cost and the like. Can be used for manufacturing high-performance power electronic devices, ultraviolet sensors and the like, and has wide and promising application prospect.

Gallium oxide (Ga) ₂ O ₃ ) Has five phases of alpha, beta, gamma, delta and epsilon, and is mainly researched around the alpha phase and the beta phase in the field of semiconductor application, wherein the beta-Ga ₂ O ₃ The crystal is a monoclinic crystal structure and is most stable, and the forbidden band width is about 4.8 eV; alpha-Ga ₂ O ₃ Has a hexagonal crystal structure, has inferior stability and has a forbidden band width of about 5.3 eV; in addition, according to the available data, α -Ga ₂ O ₃ Having a ratio of beta-Ga ₂ O ₃ Higher carrier mobility. Based on these characteristics, α -Ga ₂ O ₃ The method is more suitable for power semiconductor devices.

Today, limited to α -Ga ₂ O ₃ The substrate and substrate preparation technology can not overcome, and at present, only heterogeneous substrates can be searched for carrying out the epitaxial growth of the alpha-Ga ₂ O ₃ A film. Known as alpha-Ga ₂ O ₃ Having the same crystal structure as a sapphire substrate, it is known that a high-quality α -Ga can be successfully prepared on a sapphire substrate by using a Mist-CVD technique ₂ O ₃ A single crystal thin film.

However, there are two relatively difficult problems with the gallium oxide semiconductor stacked structure prepared based on the sapphire substrate: firstly, sapphire is an insulating material, which is not conductive and cannot be doped to make the sapphire conductive, so that at present, a gallium oxide laminated structure prepared on the basis of a sapphire substrate needs to be transferred to a conductive substrate to be used for manufacturing a vertical semiconductor device with vertical conductivity; secondly, the thermal conductivity of the sapphire material itself is very low, and the heat dissipation effect of a semiconductor device prepared based on the sapphire substrate is poor.

Disclosure of Invention

In view of this, the present invention provides a semiconductor device based on a sapphire substrate, which can fabricate a vertical structure without substrate transfer to a gallium oxide semiconductor layer, and can significantly improve the heat dissipation of the vertical semiconductor device.

In order to solve the technical problem, the utility model of the application is designed to firstly directly extend or indirectly extend a laminated structure containing a gallium oxide semiconductor layer through other semiconductor layers on a sapphire substrate, and then partially etch the sapphire substrate from the bottom to penetrate to the top of the substrate; and then respectively depositing metal electrode layers on the local etched-through area of the sapphire substrate and the top area of the gallium oxide semiconductor laminated layer structure, thus forming the vertical semiconductor device based on the sapphire substrate.

Based on the above utility model concept, the utility model provides a pair of semiconductor device based on sapphire substrate's technical scheme as follows:

a semiconductor device based on a sapphire substrate comprising, from bottom to top: a sapphire single crystal substrate and a laminated structure; the method is characterized in that: the laminated structure at least comprises a gallium oxide semiconductor layer; the sapphire single crystal substrate is partially etched through, and a lower metal layer is deposited on the partially etched through area.

Further, the laminated structure further includes one or more layers of a polycrystalline layer, a metal thin film layer, an insulating layer, and a passivation layer.

Furthermore, the lower metal layer is one or more layers.

Furthermore, the lower metal layers are multiple layers, and other non-metal conducting layers are also included among the multiple lower metal layers.

Furthermore, the gallium oxide semiconductor layer is a multilayer or a laminated structure of the gallium oxide semiconductor and other semiconductors with a hexagonal crystal orientation structure.

Preferably, the other semiconductor having a hexagonal structure is a nitride semiconductor, an oxide semiconductor, or a carbide semiconductor.

Preferably, the gallium oxide semiconductor in the gallium oxide semiconductor layer is alpha-Ga with hexagonal crystal structure ₂ O ₃ Or a crystalline oxide semiconductor containing two or more metals selected from other metals and gallium as main components.

Preferably, the other metal is indium or aluminum.

Preferably, the semiconductor device is a schottky diode, a pn junction diode, a metal oxide semiconductor field effect transistor, an insulated gate bipolar transistor, a light emitting diode, an electrostatic induction transistor, a junction field effect transistor, a high electron mobility transistor, or a metal semiconductor field effect transistor.

Compared with the prior art, the utility model discloses corrode the local of sapphire substrate and wear district deposit metal electrode layer in the local for metal electrode layer is direct to contact with the semiconductor film layer, thereby produces following three beneficial effect:

(1) the vertical semiconductor device needs to be respectively provided with electrodes on the front surface and the back surface of the semiconductor layer, and when the technical scheme of the utility model is adopted to manufacture the vertical semiconductor device based on the sapphire substrate, the substrate does not need to be transferred, so that the manufacturing process can be simplified;

(2) the technical scheme of the utility model can make the heat generated by the semiconductor device during working transmit and diffuse out through the metal layer with excellent heat dissipation performance in time, thereby greatly improving the heat dissipation effect;

(3) the sapphire substrate is an insulating material, and for some semiconductor devices, an insulating medium layer does not need to be deposited additionally.

Drawings

In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the drawings used in the embodiments or the prior art descriptions will be briefly introduced below, and it is obvious that the drawings in the following descriptions are only some embodiments of the present invention, and the protection scope of the present invention is not limited to the embodiments. For a person skilled in the art, without inventive effort, further figures can be obtained from these figures.

Fig. 1 is a schematic diagram of a first suitable example of a schottky diode (SBD) of the present invention;

fig. 2 is a schematic diagram of a second suitable example of a schottky diode (SBD) of the present invention;

fig. 3 is a schematic diagram of a third suitable example of a schottky diode (SBD) of the present invention;

fig. 4 is a schematic diagram of a suitable example of a pn junction diode of the present invention;

fig. 5 is a schematic diagram of a first suitable example of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) of the present invention;

FIG. 6 is a schematic diagram of a second suitable example of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) of the present invention;

fig. 7 is a schematic diagram of a suitable example of an Insulated Gate Bipolar Transistor (IGBT) of the present invention;

fig. 8 is a schematic diagram of one suitable example of a Light Emitting Diode (LED) of the present invention;

fig. 9 is a schematic diagram of a fourth suitable example of a schottky diode (SBD) of the present invention;

fig. 10 is a flowchart of a method for manufacturing the sapphire schottky diode semiconductor device of fig. 9 according to an embodiment of the present invention;

the technical characteristics corresponding to the marks in the drawings are as follows:

101 sapphire single crystal substrate

102a n-form alpha-Ga ₂ O ₃ Semiconductor layer

102b n + type alpha-Ga ₂ O ₃ Semiconductor layer

102 n type alpha-Ga ₂ O ₃ Semiconductor layer

103a p-form alpha-Ga ₂ O ₃ Semiconductor layer

103b p + type alpha-Ga ₂ O ₃ Semiconductor layer

103 p type alpha-Ga ₂ O ₃ Semiconductor layer

104 passivation layer

105a anodic metal layer

105b cathode metal layer

106a anode metal layer

107a anodic metal layer

107b cathode metal layer

108 gate insulating layer

109a polysilicon

109b heavily doped p + type drain region

109c heavily doped p + type source region

109d metal layer

110a gate electrode

110b drain electrode

110c source electrode

111a gate electrode

111b collector electrode

111c emitter

112a first electrode

112b second electrode

112c light-transmissive electrode

113 light emitting layer

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

In order to explain the technical solution of the present invention, the following description is made by way of specific examples.

First embodiment

As shown in fig. 1, a Schottky Barrier Diode (SBD) according to a first example of the present invention is shown. The sapphire schottky diode semiconductor device of fig. 1, comprising: an anode metal layer 105a, a partially etched through sapphire single crystal substrate 101, a lightly doped n-type α -Ga ₂ O ₃ Semiconductor layer 102a heavily doped n + -type α -Ga ₂ O ₃ A semiconductor layer 102b, a cathode metal layer 105 b;

in FIG. 1, lightly doped n-type α -Ga ₂ O ₃ Semiconductor layer 102a and heavily doped n + -type α -Ga ₂ O ₃ The semiconductor layer 102b can be formed by a known method such as Metal Organic Chemical Vapor Deposition (MOCVD) or atomized CVD (Mist-CVD);

in fig. 1, the materials of the schottky electrode (i.e., the anode metal layer 105a) and the ohmic electrode (i.e., the cathode metal layer 105b) may be known electrode materials, and as the electrode materials, for example: metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, or Ag, or alloys thereof; metal oxide conductive films such as tin oxide, zinc oxide, indium tin oxide, and zinc indium oxide; organic conductive compounds such as polyaniline, polythiophene, and polypyrrole, or mixtures thereof;

in fig. 1, the schottky electrode and the ohmic electrode can be formed by a known method such as a vacuum deposition method or a sputtering method. More specifically, when the schottky electrode is formed, a layer made of Ni and a layer made of Al may be stacked.

When the schottky diode (SBD) shown in fig. 1 works, heat generated by the device can be quickly conducted out from the metal electrode layers at the top and bottom ends of the device, and the heat dissipation effect of the power device with sapphire as the substrate is greatly improved.

When the thickness of the sapphire single crystal substrate 101 is thick, the sapphire single crystal substrate 101, which is a single crystal substrate of β -Ga2O3, may be thinned before the etching process.

Second embodiment

As shown in fig. 2, a second example of a Schottky Barrier Diode (SBD) according to the present invention is shown.

The schottky diode (SBD) of fig. 2 has an anode metal layer 106a in addition to the structure of fig. 1, and more particularly, the schottky diode (SBD) of fig. 2 has: an anode metal layer 106a, an anode metal layer 105a, a partially etched through sapphire single crystal substrate 101, a lightly doped n-type α -Ga ₂ O ₃ Semiconductor layer 102a heavily doped n + -type α -Ga ₂ O ₃ A semiconductor layer 102b, a cathode metal layer 105 b;

in FIG. 2, the Schottky diode (SBD) has two anode metal layers, anode metal layer 105a as an inner layer and lightly doped n-type α -Ga ₂ O ₃ The semiconductor layer 102a constitutes a schottky contact; an anode metal layer 106a as an outer layer for electrical connection with the outside; the material of the anode metal layer 106a may be selected from known electrode materials described in the first embodiment.

When the schottky diode (SBD) shown in fig. 2 works, heat generated by the device can be quickly conducted out from the metal electrode layers at the top and bottom ends of the device, and the heat dissipation effect of the power device with sapphire as the substrate is greatly improved.

Third embodiment

As shown in fig. 3, a Schottky Barrier Diode (SBD) according to a third embodiment of the present invention is shown.

The schottky diode (SBD) of fig. 3 is different from that of fig. 2 in that it further includes a passivation layer 104, so that the insulation characteristic is better. The passivation layer 104 is made of AlN or Hf ₂ O ₃ 、Al ₂ O ₃ 、MgO、SiO ₂ Or Si ₃ N ₄ And the like. The passivation layer can be formed by a known method such as a sputtering method, a vacuum evaporation method, or a CVD method.

Fourth embodiment

Fig. 4 shows an example of a pn junction diode according to the present invention.

The pn-junction diode semiconductor device of fig. 4, comprising: an anode metal layer 107a, a partially etched through sapphire single crystal substrate 101, and heavily doped p + -type α -Ga ₂ O ₃ Semiconductor layer 103b heavily doped n + -type α -Ga ₂ O ₃ A semiconductor layer 102b, a cathode metal layer 107 b;

the material of the anode metal layer 107a and the cathode metal layer 107b may be a known electrode material, for example: metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, or Ag, or alloys thereof; metal oxide conductive films such as tin oxide, zinc oxide, indium tin oxide, and zinc indium oxide; and organic conductive compounds such as polyaniline, polythiophene, and polypyrrole, and mixtures thereof. The metal electrode can be formed by a known method such as a vacuum deposition method or a sputtering method.

When the pn junction diode shown in the attached figure 4 works, heat generated by the device can be quickly conducted out from the metal electrode layers at the top and the bottom of the device, and the heat dissipation effect of the gallium oxide-based power device is greatly improved.

Fifth embodiment

Fig. 5 shows a first example of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) according to the present invention.

The semiconductor arrangement of the MOSFET of fig. 5, comprising: partially etched through sapphire single crystal substrate 101, lightly doped n-type alpha-Ga ₂ O ₃ A semiconductor layer 102a, a heavily doped p + -type drain region 109b, a heavily doped p + -type source region 109c, a gate insulating layer 108, a polysilicon gate region 109a, and a metal layer 109 d;

fig. 5 shows an n-channel enhancement type MOSFET, and the sapphire single crystal substrate has low thermal conductivity and poor thermal conductivity. The substrate is partially etched through, and then the metal layer is deposited, so that a heat dissipation channel is provided through the bottom metal layer, and heat dissipation of the device is improved.

Sixth embodiment

Fig. 6 shows a second example of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) according to the present invention.

The semiconductor arrangement of the MOSFET of fig. 6, comprising: partially etched through sapphire single crystal substrate 101 heavily doped n + -type alpha-Ga ₂ O ₃ Semiconductor layer 102b, lightly doped p-type alpha-Ga ₂ O ₃ A semiconductor layer 103a, a gate insulating layer 108, a polysilicon gate region 109a, a gate electrode 110a, a drain electrode 110b, a source electrode 110 c;

fig. 6 shows a trench MOSFET, and the sapphire single crystal substrate has low thermal conductivity and poor thermal conductivity. The substrate is partially etched through, and then the metal layer is deposited, so that a heat dissipation channel is provided through the bottom metal layer, and the heat dissipation of the device is improved.

Seventh embodiment

As shown in fig. 7, an example of an Insulated Gate Bipolar Transistor (IGBT) according to the present invention is shown.

The semiconductor device of the IGBT in fig. 7 includes: partially etched through sapphire single crystal substrate 101, p-type alpha-Ga ₂ O ₃ Semiconductor layer 103, n-type alpha-Ga ₂ O ₃ Semiconductor layer 102, lightly doped n-type alpha-Ga ₂ O ₃ The semiconductor layer(s) 102a,heavily doped n + -type alpha-Ga ₂ O ₃ Semiconductor layer 102b, p-type alpha-Ga ₂ O ₃ A semiconductor layer 103, a gate insulating layer 108, a gate electrode 111a, a collector 111b, and an emitter 111 c.

Eighth embodiment

Fig. 8 shows an example of a light emitting diode according to the present invention.

The semiconductor device of the light emitting diode of fig. 8, comprising: a sapphire single crystal substrate 101 etched through partially, a second electrode 112b, n-type α -Ga ₂ O ₃ Semiconductor layer 102, light-emitting layer 113, p-type α -Ga ₂ O ₃ A semiconductor layer 103, a light-transmitting electrode 112c, and a first electrode 112 a;

as a material of the light-transmissive electrode, for example, a conductive material containing an oxide of indium (In) or titanium (Ti) is used. More specifically, for example, In ₂ O ₃ 、ZnO、SnO ₂ 、Ga ₂ O ₃ 、TiO ₂ 、CeO ₂ Or a mixed crystal of two or more of these or a material doped therein. These materials are provided by a known method such as a sputtering method, whereby the light-transmissive electrode can be formed. After the formation of the light-transmissive electrode, thermal annealing for the purpose of transparency of the light-transmissive electrode may be performed;

according to the light emitting diode of fig. 8, the first electrode 112a is set to be a positive electrode, the second electrode 112b is set to be a negative electrode, and current is caused to flow into the p-type semiconductor layer 103, the light emitting layer 113, and the n-type semiconductor layer 102 through both electrodes, whereby the light emitting layer 113 emits light;

examples of the material of the first electrode 112a and the second electrode 112b include: metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, or Ag, or alloys thereof; and a metal oxide conductive film such as tin oxide, zinc oxide, Indium Tin Oxide (ITO), or Indium Zinc Oxide (IZO). The method for forming the electrode is not particularly limited, and the electrode can be formed by a method appropriately selected in consideration of adequacy of the material from wet methods such as a printing method and a coating method, physical methods such as a vacuum deposition method, a sputtering method, and an ion plating method, chemical methods such as a CVD method and a plasma CVD method, and the like.

Ninth embodiment

As shown in fig. 9, a fourth example of the Schottky Barrier Diode (SBD) according to the present invention is shown. The schottky diode (SBD) of fig. 9, comprising: a sapphire single crystal substrate 101 that is etched through partially,

lightly doped n-type alpha-Ga ₂ O ₃ Semiconductor layer 102a heavily doped n + -type α -Ga ₂ O ₃ A semiconductor layer 102b, a cathode metal layer 105b, an anode metal layer 105a, a doped polysilicon layer 109a, an anode metal layer 106 a; wherein 105a is used as an inner layer and is lightly doped with n-type alpha-Ga ₂ O ₃ The semiconductor layer 102a constitutes a schottky contact; 106a as an outer layer for electrical connection with the outside, and 109a as an intermediate layer between 105a and 106a for electrical connection.

Fig. 10 shows a method for manufacturing the schottky diode (SBD) of fig. 9, including the steps of:

step S1, providing a sapphire single crystal substrate 101;

step S2, growing lightly doped n-type alpha-Ga on the sapphire single crystal substrate 101 ₂ O ₃ A semiconductor layer 102 a;

step S3, lightly doping n-type alpha-Ga ₂ O ₃ Heavily doped n + -type α -Ga is grown on the semiconductor layer 102a ₂ O ₃ A semiconductor layer 102 b;

step S4, heavily doping n + type alpha-Ga ₂ O ₃ Depositing a cathode metal layer 105b on the semiconductor layer 102b, the cathode metal layer 105b and heavily doped n + -type alpha-Ga ₂ O ₃ The semiconductor layer 102b constitutes an ohmic contact;

step S5, an optional step, of performing appropriate thinning according to the thickness of the single crystal substrate 101;

step S6, etching the local part of the sapphire single crystal substrate 101 from the bottom of the substrate 101 to make the substrate 101 partially etch through to the alpha-Ga of the lightly doped n-type ₂ O ₃ The surface of the semiconductor layer 102 a;

step S7, in placeEtching n-type alpha-Ga in local through-region of substrate 101 ₂ O ₃ Depositing an anode metal layer 105a on the surface of the semiconductor layer 102a, the anode metal layer 105a and lightly doped n-type alpha-Ga ₂ O ₃ The semiconductor layer 102a constitutes a schottky contact;

step S8, depositing a polysilicon layer 109a on the anode metal layer 105a deposited in step S7, and doping the polysilicon layer 109a to convert it into an electrically good conductor layer;

in step S9, an anode metal layer 106a is deposited on the polysilicon layer 109a deposited in step S8, and the anode metal layer 106a is electrically connected to the outside.

The above embodiments have only exemplified the structure of the semiconductor device such as schottky diode, pn junction diode, mosfet, igbt, and led, and the inventive concept of the present application can be applied to semiconductor devices such as electrostatic induction transistor, junction field effect transistor, hemt, and mosfet.

In addition, the above embodiments only exemplify the method for manufacturing the schottky diode (SBD), and based on the inventive concept of the present application, the above method can be extended to pn junction diodes, metal oxide semiconductor field effect transistors, insulated gate bipolar transistors, light emitting diodes, electrostatic induction transistors, junction field effect transistors, high electron mobility transistors, or metal semiconductor field effect transistors according to the specific structure of different semiconductor devices.

It should be understood that the drawings of the above-mentioned embodiments are only for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims (8)

1. A semiconductor device based on a sapphire substrate comprising, from bottom to top: a sapphire single crystal substrate and a stacked structure; the method is characterized in that: the laminated structure at least comprises a gallium oxide semiconductor layer; the sapphire single crystal substrate is partially etched through, and a lower metal layer is deposited on the partially etched through area.

2. The semiconductor device according to claim 1, wherein: the laminated structure further includes one or more of a polycrystalline layer, a metal thin film layer, an insulating layer, and a passivation layer.

3. The semiconductor device according to claim 1, wherein: the lower metal layer is one or more layers.

4. The semiconductor device according to claim 1, wherein: the lower metal layers are multilayer, and other nonmetal conducting layers are also arranged among the multilayer lower metal layers.

5. The semiconductor device according to claim 1, wherein: the gallium oxide semiconductor layer is a multilayer structure or a laminated structure of a gallium oxide semiconductor and other semiconductors with a hexagonal crystal orientation structure.

6. The semiconductor device according to claim 5, wherein: the other semiconductor having a hexagonal structure is a nitride semiconductor, an oxide semiconductor, or a carbide semiconductor.

7. The semiconductor device according to claim 1, wherein: the gallium oxide semiconductor in the gallium oxide semiconductor layer is alpha-Ga with hexagonal crystal structure ₂ O ₃ The single-component semiconductor of (1).

8. The semiconductor device according to any one of claims 1 to 7, wherein: the semiconductor device is a Schottky diode, a pn junction diode, a metal oxide semiconductor field effect transistor, an insulated gate bipolar transistor, a light emitting diode, an electrostatic induction transistor, a junction field effect transistor, a high electron mobility transistor or a metal semiconductor field effect transistor.

Images